Patent application number | Description | Published |
20080253200 | Reading of the State of a Non-Volatile Storage Element - A method for reading of the state of a non-volatile memory element, comprising adjusting including conditioning the frequency of a first oscillatory to the state of this element, and comparing the frequency of the first oscillator with the predetermined frequency of a second oscillator, selected between two possible frequency values for the first oscillator, according to the state of the storage element. | 10-16-2008 |
20090073759 | Device for protecting a memory against attacks by error injection - A memory is secured against an error injection during the reading of a datum. The memory includes: means for reading a reference datum in the memory during a phase of reading a datum stored in the memory; means for comparing the reference datum read with an expected value; and means for generating an error signal if the datum read is different from the expected value. Application is provided particularly but not exclusively to the protection of memories integrated into smart cards. | 03-19-2009 |
20100135087 | READING OF THE STATE OF A NON-VOLATILE STORAGE ELEMENT - A method for reading of the state of a non-volatile memory element including conditioning the frequency of a first oscillator to the state of this element, and comparing the frequency of the first oscillator with the predetermined frequency of a second oscillator, selected between two possible frequency values for the first oscillator, according to the state of the storage element. | 06-03-2010 |
20110128030 | MONITORING OF THE ACTIVITY OF AN ELECTRONIC CIRCUIT - A method and a device for monitoring a digital signal, wherein a first P-channel MOS transistor is placed in degradation conditions of negative bias temperature instability type during periods when the signal to be monitored is in a first state; a first quantity representative of the saturation current of the first transistor is measured when the signal to be monitored switches to a second state; and a detection signal is switched when this first quantity exceeds a threshold. | 06-02-2011 |
20120030443 | PROTECTION OF SECRET KEYS - A method for protecting at least first data of a non-volatile memory from which the extraction of this first data is triggered by the reading or the writing, by a processor from or into the memory, of second data independent from the first data, said first data being provided to a circuit which the processor cannot access. | 02-02-2012 |
20140138686 | PROTECTION OF AN INTEGRATED CIRCUIT AGAINST ATTACKS - An integrated circuit, including: a semiconductor substrate of a first conductivity type; a plurality of regions of the first conductivity type vertically extending from the surface of the substrate, each of the regions being laterally delimited all along its periphery by a region of the second conductivity type; and a device for detecting a variation of the substrate resistance between each region of the first conductivity type and an area for biasing the substrate to a reference voltage. | 05-22-2014 |
20150194393 | PROTECTION OF AN INTEGRATED CIRCUIT AGAINST ATTACKS - An integrated circuit, including: a semiconductor substrate of a first conductivity type; a plurality of regions of the first conductivity type vertically extending from the surface of the substrate, each of the regions being laterally delimited all along its periphery by a region of the second conductivity type; and a device for detecting a variation of the substrate resistance between each region of the first conductivity type and an area for biasing the substrate to a reference voltage. | 07-09-2015 |
20150340426 | COMPONENT, FOR EXAMPLE NMOS TRANSISTOR, WITH AN ACTIVE REGION UNDER RELAXED COMPRESSIVE STRESS, AND ASSOCIATED DECOUPLING CAPACITOR - An integrated circuit includes a substrate and a circuit component (such as a MOS device or resistance) disposed at least partially within an active region of the substrate limited by an insulating region. A capacitive structure including a first electrode (for connection to a first potential such as ground) and a second electrode (for connection to a second potential such as a supply voltage) is provided in connection with the insulating region. One of the first and second electrodes is situated at least in part within the insulating region. The capacitive structure is thus configured in order to allow a reduction in compressive stresses within the active region. | 11-26-2015 |