Patent application number | Description | Published |
20100035145 | PACKING STRUCTURE FOR LITHIUM ION POLYMER BATTERY - Disclosed is a packing structure for a lithium ion polymer battery, which includes: a battery casing including a lower multilayer polymer and an upper multilayer polymer, wherein the lower multilayer polymer has an inner space of a predetermined size for housing at least one electrode assembly and an electrolyte and is provided with an extension portion extending radially and outwardly from a top edge of each vertical portion of the lower multilayer polymer, a part of the upper multilayer polymer is coupled rotatably to a part of the extension portion of the lower multilayer polymer and remaining parts of the upper multilayer polymer are sealed to remaining parts of the extension portion of the lower multilayer polymer; and a battery protection member, which wraps the outer circumference of the battery casing so that the battery contained in the battery casing can be protected from external impact, and is fixed integrally by a part of the sealed extension portions. The packing structure can protect a battery from external impact while minimizing an increase in size of the whole battery. | 02-11-2010 |
20100055558 | LINTHIUM SECONDARY BATTERY IMPROVED SAFETY AND CAPACITY - Disclosed herein is a secondary battery having an electrode assembly constructed in a structure in which a plurality of electrodes are stacked, while separators are disposed respectively between the electrodes, and electrode taps of the electrodes are connected with each other, the electrode assembly being mounted in a battery case, wherein regions where the electrode taps are coupled to electrode leads (electrode tap-electrode lead coupling regions) are located at an upper-end contact region of the battery case, and the contact region is bent in the thickness direction of the battery, whereby the electrode assembly is separated from an inner space of the battery case. | 03-04-2010 |
20100209768 | BATTERY PACK OF LARGE CAPACITY - Disclosed herein is a battery pack including a battery cell, having an electrode assembly mounted in a pouch-shaped battery case made of a laminate sheet including a metal layer and a resin layer and is sealed by thermal welding, mounted in a pack case, wherein the pack case includes a frame member constructed in a structure in which a receiving part for receiving the battery cell is open, opposite side sealing portions of the battery cell are mounted to the frame member such that the opposite side sealing portions cover the opposite sides of the frame member, and a sheathing film is applied to the outer surface of the frame member, to which the battery cell is mounted. | 08-19-2010 |
20110002178 | VERTICAL NON-VOLATILE MEMORY DEVICE, METHOD OF FABRICATING THE SAME DEVICE, AND ELECTRIC-ELECTRONIC SYSTEM HAVING THE SAME DEVICE - Provided is a vertical non-volatile memory device having a metal source line. The vertical non-volatile memory device includes cell string units that are formed on first portions of a semiconductor substrate and are vertically arranged with respect to a surface of the semiconductor substrate, impurity regions formed on second portions of the semiconductor substrate between the cell string units, conductive lines formed on the impurity regions, and spacers that are formed on the sidewalls of the cell string units and insulate the conductive lines from the cells string units. | 01-06-2011 |
20110018036 | VERTICAL NON-VOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME - A vertical non-volatile memory device is structured/fabricated to include a substrate, groups of memory cell strings each having a plurality of memory transistors distributed vertically so that the memory throughout multiple layers on the substrate, integrated word lines coupled to sets of the memory transistors, respectively, and stacks of word select lines. The memory transistors of each set are those transistors, of one group of the memory cell strings, which are disposed in the same layer above the substrate. The word select lines are respectively connected to the integrated word lines. | 01-27-2011 |
20110057224 | LIGHT EMITTING DEVICE, SYSTEM AND PACKAGE - A light emitting device includes a light emitting structure formed from an active layer located between two semiconductor layers. An insulator extends through the active layer and at least partially through the semiconductor layers, and the light emitting structure is located between a first electrode and a second electrode layer. The first electrode and insulator overlap one another and may have the same or different widths. | 03-10-2011 |
20110095306 | LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE AND LIGHTING SYSTEM - Disclosed are a light emitting device, a light emitting device package and a lighting system. The light emitting device of the embodiment includes a light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer and an active layer between the first and second conductive semiconductor layers; a second electrode under the second conductive semiconductor layer; a first texture over a first region of the first conductive semiconductor layer; an A-electrode over the first region of the first conductive semiconductor layer; and a B-electrode over a second region of the first conductive semiconductor layer, wherein the B-electrode includes a pad electrode connected to a wire. | 04-28-2011 |
20110095320 | LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE PACKAGE - Disclosed are a light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a light emitting structure including a second conductive semiconductor layer, an active layer over the second conductive semiconductor layer, and a first conductive semiconductor layer over the active layer dielectric layer in a cavity defined by removing a portion of the light emitting structure, and a second electrode layer over the dielectric layer. | 04-28-2011 |
20110095332 | LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE, AND LIGHTING SYSTEM - A light emitting device includes a first electrode, a first semiconductor layer, an active layer; a second semiconductor layer, and a second electrode. A current blocking layer is formed on a side surface of and has a width provided within the first semiconductor layer. The thickness and width of the current blocking layer is smaller than the thickness and width of the first semiconductor layer. | 04-28-2011 |
20110108869 | LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE AND LIGHTING SYSTEM - Embodiments relate to a light emitting device, a light emitting device package, and a lighting system. The light emitting device comprises: a light emitting structure including a first conductive type semiconductor layer, an active layer over the first conductive type semiconductor layer, and a second conductive type semiconductor layer over the active layer; a dielectric layer formed in each of a plurality of cavities defined by removing a portion of the light emitting structure; and a second electrode layer over the dielectric layer. | 05-12-2011 |
20110151667 | Methods of Manufacturing Three-Dimensional Semiconductor Devices and Related Devices - A three-dimensional semiconductor device may include a substrate including wiring and contact regions and a thin film structure on the wiring and contact regions of the substrate. The thin-film structure may include a plurality of alternating wiring layers and inter-layer insulating layers defining a terraced structure in the contact region so that each of the wiring layers includes a contact surface in the contact region that extends beyond others of the wiring layers more distant from the substrate. A plurality of contact structures may extend in a direction perpendicular to a surface of the substrate with each of the contact structures being electrically connected to a contact surface of a respective one of the wiring layers. Related methods are also discussed. | 06-23-2011 |
20110156089 | Light Emitting Device, Light Emitting Device Package And Lighting System - Embodiments relate to a light emitting device, a light emitting device package, and a lighting system. The light emitting device comprises: a substrate; a light emitting structure over the substrate, the light emitting structure including a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer, wherein the first conductive type semiconductor layer is partially exposed; a first region having a first concentration and provided at a region of the second conductive type semiconductor layer; a second region having a second concentration and provided at another region of the second conductive type semiconductor layer; and a second electrode over the second conductive type semiconductor layer. | 06-30-2011 |
20110180941 | THREE-DIMENSIONAL SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - Provided is a three-dimensional semiconductor device and method for fabricating the same. The device includes a first electrode structure and a second electrode structure stacked sequentially on a substrate. The first and second electrode structures include stacked first electrodes and stacked second electrodes, respectively. Each of the first and second electrodes includes a horizontal portion parallel with the substrate and an extension portion extending from the horizontal portion along a direction penetrating an upper surface of the substrate. Here, the substrate may be closer to top surfaces of the extension portions of the first electrodes than to the horizontal portion of at least one of the second electrodes. | 07-28-2011 |
20110198644 | LIGHT EMITTING DEVICE PACKAGE AND LIGHTING SYSTEM - A light emitting device package includes a sub mount; a light emitting device on the sub mount, and configured to generate light of a first wavelength; a dielectric layer disposed on the sub mount; and a fluorescent layer on the dielectric layer, and configured to convert the light of the first wavelength into light of a second wavelength, wherein the dielectric layer includes a plurality of layers having at least two different refractive indices, that transmits the light of the first wavelength and reflects the light of the second wavelength. | 08-18-2011 |
20110215358 | LIGHT EMITTING DEVICE - A light emitting device of the embodiment includes a light emitting structure including a first semiconductor layer, an active layer and a second semiconductor layer; a first cavity passing through the first semiconductor layer and the active layer to expose the second semiconductor layer; a first electrode extending to the outside of the first cavity from the second semiconductor layer in the first cavity; a second electrode disposed on an outer peripheral region of a bottom surface of the first semiconductor layer and spaced apart from the first electrode while surrounding a lateral side of the first electrode; and a first insulating layer between the first electrode and the light emitting structure. | 09-08-2011 |
20110233515 | Light Emitting Device, Light Emitting Device Package And Lighting System - Disclosed are a light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a substrate; a light emitting structure including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer, which are formed on the substrate such that a part of the first conductive semiconductor layer is exposed; a dielectric layer formed from a top surface of the second conductive semiconductor layer to an exposed top surface of the first conductive semiconductor layer; a second electrode on the second conductive semiconductor layer; and a first electrode on the exposed top surface of the first conductive semiconductor layer while making contact with a part of the dielectric layer on the second conductive semiconductor layer. | 09-29-2011 |
20110233517 | LIGHT EMITTING DEVICE, METHOD OF MANUFACTURING THE SAME, LIGHT EMITTING DEVICE PACKAGE AND LIGHTING SYSTEM - A light emitting device according to the embodiment includes a light emitting structure including a first conductive semiconductor layer, an active layer on the first conductive semiconductor layer, a second conductive semiconductor layer on the active layer, a superlattice structure layer on the second conductive semiconductor layer, and a third conductive semiconductor layer on the superlattice structure layer; a light transmission electrode layer on the light emitting structure; a first electrode connected to the first conductive semiconductor layer; a second electrode electrically connected to the light transmission electrode layer on the light emitting structure; and an insulating layer extending from a lower portion of the second electrode to an upper portion of the second conductive semiconductor layer. | 09-29-2011 |
20110233602 | LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE AND LIGHTING SYSTEM - Disclosed are a light emitting device, a light emitting device package, and a lighting system. The light emitting device comprises a substrate; a light emitting structure including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer, which are formed on the substrate such that a part of the first conductive semiconductor layer is exposed upward; schottky contact regions on the second conductive semiconductor layer; a second electrode on the second conductive semiconductor layer; and a first electrode on the exposed first conductive semiconductor layer, wherein a distance between the schottky contact regions narrowed as the schottky contact regions are located closely to a mesa edge region. | 09-29-2011 |
20110248300 | LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE AND LIGHTING SYSTEM - A light emitting device is provided. The light emitting device includes a light emitting structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer, a first dielectric layer over a cavity where a part of the light emitting structure is removed, a second electrode layer over the first dielectric layer, a second dielectric layer over the light emitting structure above the cavity, and a first electrode over the second dielectric layer. | 10-13-2011 |
20110266585 | LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE AND LIGHTING SYSTEM - A light emitting device is provided. The light emitting device includes a light emitting structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer, a first dielectric layer over a part of an upper surface of the light emitting structure, and a pad electrode over the first dielectric layer. | 11-03-2011 |
20110284943 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: a plurality of conductive patterns stacked on a substrate and spaced apart from each other and a pad pattern including a flat portion extending in a first direction parallel to the substrate from one end of any one of the plurality of conductive patterns, and a landing sidewall portion extending upward from a top surface of the flat portion, wherein a width of a portion of the landing sidewall portion in a second direction parallel to the substrate and perpendicular to the first direction is less than a width of the flat portion. | 11-24-2011 |
20110291172 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a substrate doped with a first conductive type dopant, a plurality of stacked structures arranged side by side on the substrate and extending in a first direction, each of the stacked structures including gate electrodes spaced apart from each other, the plurality of stacked structures including a pair of stacked structures spaced apart from each other at a first interval in a second direction perpendicular to the first direction, and a pick-up region extending in the first direction in the substrate between the pair of stacked structures and doped with the first conductive type dopant. | 12-01-2011 |
20120032245 | Vertical Structure Non-Volatile Memory Device - A vertical structure non-volatile memory device includes semiconductor regions that vertically extend on a substrate, a plurality of memory cell strings that vertically extend on the substrate along sidewalls of the semiconductor regions and include a plurality of memory cells and at least one or more first selection transistors, which are disposed on sides of the memory cells and are adjacent to one another. A plurality of wordlines is connected to the memory cells of the memory cell strings. A first selection line is connected to the selection transistors of the memory cell strings and insulating regions are formed as air gaps between the first selection transistors of the adjacent memory cell strings. | 02-09-2012 |
20120032250 | SEMICONDUCTOR DEVICES - A semiconductor device can include a first substrate and conductive patterns on the first substrate, where the conductive patterns are disposed in stacks vertically extending from the substrate. An active pillar can be on the first substrate vertically extend from the first substrate through the conductive patterns to provide vertical string transistors on the first substrate. A second substrate can be on the conductive patterns and the active pillar opposite the first substrate. A peripheral circuit transistor can be on the second substrate opposite the first substrate, where the peripheral circuit transistor can be adjacent to and overlap an uppermost pattern of the conductive patterns. | 02-09-2012 |
20120061744 | THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES - Three dimensional semiconductor memory devices are provided. The three dimensional semiconductor memory device includes a first stacked structure and a second stacked structure sequentially stacked on a substrate. The first stacked structure includes first insulating patterns and first gate patterns which are alternately and repeatedly stacked on a substrate, and the second stacked structure includes second insulating patterns and second gate patterns which are alternately and repeatedly stacked on the first stacked structure. A plurality of first vertical active patterns penetrate the first stacked structure, and a plurality of second vertical active patterns penetrate the second stacked structure. The number of the first vertical active patterns is greater than the number of the second vertical active patterns. | 03-15-2012 |
20120091497 | Light Emitting Device - Embodiments relate to a light emitting device, a light emitting device package, and a lighting system. The light emitting device comprises: a substrate; a light emitting structure over the substrate, the light emitting structure including a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer, wherein the first conductive type semiconductor layer is partially exposed; a first region having a first concentration and provided at a region of the second conductive type semiconductor layer; a second region having a second concentration and provided at another region of the second conductive type semiconductor layer; and a second electrode over the second conductive type semiconductor layer. | 04-19-2012 |
20120098049 | THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME - A three dimensional semiconductor memory device has a stacked structure including cell gates stacked therein that are insulated from each other and first string selection gates laterally separated from each other, vertical active patterns extending through the first string selection gates, multi-layered dielectric layers between sidewalls of the vertical active patterns and the cell gates and between the sidewalls of the vertical active patterns and the first string selection gates, and at least one first supplement conductive pattern. The first string selection gates are disposed over an uppermost cell gate of the cell gates. Each vertical active pattern extends through each of the cell gates stacked under the first string selection gates. The first supplement conductive pattern is in contact with a sidewall of one of the first string selection gates. | 04-26-2012 |
20120098050 | Three-Dimensional Semiconductor Devices - Three-dimensional semiconductor devices may be provided. The devices may include a stack-structure including gate patterns and an insulation pattern. The stack-structure may further include a first portion and a second portion, and the second portion of the stack-structure may have a narrower width than the first portion. The devices may also include an active pattern that penetrates the stack-structure. The devices may further include a common source region adjacent the stack-structure. The devices may additionally include a strapping contact plug on the common source region. | 04-26-2012 |
20120138995 | LIGHT EMITTING DEVICE - A light emitting device includes a substrate, a first conductive type semiconductor layer disposed on the substrate, an active layer disposed on one part of the first conductive type semiconductor layer, a second conductive type semiconductor layer disposed on the active layer, a first electrode disposed on the second conductive type semiconductor layer, and a second electrode disposed on the other part of the first conductive type semiconductor layer, wherein a trench is formed at a portion of the second conductive type semiconductor layer, the active layer or the first conductive type semiconductor layer so that the trench is disposed under the first electrode. | 06-07-2012 |
20120193705 | VERTICAL NONVOLATILE MEMORY DEVICES HAVING REFERENCE FEATURES - A memory device includes a substrate having a cell array region defined therein. A dummy structure is disposed on or in the substrate near a boundary of the cell array region. The memory device also includes a vertical channel region disposed on the substrate in the cell array region. The memory device further includes a plurality of vertically stacked conductive gate lines with insulating layers interposed therebetween, the conductive gate lines and interposed insulating layers disposed laterally adjacent the vertical channel region and extending across the dummy structure, at least an uppermost one of the conductive gate lines and insulating layers having a surface variation at the crossing of the dummy structure configured to serve as a reference feature. The dummy structure may include a trench, and the surface variation may include an indentation overlying the trench. | 08-02-2012 |
20120208347 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME - Methods of fabricating a three-dimensional semiconductor device are provided. Methods may include forming a stack structure including first layers and second layers alternately stacked on a substrate, patterning the stack structure to form at least one isolation trench, forming channel structures penetrating the stack structure and being spaced apart from the isolation trench, and forming upper interconnection lines on the stack structure to connect the channel structures to each other. An isolation trench may be formed prior to formation of the channel structures. | 08-16-2012 |
20120256253 | Vertical Memory Devices - Vertical memory devices include a channel, a ground selection line (GSL), a word line, a string selection line (SSL), a pad and an etch-stop layer. The channel extends in a first direction on a substrate. The channel includes an impurity region and the first direction is perpendicular to a top surface of the substrate. At least one GSL, a plurality of the word lines and at least one SSL are spaced apart from each other in the first direction on a sidewall of the channel. The pad is disposed on a top surface of the channel. The etch-stop layer contacts the pad. | 10-11-2012 |
20130020647 | SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME - Semiconductor devices are provided. The semiconductor device includes conductive patterns vertically stacked on a substrate to be spaced apart from each other, and pad patterns electrically connected to respective ones of the conductive patterns. Each of the pad patterns includes a flat portion extending from an end of the conductive pattern in a first direction parallel with the substrate and a landing sidewall portion upwardly extending from an end of the flat portion. A width of a portion of the landing sidewall portion in a second direction parallel with the substrate and perpendicular to the first direction is less than a width of the flat portion in the second direction. The related methods are also provided. | 01-24-2013 |
20130161675 | LIGHT EMITTING DEVICE - Disclosed is a light emitting device. The light emitting device comprises a light emitting structure comprising a plurality of compound semiconductor layers; and a light extraction structure on the light emitting structure. The light extraction structure comprises a plurality of first layers and a plurality of second layers which are alternately disposed with each other to have a negative refraction index. | 06-27-2013 |
20130161831 | THREE-DIMENSIONAL SEMICONDUCTOR DEVICES - A three-dimensional semiconductor device may include a substrate including wiring and contact regions and a thin film structure on the wiring and contact regions of the substrate. The thin-film structure may include a plurality of alternating wiring layers and inter-layer insulating layers defining a terraced structure in the contact region so that each of the wiring layers includes a contact surface in the contact region that extends beyond others of the wiring layers more distant from the substrate. A plurality of contact structures may extend in a direction perpendicular to a surface of the substrate with each of the contact structures being electrically connected to a contact surface of a respective one of the wiring layers. Related methods are also discussed. | 06-27-2013 |
20130168800 | SEMICONDUCTOR DEVICE - Provided is a semiconductor device that includes first and second isolation patterns disposed on a substrate. Alternately stacked interlayer insulating patterns and a conductive patterns are disposed on a surface of the substrate between the first and second isolation patterns. A support pattern penetrates the conductive patterns and the interlayer insulating patterns and has a smaller width than the first and second isolation patterns. First and second vertical structures are disposed between the first isolation and the support pattern and penetrate the conductive patterns and the interlayer insulating patterns. A second vertical structure is disposed between the second isolation pattern and the support pattern and penetrates the conductive patterns and the interlayer insulating patterns. A distance between top and bottom surfaces of the support pattern is greater than a distance between a bottom surface of the support pattern and the surface of the substrate. | 07-04-2013 |
20130279233 | VERTICAL NON-VOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME - A vertical non-volatile memory device is structured/fabricated to include a substrate, groups of memory cell strings each having a plurality of memory transistors distributed vertically so that the memory throughout multiple layers on the substrate, integrated word lines coupled to sets of the memory transistors, respectively, and stacks of word select lines. The memory transistors of each set are those transistors, of one group of the memory cell strings, which are disposed in the same layer above the substrate. The word select lines are respectively connected to the integrated word lines. | 10-24-2013 |
20130286735 | VERTICAL STRUCTURE SEMICONDUCTOR MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME - A semiconductor memory device includes: a semiconductor region extending vertically from a first region of a substrate; a plurality of gate electrodes disposed on the first region of the substrate in a vertical direction, but separated from each other along a sidewall of the semiconductor region; a gate dielectric layer disposed between the semiconductor region and the plurality of gate electrodes; a substrate contact electrode extending vertically from the impurity-doped second region of the substrate; and an insulating region formed as an air gap between the substrate contact electrode and at least one of the plurality of gate electrodes. | 10-31-2013 |
20130295761 | Three-Dimensional Semiconductor Device and Method for Fabricating the Same - Provided is a three-dimensional semiconductor device and method for fabricating the same. The device includes a first electrode structure and a second electrode structure stacked sequentially on a substrate. The first and second electrode structures include stacked first electrodes and stacked second electrodes, respectively. Each of the first and second electrodes includes a horizontal portion parallel with the substrate and an extension portion extending from the horizontal portion along a direction penetrating an upper surface of the substrate. Here, the substrate may be closer to top surfaces of the extension portions of the first electrodes than to the horizontal portion of at least one of the second electrodes. | 11-07-2013 |
20140183756 | THREE-DIMENSIONAL SEMICONDUCTOR DEVICE - A three-dimensional semiconductor device includes a substrate having a cell array region between first and second contact regions. A first stack includes a plurality of first electrodes vertically provided on the substrate, and a second stack includes a plurality of second electrodes vertically provided on the first stack. The second stack is arranged to expose end portions of the first electrodes on the first contact region and overlap end portions of the first electrodes on the second contact region. | 07-03-2014 |
20140197481 | VERTICAL TYPE SEMICONDUCTOR DEVICES - A vertical type semiconductor device includes first and second word line structures that include first and second word lines. The word lines surround a plurality of pillar structures, which are provided to connect the word lines to corresponding string select lines. Connecting patterns electrically connect pairs of adjacent first and second word lines in a same plane. The device may be a nonvolatile memory device or a different type of device. | 07-17-2014 |
20140197546 | PAD STRUCTURES AND WIRING STRUCTURES IN A VERTICAL TYPE SEMICONDUCTOR DEVICE - Step shape pad structure and wiring structure in vertical type semiconductor device are include a first conductive line having a first line shape and including first pad regions at an upper surface of an edge portion, and a second conductive line having s second line shape and being spaced apart from the first conductive line and provided on the first conductive line. An end portion of the first conductive line is extended to a first position. Second pad regions are included on an upper surface of an edge portion of the second conductive line. An end portion of the second conductive line is extended to the first position. The second conductive line includes a dent portion at a facing portion to the first pad regions in a vertical direction to expose the first pad regions. The pad structure may be used in a vertical type nonvolatile memory device. | 07-17-2014 |
20140198572 | STRING SELECTION STRUCTURE OF THREE-DIMENSIONAL SEMICONDUCTOR DEVICE - A three-dimensional semiconductor device includes first and second selection lines stacked one on the other. An upper line horizontally crosses over the first and second selection lines. First and second vertical patterns vertically cross the first and second selection lines. The first and second vertical patterns are connected in common to the upper line. Each of the first and second vertical patterns constitutes first and second selection transistors that are connected in series to each other. The first selection transistors of the first and second vertical patterns are controlled by the first and second selection lines, respectively. | 07-17-2014 |
20140199815 | METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE - A method of manufacturing a vertical type memory device includes stacking a first lower insulating layer, one layer of a lower sacrificial layer and a second lower insulating layer on a substrate, forming a stacking structure by stacking sacrificial layers and insulating layers, and etching an edge portion of the stacking structure to form a preliminary stepped shape pattern structure. The preliminary stepped shape pattern structure has a stepped shape edge portion. A pillar structure making contact with a surface of the substrate is formed. The preliminary stepped shape pattern structure, the lower sacrificial layer, and the first and second lower insulating layers are partially etched to form a first opening portion and a second opening portion to form a stepped shape pattern structure. The second opening portion cuts at least an edge portion of the lower sacrificial layer. | 07-17-2014 |
20140256101 | METHODS OF FABRICATING THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES - A three dimensional semiconductor memory device has a stacked structure including cell gates stacked therein that are insulated from each other and first string selection gates laterally separated from each other, vertical active patterns extending through the first string selection gates, multi-layered dielectric layers between sidewalls of the vertical active patterns and the cell gates and between the sidewalls of the vertical active patterns and the first string selection gates, and at least one first supplement conductive pattern. The first string selection gates are disposed over an uppermost cell gate of the cell gates. Each vertical active pattern extends through each of the cell gates stacked under the first string selection gates. The first supplement conductive pattern is in contact with a sidewall of one of the first string selection gates. | 09-11-2014 |
20140357054 | METHODS FOR FABRICATING SEMICONDUCTOR DEVICES - A semiconductor device can include a first substrate and conductive patterns on the first substrate, where the conductive patterns are disposed in stacks vertically extending from the substrate. An active pillar can be on the first substrate vertically extend from the first substrate throughthe conductive patterns to provide vertical string transistors on the first substrate. A second substrate can be on the conductive patterns and the active pillar opposite the first substrate. A peripheral circuit transistor can be on the second substrate opposite the first substrate, where the peripheral circuit transistor can be adjacent to and overlap an uppermost pattern of the conductive patterns. | 12-04-2014 |
20140374785 | LIGHT EMITTING DEVICE AND LIGHTING APPARATUS INCLUDING THE SAME - Disclosed herein is a light emitting device exhibiting improved current spreading. The disclosed light emitting device includes a light emitting structure including a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and an active layer disposed between the first conductivity type and second conductivity type semiconductor layers, a first electrode disposed on the first conductivity type semiconductor layer, and a second electrode disposed on the second conductivity type semiconductor layer. The light emitting structure includes a mesa etching region where the second conductivity type semiconductor layer, active layer, and first conductivity type semiconductor layer are partially etched, thereby exposing a portion of the first conductivity type semiconductor layer. The first electrode is disposed on the exposed portion of the first conductivity type semiconductor layer. A first electrode layer is disposed between the second conductivity type semiconductor layer and the second electrode. A second electrode layer is disposed between portions of the first electrode layer spaced from each other at opposite sides of the mesa etching region. | 12-25-2014 |