Patent application number | Description | Published |
20140230557 | SENSOR WITH VACUUM-SEALED CAVITY - A method and apparatus for detecting underwater sounds is disclosed. An embodiment of the apparatus includes a substrate with a vacuum-sealed cavity. A support structure and an acoustic pressure sensor are situated on the substrate. The support structure of the apparatus may include a first oxide layer situated on the substrate, a silicon layer situated on the first oxide layer, and a second oxide layer situated on the silicon layer. The acoustic pressure sensor of the apparatus includes a first electrode layer situated on the substrate, a piezoelectric layer situated on the first electrode layer, and a second electrode layer situated on the piezoelectric layer. In one embodiment, the surface area of the second electrode layer is between about 70 to 90 percent of the surface area of the piezoelectric layer. In various embodiments, the support structure is thicker than the piezoelectric layer. | 08-21-2014 |
20140260617 | FULLY DIFFERENTIAL CAPACITIVE ARCHITECTURE FOR MEMS ACCELEROMETER - A fully differential microelectromechanical system (MEMS) accelerometer configured to measure Z-axis acceleration is disclosed. This may avoid some of the disadvantages in traditional capacitive sensing architectures—for example, less sensitivity, low noise suppression, and low SNR, due to Brownian noise. In one embodiment, the accelerometer comprises three silicon wafers, fabricated with electrodes forming capacitors in a fully differential capacitive architecture. These electrodes may be isolated on a layer of silicon dioxide. In some embodiments, the accelerometer also includes silicon dioxide layers, piezoelectric structures, getter layers, bonding pads, bonding spacers, and force feedback electrodes, which may apply a force to the proof mass region. Fully differential MEMS accelerometers may be used in geophysical surveys, e.g., for seismic sensing or acoustic positioning. | 09-18-2014 |
20140260618 | FORCE FEEDBACK ELECTRODES IN MEMS ACCELEROMETER - A microelectromechanical system (MEMS) accelerometer having separate sense and force-feedback electrodes is disclosed. The use of separate electrodes may in some embodiments increase the dynamic range of such devices. Other possible advantages include, for example, better sensitivity, better noise suppression, and better signal-to-noise ratio. In one embodiment, the accelerometer includes three silicon wafers, fabricated with sensing electrodes forming capacitors in a fully differential capacitive architecture, and with separate force feedback electrodes forming capacitors for force feedback. These electrodes may be isolated on a layer of silicon dioxide. In some embodiments, the accelerometer also includes silicon dioxide layers, piezoelectric structures, getter layers, bonding pads, bonding spacers, and force feedback electrodes, which may apply a restoring force to the proof mass region. MEMS accelerometers with force-feedback electrodes may be used in geophysical surveys, e.g., for seismic sensing or acoustic positioning. | 09-18-2014 |
20150145376 | ENERGY HARVESTING DEVICE AND METHOD FOR FORMING THE SAME - According to embodiments of the present invention, an energy harvesting device is provided. The energy harvesting device includes a plurality of energy harvesting elements, each energy harvesting element including a transducer, and at least one spring arranged in between at least two energy harvesting elements of the plurality of energy harvesting elements to mechanically couple the at least two energy harvesting elements to each other. According to further embodiments of the present invention, a method for forming an energy harvesting device is also provided. | 05-28-2015 |
20150293142 | FULLY DIFFERENTIAL CAPACITIVE ARCHITECTURE FOR MEMS ACCELEROMETER - A fully differential microelectromechanical system (MEMS) accelerometer configured to measure Z-axis acceleration is disclosed. This may avoid some of the disadvantages in traditional capacitive sensing architectures—for example, less sensitivity, low noise suppression, and low SNR, due to Brownian noise. In one embodiment, the accelerometer comprises three silicon wafers, fabricated with electrodes forming capacitors in a fully differential capacitive architecture. These electrodes may be isolated on a layer of silicon dioxide. In some embodiments, the accelerometer also includes silicon dioxide layers, piezoelectric structures, getter layers, bonding pads, bonding spacers, and force feedback electrodes, which may apply a force to the proof mass region. Fully differential MEMS accelerometers may be used in geophysical surveys, e.g., for seismic sensing or acoustic positioning. | 10-15-2015 |
Patent application number | Description | Published |
20090048300 | Heterocyclic Compounds - The present invention relates to compounds which are inhibitors of histone deacetylase. More particularly, the present invention relates to heterocyclic compounds and methods for their preparation. These compounds may be useful as medicaments for the treatment of proliferative disorders as well as other diseases involving, relating to or associated with enzymes having histone deacetylase (HDAC) activities. | 02-19-2009 |
20090075999 | OXYGEN LINKED PYRIMIDINE DERIVATIVES - The present invention relates to pyrimidine compounds that are useful as anti-proliferative agents. More particularly, the present invention relates to oxygen linked and substituted pyrimidine compounds, methods for their preparation, pharmaceutical compositions containing these compounds and uses of these compounds in the treatment of proliferative disorders. These compounds may be useful as medicaments for the treatment of a number of proliferative disorders including tumours and cancers as well as other disorders or conditions related to or associated with kinases. | 03-19-2009 |
20090258886 | HETEROALKYL LINKED PYRIMIDINE DERIVATIVES - The present invention relates to pyrimidine compounds that are useful as anti-proliferative agents. More particularly, the present invention relates to heteroalkyl linked and substituted pyrimidine compounds, methods for their preparation, pharmaceutical compositions containing these compounds and uses of these compounds in the treatment of proliferative disorders. These compounds may be useful as medicaments for the treatment of a number of proliferative disorders including tumours and cancers as well as other conditions or disorders associated with kinases. | 10-15-2009 |
20100105721 | IMIDAZO[1,2-a]PYRIDINE DERIVATIVES: PREPARATION AND PHARMACEUTICAL APPLICATIONS - The present invention relates to hydroxamate compounds which are inhibitors of histone deacetylase. More particularly, the present invention relates to imidazo[1,2-a]pyridine containing compounds and methods for their preparation. These compounds may be useful as medicaments for the treatment of proliferative disorders as well as other diseases involving, relating to or associated with enzymes having histone deacetylase activities (HDAC). | 04-29-2010 |
20120142680 | HETEROALKYL LINKED PYRIMIDINE DERIVATIVES - The present invention relates to pyrimidine compounds that are useful as anti-proliferative agents. More particularly, the present invention relates to heteroalkyl linked and substituted pyrimidine compounds, methods for their preparation, pharmaceutical compositions containing these compounds and uses of these compounds in the treatment of proliferative disorders. These compounds may be useful as medicaments for the treatment of a number of proliferative disorders including tumours and cancers as well as other conditions or disorders associated with kinases. | 06-07-2012 |
20120196855 | OXYGEN LINKED PYRIMIDINE DERIVATIVES - The present invention relates to pyrimidine compounds that are useful as anti-proliferative agents. More particularly, the present invention relates to oxygen linked and substituted pyrimidine compounds, methods for their preparation, pharmaceutical compositions containing these compounds and uses of these compounds in the treatment of proliferative disorders. These compounds may be useful as medicaments for the treatment of a number of proliferative disorders including tumours and cancers as well as other disorders or conditions related to or associated with kinases. | 08-02-2012 |
20130172338 | OXYGEN LINKED PYRIMIDINE DERIVATIVES - The present invention relates to pyrimidine compounds that are useful as anti-proliferative agents. More particularly, the present invention relates to oxygen linked and substituted pyrimidine compounds, methods for their preparation, pharmaceutical compositions containing these compounds and uses of these compounds in the treatment of proliferative disorders. These compounds may be useful as medicaments for the treatment of a number of proliferative disorders including tumours and cancers as well as other disorders or conditions related to or associated with kinases. | 07-04-2013 |
20140005194 | BENZIMIDAZOLE DERIVATIVES: PREPARATION AND PHARMACEUTICAL APPLICATIONS | 01-02-2014 |
20140121203 | IMIDAZO[1,2-a]PYRIDINE DERIVATIVES: PREPARATION AND PHARMACEUTICAL APPLICATIONS - The present invention relates to hydroxamate compounds which are inhibitors of histone deacetylase. More particularly, the present invention relates to imidazo[1,2-a]pyridine containing compounds and methods for their preparation. These compounds may be useful as medicaments for the treatment of proliferative disorders as well as other diseases involving, relating to or associated with enzymes having histone deacetylase activities (HDAC). | 05-01-2014 |
20150038703 | IMIDAZO[1,2-a]PYRIDINE DERIVATIVES: PREPARATION AND PHARMACEUTICAL APPLICATIONS - The present invention relates to hydroxamate compounds which are inhibitors of histone deacetylase. More particularly, the present invention relates to imidazo[1,2-a]pyridine containing compounds and methods for their preparation. These compounds may be useful as medicaments for the treatment of proliferative disorders as well as other diseases involving, relating to or associated with enzymes having histone deacetylase activities (HDAC). | 02-05-2015 |
Patent application number | Description | Published |
20120201297 | IMAGE DECODING METHOD, IMAGE CODING METHOD, IMAGE DECODING APPARATUS, IMAGE CODING APPARATUS, PROGRAM, AND INTEGRATED CIRCUIT - An image decoding method including: obtaining an old quantization scaling matrix which is a decoded quantization scaling matrix and is used for decoding a new quantization scaling matrix; obtaining, from the coded stream, an update parameter indicating an amount of change in the new quantization scaling matrix with respect to the old quantization scaling matrix; decoding the new quantization scaling matrix using the old quantization scaling matrix obtained in the obtaining of an old quantization scaling matrix and the update parameter obtained in the obtaining of an update parameter; and decoding the coded image using the new quantization scaling matrix decoded in the decoding of the new quantization scaling matrix. | 08-09-2012 |
20120251015 | DECODING METHOD, DECODING APPARATUS, CODING METHOD, AND CODING APPARATUS - A decoding method includes: obtaining a plurality of quantization parameter sets from a header of a coded stream (S | 10-04-2012 |
20130058408 | IMAGE CODING METHOD, IMAGE DECODING METHOD, IMAGE CODING APPARATUS, IMAGE DECODING APPARATUS, AND IMAGE CODING AND DECODING APPARATUS - An image coding method includes: writing, into a sequence parameter set, buffer description defining information for defining a plurality of buffer descriptions; selecting one of the buffer descriptions for each processing unit that is a picture or a slice, and writing buffer description selecting information for specifying the selected buffer description, into a first header of the processing unit which is included in the coded bitstream; and coding the processing unit using the selected buffer description, and the buffer description defining information includes long-term information for identifying, among a plurality of reference pictures indicated in the buffer descriptions, a reference picture to be assigned as a long-term reference picture. | 03-07-2013 |
20130070841 | IMAGE CODING METHOD, IMAGE DECODING METHOD, IMAGE CODING APPARATUS, IMAGE DECODING APPARATUS, AND IMAGE CODING AND DECODING APPARATUS - An image coding method includes: writing, into a sequence parameter set, buffer description defining information for defining a plurality of buffer descriptions; writing, into the sequence parameter set, reference list description defining information for defining a plurality of reference list descriptions corresponding to the buffer descriptions; and writing, into a first header of each processing unit which is included in a coded bitstream, buffer description selecting information for specifying a selected buffer description. | 03-21-2013 |
20130101034 | IMAGE CODING METHOD, IMAGE DECODING METHOD, IMAGE CODING APPARATUS, IMAGE DECODING APPARATUS, AND IMAGE CODING AND DECODING APPARATUS - An image coding method includes: writing, into a coded bitstream, buffer description defining information for defining a buffer description; constructing a default reference list; reorder pictures included in the default reference list; writing, into the coded bitstream, reference list reordering information for indicating details of the reordering; and coding an image using the buffer description and a reference list resulting from the reordering, and in the reference list reordering information, among the pictures, a picture to be reordered is specified using an index which is used in other processing in the image coding method. | 04-25-2013 |
20130107963 | IMAGE CODING METHOD, IMAGE DECODING METHOD, IMAGE CODING APPARATUS, AND IMAGE DECODING APPARATUS | 05-02-2013 |
20130107964 | IMAGE CODING METHOD, IMAGE DECODING METHOD, IMAGE CODING APPARATUS, AND IMAGE DECODING APPARATUS | 05-02-2013 |
20130107965 | IMAGE CODING METHOD, IMAGE DECODING METHOD, IMAGE CODING APPARATUS, AND IMAGE DECODING APPARATUS | 05-02-2013 |
20130235927 | METHODS AND APPARATUSES FOR ENCODING AND DECODING VIDEO - The present invention introduces new methods and apparatuses for decoded picture buffer (DPB) management using reference picture set (RPS) where consecutive reference picture sets are conFIG.d such that reference pictures is set/marked as non-reference at appropriate instances and/or according to predetermined priorities. Using the present invention, the DPB size is kept at a minimum while supporting both optimal reference picture configuration and correct output reordering. Benefits of the present invention are in the form of improved coding efficiency and/or reduced memory storage for DPB. | 09-12-2013 |
20130301728 | IMAGE CODING METHOD, IMAGE DECODING METHOD, IMAGE CODING APPARATUS, AND IMAGE DECODING APPARATUS - An image coding method includes: deriving a candidate for a motion vector predictor from a neighboring motion vector; adding the candidate to a list; selecting a motion vector predictor from the list; coding a current block; and coding a current motion vector. In the deriving, the candidate is derived according to a first derivation scheme when each of a current reference picture and a neighboring reference picture is determined to be a long-term reference picture, and the candidate is derived according to a second derivation scheme when each of a current reference picture and a neighboring reference picture is determined to be a short-term reference picture. | 11-14-2013 |
20130336403 | IMAGE CODING METHOD AND IMAGE CODING APPARATUS - An image coding method includes: selecting a first picture from plural pictures; setting a first temporal motion vector prediction flag which is associated with the first picture and is a temporal motion vector prediction flag indicating whether or not temporal motion vector prediction is to be used, to indicate that the temporal motion vector prediction is not to be used, and coding the first temporal motion vector prediction flag; coding the first picture without using the temporal motion vector prediction; and coding a second picture which follows the first picture in coding order, with referring to a motion vector of a picture preceding the first picture in coding order being prohibited. | 12-19-2013 |
20140010287 | IMAGE CODING METHOD, IMAGE DECODING METHOD, IMAGE CODING APPARATUS, AND IMAGE DECODING APPARATUS - An image coding method includes: deriving a candidate for a motion vector predictor from a neighboring motion vector; adding the candidate to a list; selecting a motion vector predictor from the list; coding a current block; and coding a current motion vector. In the deriving, the candidate is derived according to a first derivation scheme when each of a current reference picture and a neighboring reference picture is determined to be a long-term reference picture, and the candidate is derived according to a second derivation scheme when each of a current reference picture and a neighboring reference picture is determined to be a short-term reference picture. | 01-09-2014 |
20140016702 | IMAGE DECODING METHOD AND IMAGE DECODING APPARATUS - An image decoding method includes: obtaining, from a bitstream, a first temporal motion vector prediction flag, which is a temporal motion vector prediction flag indicating whether or not temporal motion vector prediction is to be used, indicating that temporal motion vector prediction is not to be used on a first picture; decoding the first picture without using the temporal motion vector prediction; and decoding a second picture which follows the first picture in decoding order, with referring to a motion vector of a picture preceding the first picture in decoding order being prohibited. | 01-16-2014 |
20140064377 | IMAGE CODING METHOD, IMAGE DECODING METHOD, IMAGE CODING APPARATUS, AND IMAGE DECODING APPARATUS - An image coding method includes: deriving a candidate for a motion vector of a current block from a co-located motion vector; adding the candidate to a list; selecting the motion vector of the current block from the list; and coding the current block, wherein the deriving includes: deriving the candidate by a first derivation scheme in the case of determining that each of a current reference picture and a co-located reference picture is a long-term reference picture; and deriving the candidate by a second derivation scheme in the case of determining that each of the current reference picture and the co-located reference picture is a short-term reference picture. | 03-06-2014 |
20140105283 | METHOD AND APPARATUS FOR ENCODING AND DECODING VIDEO USING INTRA PREDICTION MODE DEPENDENT ADAPTIVE QUANTIZATION MATRIX - A method of encoding video using intra prediction mode dependent quantization matrix includes: calculating an array of quantizers for each size of block unit ( | 04-17-2014 |
20140112389 | VIDEO ENCODING METHOD, VIDEO ENCODING APPARATUS, VIDEO DECODING METHOD AND VIDEO DECODING APPARATUS - Accordingly, a video encoding method, apparatus and other aspects are disclosed. A reference picture set is written into a header of the bit stream, the reference picture set including reference pictures, a time identifier, a usage identifier and at least one parameter representing at least one of scale and view. A reference picture list having one or more of the reference pictures is constructed. A block of the video is encoded from a reference picture associated with a reference index in the reference picture list. The reference index is written into the bit stream. | 04-24-2014 |
20140119671 | METHODS AND APPARATUSES FOR ENCODING, EXTRACTING AND DECODING VIDEO USING TILES CODING SCHEME - State-of-the-art video coding schemes supports splitting a picture into smaller rectangular units called tiles units. Each tile units can be independently encoded and decoded by separate encoders and decoders, respectively. The primary purpose of tiles units is to allow parallel processing of the picture to reduce implementation cost and complexity. The present disclosure provides additional functionality to define flexible partitioned tile regions and to allow partial decoding and reconstruction of tile regions. | 05-01-2014 |
20140169450 | METHODS AND APPARATUSES FOR ENCODING AND DECODING VIDEO USING PERIODIC BUFFER DESCRIPTION - A method of encoding video including: writing a plurality of predetermined buffer descriptions into a sequence parameter set of a coded video bitstream; writing a plurality of updating parameters into a slice header of the coded video bitstream for selecting and modifying one buffer description out of the plurality of buffer descriptions; and encoding a slice into the coded video bitstream using the slice header and the modified buffer description. | 06-19-2014 |
20140314153 | IMAGE CODING METHOD, IMAGE DECODING METHOD, IMAGE CODING APPARATUS, AND IMAGE DECODING APPARATUS - An image coding method includes: deriving a candidate for a motion vector predictor from a co-located motion vector; adding the candidate to a list; selecting the motion vector predictor from the list; and coding a current block and coding a current motion vector, wherein the deriving includes: deriving the candidate by a first derivation scheme in the case of determining that each of a current reference picture and a co-located reference picture is a long-term reference picture; and deriving the candidate by a second derivation scheme in the case of determining that each of the current reference picture and the co-located reference picture is a short-term reference picture. | 10-23-2014 |
20140341298 | IMAGE CODING METHOD, IMAGE DECODING METHOD, IMAGE CODING APPARATUS, AND IMAGE DECODING APPARATUS - An image coding method includes: deriving a candidate for a motion vector predictor from a neighboring motion vector; adding the candidate to a list; selecting a motion vector predictor from the list; coding a current block; and coding a current motion vector. In the deriving, the candidate is derived according to a first derivation scheme when each of a current reference picture and a neighboring reference picture is determined to be a long-term reference picture, and the candidate is derived according to a second derivation scheme when each of a current reference picture and a neighboring reference picture is determined to be a short-term reference picture. | 11-20-2014 |
20140348244 | IMAGE CODING METHOD, IMAGE DECODING METHOD, IMAGE CODING APPARATUS, AND IMAGE DECODING APPARATUS - An image coding method includes: deriving a candidate for a motion vector predictor from a neighboring motion vector; adding the candidate to a list; selecting a motion vector predictor from the list; coding a current block; and coding a current motion vector. In the deriving, the candidate is derived according to a first derivation scheme when each of a current reference picture and a neighboring reference picture is determined to be a long-term reference picture, and the candidate is derived according to a second derivation scheme when each of a current reference picture and a neighboring reference picture is determined to be a short-term reference picture. | 11-27-2014 |
20140348245 | IMAGE CODING METHOD, IMAGE DECODING METHOD, IMAGE CODING APPARATUS, AND IMAGE DECODING APPARATUS - An image coding method includes: deriving a candidate for a motion vector predictor from a co-located motion vector; adding the candidate to a list; selecting the motion vector predictor from the list; and coding a current block and coding a current motion vector, wherein the deriving includes: deriving the candidate by a first derivation scheme in the case of determining that each of a current reference picture and a co-located reference picture is a long-term reference picture; and deriving the candidate by a second derivation scheme in the case of determining that each of the current reference picture and the co-located reference picture is a short-term reference picture. | 11-27-2014 |
20140369415 | METHODS AND APPARATUSES FOR ENCODING AND DECODING VIDEO USING TEMPORAL MOTION VECTOR PREDICTION - A method of encoding a video into a coded video bitstream with temporal motion vector prediction comprises: determining a value of a flag for indicating whether temporal motion vector prediction is used or not used for the inter-picture prediction of a sub-picture unit of a picture; and writing the flag having the value into a header of the sub-picture unit or a header of the picture; wherein if the flag indicates that temporal motion vector prediction is used, the method further comprises: creating a first list of motion vector predictors comprising a plurality of motion vector predictors including at least one temporal motion vector predictor derived from at least one motion vector from a collocated reference picture; selecting a motion vector predictor out of the first list; and writing a first parameter into the coded video bitstream for indicating the selected motion vector predictor out of the first list. | 12-18-2014 |
20150030083 | IMAGE CODING METHOD, IMAGE DECODING METHOD, IMAGE CODING APPARATUS, IMAGE DECODING APPARATUS, AND IMAGE CODING AND DECODING APPARATUS - An image coding method includes: writing, into a sequence parameter set, buffer description defining information for defining a plurality of buffer descriptions; writing, into the sequence parameter set, reference list description defining information for defining a plurality of reference list descriptions corresponding to the buffer descriptions; and writing, into a first header of each processing unit which is included in a coded bitstream, buffer description selecting information for specifying a selected buffer description. | 01-29-2015 |
20150085936 | IMAGE CODING METHOD, IMAGE DECODING METHOD, IMAGE CODING APPARATUS, AND IMAGE DECODING APPARATUS - An image coding method includes: deriving a candidate for a motion vector predictor from a neighboring motion vector; adding the candidate to a list; selecting a motion vector predictor from the list; coding a current block; and coding a current motion vector. In the deriving, the candidate is derived according to a first derivation scheme when each of a current reference picture and a neighboring reference picture is determined to be a long-term reference picture, and the candidate is derived according to a second derivation scheme when each of a current reference picture and a neighboring reference picture is determined to be a short-term reference picture. | 03-26-2015 |
20150139316 | IMAGE CODING METHOD, IMAGE DECODING METHOD, IMAGE CODING APPARATUS, IMAGE DECODING APPARATUS, AND IMAGE CODING AND DECODING APPARATUS - An image coding method includes: writing, into a sequence parameter set, buffer description defining information for defining a plurality of buffer descriptions; selecting one of the buffer descriptions for each processing unit that is a picture or a slice, and writing buffer description selecting information for specifying the selected buffer description, into a first header of the processing unit which is included in the coded bitstream; and coding the processing unit using the selected buffer description, and the buffer description defining information includes long-term information for identifying, among a plurality of reference pictures indicated in the buffer descriptions, a reference picture to be assigned as a long-term reference picture. | 05-21-2015 |
20150208088 | IMAGE CODING METHOD, IMAGE DECODING METHOD, IMAGE CODING APPARATUS, AND IMAGE DECODING APPARATUS - An image coding method includes: deriving a candidate for a motion vector predictor from a co-located motion vector; adding the candidate to a list; selecting the motion vector predictor from the list; and coding a current block and coding a current motion vector, wherein the deriving includes: deriving the candidate by a first derivation scheme in the case of determining that each of a current reference picture and a co-located reference picture is a long-term reference picture; and deriving the candidate by a second derivation scheme in the case of determining that each of the current reference picture and the co-located reference picture is a short-term reference picture. | 07-23-2015 |
20150245070 | IMAGE CODING METHOD AND IMAGE CODING APPARATUS - Image coding systems in recent years support a plurality of partitions about a transform unit size, prediction unit size, and coding unit size, which are processing units of transform, prediction, and coding, respectively. That is, combination of respective unit sizes is diverse. The present disclosure provides a method and apparatus for reducing a candidate number of partition sizes in an image and for reducing complexity in image coding by determining transform unit sizes and by setting prediction unit sizes and coding unit sizes based on the determined transform unit sizes. | 08-27-2015 |
20150341662 | IMAGE CODING APPARATUS, IMAGE CODING METHOD, AND IMAGE CODING SYSTEM - Prediction directions for cost calculation are reduced by preferentially selecting a direction in which a prediction pixel is generated by direct copy without filtering from among intra prediction directions to perform intra prediction. In addition to the roughly selected prediction direction, an amount of processing is reduced while deterioration of coding efficiency is prevented through comparison with preferentially selected prediction, such as DC prediction and planar prediction, and selection of second-stage prediction direction focused on a vicinity of roughly selected prediction direction. | 11-26-2015 |
Patent application number | Description | Published |
20080303163 | THROUGH SILICON VIA DIES AND PACKAGES - A method for preparing a die for packaging is disclosed. A die having first and second major surfaces is provided. Vias and a mask layer are formed on the first major surface of the die. The mask includes mask openings that expose the vias. The mask openings are filled with a conductive material. The method includes reflowing to at least partially fill the vias and contact openings to form via contacts in the vias and surface contacts in the mask openings. | 12-11-2008 |
20090072391 | Structurally-enhanced integrated circuit package and method of manufacture - A chip scale integrated circuit package includes an integrated circuit chip which has a first face and a second face. A plurality of pillar bumps are formed on the first face of the integrated circuit chip. An encapsulant material encapsulates the sides and the first face of the integrated circuit chip, and the pillar bumps. Upper ends of the pillar bumps remain free form encapsulant material and a substantially planar surface is formed by an upper surface of the encapsulant material and the upper ends of the pillar bumps. A plurality of solder balls are mounted on the substantially planar surface in locations corresponding to the upper ends of the pillar bumps. | 03-19-2009 |
20090236726 | PACKAGE-ON-PACKAGE SEMICONDUCTOR STRUCTURE - A semiconductor package that includes a substrate having first and second major surfaces is presented. The package includes a plurality of landing pads and a semiconductor die disposed on the first major surface. A molded cap is disposed on the first surface to encapsulate the die and substrate. The landing pads are covered when the cap is molded. Package interconnects are coupled to the landing pads. The package interconnects are exposed by the cap to facilitate package stacking. | 09-24-2009 |
20100013081 | PACKAGING STRUCTURAL MEMBER - A structural member for use in semiconductor packaging is disclosed. The structural member includes a plurality of packaging regions to facilitate packaging dies in, for example, a wafer format. A packaging region has a die attach region surrounded by a peripheral region. A die is attached to the die attach region. In one aspect, the die attach region has opening through the surfaces of the structural member for accommodating a die. Through-vias disposed are in the peripheral regions. The structural member reduces warpage that can occur during curing of the mold compound used in encapsulating the dies. In another aspect, the die attach region does not have an opening. In such cases, the structural member serves as an interposer between the die and a substrate. | 01-21-2010 |
20100261313 | SEMICONDUCTOR PACKAGE AND METHOD OF PACKAGING SEMICONDUCTOR DEVICES - A method of forming a device stack is presented. The method includes providing a temporary substrate having a temporary mounting surface. A first chip is temporarily mounted to the temporary mounting surface. A first bottom surface of the first chip is temporarily mounted to the temporary mounting surface and a first top surface of the first chip comprises first interconnects. A second chip is stacked on the first chip. The second chip includes second conductive contacts on the second bottom surface. The method also includes bonding the first and second chips together to form the device stack. The second conductive contacts are coupled to the first interconnects. The first bottom surface of the first chip is separated from the substrate to separate the chip stack from the substrate. | 10-14-2010 |
20120104628 | INTERPOSER FOR SEMICONDUCTOR PACKAGE - An interposer is presented. The interposer includes an interposer base having first and second surfaces. A redistribution layer is disposed on a first surface of the interposer base. The interposer has at least one interposer pad coupled to the redistribution layer. It also includes at least one interposer contact on the second surface. The interposer contact is electrically coupled to the interposer pad via the redistribution layer. The interposer also includes at least one interposer via through the interposer base for coupling the interposer contact to the redistribution layer. The interposer via includes reflowed conductive material of the interposer contact. | 05-03-2012 |
20130119560 | PACKAGING STRUCTURAL MEMBER - A structural member for use in semiconductor packaging is disclosed. The structural member includes a plurality of packaging regions to facilitate packaging dies in, for example, a wafer format. A packaging region has a die attach region surrounded by a peripheral region. A die is attached to the die attach region. In one aspect, the die attach region has opening through the surfaces of the structural member for accommodating a die. Through-vias disposed are in the peripheral regions. The structural member reduces warpage that can occur during curing of the mold compound used in encapsulating the dies. In another aspect, the die attach region does not have an opening. In such cases, the structural member serves as an interposer between the die and a substrate. | 05-16-2013 |
20140045301 | THROUGH SILICON VIA DIES AND PACKAGES - A method for preparing a die for packaging is disclosed. A die having first and second major surfaces is provided. Vias and a mask layer are formed on the first major surface of the die. The mask includes mask openings that expose the vias. The mask openings are filled with a conductive material. The method includes reflowing to at least partially fill the vias and contact openings to form via contacts in the vias and surface contacts in the mask openings. | 02-13-2014 |
20160005629 | PACKAGING STRUCTURAL MEMBER - A structural member for use in semiconductor packaging is disclosed. The structural member includes a plurality of packaging regions to facilitate packaging dies in, for example, a wafer format. A packaging region has a die attach region surrounded by a peripheral region. A die is attached to the die attach region. In one aspect, the die attach region has opening through the surfaces of the structural member for accommodating a die. Through-vias disposed are in the peripheral regions. The structural member reduces warpage that can occur during curing of the mold compound used in encapsulating the dies. In another aspect, the die attach region does not have an opening. In such cases, the structural member serves as an interposer between the die and a substrate. | 01-07-2016 |
Patent application number | Description | Published |
20140159114 | VERTICAL NANOWIRE BASED HETERO-STRUCTURE SPLIT GATE MEMORY - A memory cell is disclosed. The memory cell includes a vertical base disposed on a substrate. The vertical base includes first and second channels between top and bottom terminals. The memory cell also includes a first gate surrounding the first channel and a second gate surrounding the second channel. The first and second gates form a gate-all-around transistor of the memory cell. | 06-12-2014 |
20140194057 | PROXIMITY SENSING METHOD USING LOOPBACK MECHANISM AND WIRELESS COMMUNICATIONS DEVICE THEREOF - A proximity sensing method employed by a wireless communications device includes the steps of: performing a first predetermined operation to detect a presence of at least a transponder in the proximity of the wireless communications device; when the presence of a transponder in the proximity of the wireless communications device is not detected by the first predetermined operation, performing a second predetermined operation to obtain a first characteristic value and after a period of time, performing the second predetermined operation to obtain a second characteristic value sequentially; checking if the first characteristic value and the second characteristic value satisfy a predetermined criteria; and when the predetermined criterion is satisfied, performing the first predetermined operation again to check the presence of the transponder in the proximity of the wireless communications device. | 07-10-2014 |
20140218080 | METHOD AND SYSTEM FOR FAST SYNCHRONIZED DYNAMIC SWITCHING OF A RECONFIGURABLE PHASE LOCKED LOOP (PLL) FOR NEAR FIELD COMMUNICATIONS (NFC) PEER TO PEER (P2P) ACTIVE COMMUNICATIONS - A reconfigurable circuit is disclosed. The reconfigurable circuit comprises a pause detector mechanism, a clock extractor, and a multiplexer. The multiplexer is configured to receive a reference clock and is coupled to the clock extractor to receive a clock extracted from a carrier of a near field communication (NFC) field. The reconfigurable circuit also comprises a phase locked loop (PLL) coupled to the pause detector mechanism and the multiplexer, and the PLL can be configured in a first mode to be locked to the reference clock, in a second mode to be locked to the extracted clock, and in a third mode wherein the PLL can switch between being locked to the reference clock and being locked to the extracted clock. | 08-07-2014 |
20140323041 | METHOD FOR CONTROLLING A MODULATION INDEX OF A NEAR FIELD COMMUNICATION DEVICE WITH AID OF DYNAMIC CALIBRATION, AND ASSOCIATED APPARATUS - A method for controlling a modulation index of a near field communication (NFC) device includes: in a calibration mode of the NFC device, temporarily coupling a receiver of the NFC device to a transmitter of the NFC device to form a probing path between the receiver and the transmitter; and in the calibration mode of the NFC device, dynamically adjusting at least one portion of a plurality of modulation parameters corresponding to the modulation index according to probed results of outputs of the transmitter, in order to calibrate the modulation index, for use of transmitting through the transmitter in a normal mode of the NFC device. An associated apparatus is also provided. | 10-30-2014 |
20150054043 | SIMPLE AND COST-FREE MTP STRUCTURE - Non-volatile (NV) Multi-time programmable (MTP) memory cells are presented. The memory cell includes a substrate and first and second wells in the substrate. The memory cell includes first transistor having a select gate, second transistor having a floating gate adjacent to one another and on the second well, and third transistor having a control gate on the first well. The control gate is coupled to the floating gate and the control and floating gates include the same gate layer extending across the first and second wells. The transistors include first and second diffusion regions disposed adjacent to sides of the gates. The first and second diffusion regions include base lightly doped drain (LDD) and halo regions. One of the first and second diffusion regions of one of the second and third transistors includes second LDD and halo regions having higher dopant concentrations than the base LDD and halo regions. | 02-26-2015 |
20150137060 | HIGH RECTIFYING RATIO DIODE - Devices and methods for forming a device are disclosed. The device includes a substrate and a selector diode disposed over the substrate. The diode includes first and second terminals. The first terminal is disposed between the second terminal and the substrate. The diode includes a Schottky Barrier (SB) disposed at about an interface of the first and second terminals. The SB includes a tunable SB height defined by a SB region having segregated dopants. The device includes a memory element disposed over and coupled to the selector diode. | 05-21-2015 |
20150214238 | SIMPLE AND COST-FREE MTP STRUCTURE - Embodiments of a simple and cost-free multi-time programmable (MTP) structure for non-volatile memory cells are presented. The memory cell includes a substrate prepared with an isolation well, a HV well region and first and second wells disposed in the substrate. The memory cell further includes a first transistor having a select gate and a second transistor having a floating gate adjacent to one another and disposed over the second well. The transistors include first and second diffusion regions disposed adjacent to the sides of the gates. A control gate is disposed over the first well and coupled to the floating gate. The control and floating gates include the same gate layer extending across the first and second wells. The control gate includes a capacitor. | 07-30-2015 |
20150221663 | SIMPLE AND COST-FREE MTP STRUCTURE - Embodiments of a simple and cost-free multi-time programmable (MTP) structure for non-volatile memory cells are presented. The memory cell includes a substrate, a first transistor having a select gate and a second transistor having a floating gate. The select and floating gates are adjacent to one another and disposed over a transistor well. The transistors include first and second S/D regions disposed adjacent to the sides of the gates. A control gate is disposed over a control well. The control gate is coupled to the floating gate and includes a control capacitor. An erase terminal is decoupled from the control capacitor and transistors. | 08-06-2015 |
20150256224 | METHOD FOR CONTROLLING A MODULATION INDEX OF A NEAR FIELD COMMUNICATION DEVICE WITH AID OF DYNAMIC CALIBRATION, AND ASSOCIATED APPARATUS - A method for controlling a modulation index of a near field communication (NFC) device includes: in a calibration mode of the NFC device, coupling a receiver of the NFC device to a transmitter of the NFC device to form a probing path between the receiver and the transmitter; and in the calibration mode of the NFC device, adjusting at least one portion of a plurality of modulation parameters corresponding to the modulation index according to probed results of outputs of the transmitter, in order to calibrate the modulation index, for use of transmitting through the transmitter in a normal mode of the NFC device. An associated apparatus is also provided. | 09-10-2015 |
20150333103 | VERTICAL RANDOM ACCESS MEMORY WITH SELECTORS - Devices and methods for manufacturing a device are presented. The device includes a substrate and a vertical structure disposed over the substrate. The vertical structure includes one or more memory cell stacks with a dielectric layer between every two adjacent cell stacks. Each of the one or more cell stacks includes first and second first type conductors on first and second sides of the cell stack, respectively; first and second electrodes, the first electrode adjacent the first first type conductor, the second electrode adjacent the second first type conductor; and first and second memory elements, the first memory element disposed between the first first type conductor and the first electrode, the second memory element disposed between the second first type conductor and the second electrode. The device also includes a selector element disposed over the substrate and vertically traversing through a middle portion of the vertical structure. The selector element includes respective first and second selector diodes for the first and second memory elements of each of the one or more cell stacks. | 11-19-2015 |
20160028009 | RESISTIVE MEMORY DEVICE - A non-volatile memory device and a manufacturing method thereof are provided. The memory device includes a substrate, a lower cell dielectric layer with gate conductors and a body unit conductor disposed on the lower cell dielectric layer and gates. Memory element conductors are disposed on the body unit and lower cell dielectric layer. An upper cell dielectric layer may be on the substrate and over the lower cell dielectric layer, body unit conductor and memory element conductors. The upper cell dielectric layer isolates the memory element conductors. | 01-28-2016 |
20160079310 | SELECTOR-RESISTIVE RANDOM ACCESS MEMORY CELL - Memory devices and manufacturing methods thereof are presented. A memory device a substrate and a memory cell having at least one selector and a storage element. | 03-17-2016 |