Patent application number | Description | Published |
20110107010 | ONE-TIME PROGRAMMABLE MEMORY DEVICE AND METHODS THEREOF - A portion of a programmable memory device is configured as a one-time programmable (OTP) memory, where in response to a write access to the memory device, a memory controller determines whether the write access is associated with a memory location designated as an OTP memory location. If so, the memory controller performs a read of the memory location, and allows the write access only if each memory cell of the memory location is in an un-programmed state. Thus, only a single write access to an OTP memory location is permitted, and subsequent write attempts are disallowed. Further, to enhance detection of programmed cells, the read of the OTP memory location is performed with a lower read voltage than a read voltage associated with a write access to a non-OTP memory location, thereby improving detection of programmed memory cells in the OTP memory location. | 05-05-2011 |
20110107161 | THRESHOLD VOLTAGE TECHNIQUES FOR DETECTING AN IMMINENT READ FAILURE IN A MEMORY ARRAY - A technique for detecting an imminent read failure in a memory array includes determining whether a memory array, which does not exhibit an uncorrectable error correcting code (ECC) read during an initial array integrity check at a normal read verify voltage level, exhibits an uncorrectable ECC read during a subsequent array integrity check at a margin read verify voltage level. The technique also includes providing an indication of an imminent read failure for the memory array when the memory array exhibits an uncorrectable ECC read during the subsequent array integrity check. In this case, the margin read verify voltage level is different from the normal read verify voltage level. | 05-05-2011 |
20110167198 | NON-VOLATILE STORAGE ALTERATION TRACKING - A method for tracking alteration of a non-volatile storage includes receiving a request to modify a tracked region of the non-volatile storage. In response to the request, it is determined whether or not a modification of data stored in a non-erasable one-time programmable (NEOTP) alteration log region has occurred. In response to determining that the modification of the data stored in the NEOTP alteration log region has occurred, the tracked region of non-volatile storage is modified in response to the request. In response to determining that the modification of the data stored in the NEOTP alteration log region has not occurred, the request to modify the tracked region of the non-volatile memory is denied. | 07-07-2011 |
20110185146 | MULTIPLE ACCESS TYPE MEMORY AND METHOD OF OPERATION - A method for accessing a memory includes receiving a first address wherein the first address corresponds to a demand fetch, receiving a second address wherein the second address corresponds to a speculative prefetch, providing first data from the memory in response to the demand fetch in which the first data is accessed asynchronous to a system clock, and providing second data from the memory in response to the speculative prefetch in which the second data is accessed synchronous to the system clock. The memory may include a plurality of pipeline stages in which providing the first data in response to the demand fetch is performed such that each pipeline stage is self-timed independent of the system clock and providing the second data in response to the speculative prefetch is performed such that each pipeline stage is timed based on the system clock to be synchronous with the system clock. | 07-28-2011 |
20140189462 | ERROR CORRECTING DEVICE, METHOD FOR MONITORING AN ERROR CORRECTING DEVICE AND DATA PROCESSING SYSTEM - An error correcting device is provided that has an input connectable to receive one or more data units, an error detection module arranged to identify a presence of one or more errors in a received data unit of the one or more data units and to provide an error detection signal for the received data unit, an error correction module arranged to perform an error correction processing on the received data unit and provide a corrected data unit, and a correction evaluation module arranged to perform a comparison of the received data unit with the corrected data unit and to generate a correction error signal depending on a result of the comparison and the error detection signal. | 07-03-2014 |
Patent application number | Description | Published |
20080286989 | Connector for an Electrical Circuit Embedded in a Composite Structure - According to one embodiment, a connector for a composite structure includes at least one conducting element that is coupled to a node of an electrical circuit embedded in a composite structure. The composite structure has two opposing surfaces in which the conducting element is disposed essentially between the surfaces of the composite structure. | 11-20-2008 |
20090188904 | Fault Tolerant Heater Circuit - In one embodiment, a heater circuit includes a number of groups which each include a number of resistive elements arranged in an electrically parallel circuit that are coupled between two power terminals in a series circuit. Each resistive element is disposed on the surface of a structure and physically parallel to other resistive elements in the group and to resistive elements in other groups. The width and/or thickness of the resistive elements may be varied to control the heat generated in particular regions. | 07-30-2009 |
20090192757 | Apparatus for Measuring Surface Temperature Using Embedded Components - In one embodiment, a temperature sensing apparatus includes two temperature sensors that are disposed at differing depths from a surface and a measurement circuit that is coupled to the temperature sensors. The measurement circuit is operable to calculate the temperature of the surface based on a first temperature of one temperature sensor with a second temperature of the other temperature sensor. | 07-30-2009 |
20110080712 | Connector for an Electrical Circuit Embedded in a Composite Structure - According to one embodiment, a connector for a composite structure includes at least one conducting element that is coupled to a node of an electrical circuit embedded in a composite structure. The composite structure has two opposing surfaces in which the conducting element is disposed essentially between the surfaces of the composite structure. | 04-07-2011 |