Shih, Hsinchu City
Bing Huang Shih, Hsinchu City TW
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20150029635 | LOW COST ELECTRICAL STAMP - A low cost electrical stamp is provided in the present invention. The low cost electrical stamp includes a magnetic cylinder matrix, a print circuit board (PCB), a control circuit and an interface circuit. The magnetic cylinder matrix includes a plurality of magnetic cylinders. The PCB includes a plurality of electromagnets whose positions are corresponding to the positions of the magnetic cylinders. The control circuit is coupled to the electromagnets of the PCB to control the magnetic field direction of the electromagnets. The interface circuit is coupled to the control circuit to couple to a computing device. When the low cost electrical stamp is coupled to the computing device through the interface circuit, the computing device programs the control circuit by a diagram. The control circuit magnetizes the electromagnets to change the positions of the magnetic cylinders according to the diagram. | 01-29-2015 |
20150045990 | ACTIVE THREE-DIMENSIONAL POSITIONING DEVICE AND CONTROL SYSTEM FOR FLOOR-CLEANING ROBOT THEREOF - An active three-dimensional positioning device and a control system for floor-cleaning robot are provided in the present invention. The active three dimension positioning device includes a radio frequency (RF) receiver array, a radio frequency emitter and a control circuit. The RF receiver array includes a plurality of RF receivers for receiving a RF pulse. The RF emitter is used for emitting a RF pulse. The control circuit is coupled to the RF receivers. The control circuit transmits a transmission command to the RF emitter, after the RF emitter receives the enable RF signal, and the RF emitter emits the RF pulse. The control circuit calculates the position between the RF receiver array and the RF emitter according to the positions of the RF receivers and the time when each of the RF receivers receives the RF pulse. | 02-12-2015 |
20150046002 | SELF-BALANCE MOBILE CARRIER - A self-balance mobile carrier is provided in the present invention. The self-balance mobile carrier includes a first direction load cell, a second direction load cell, a third direction load cell, a fourth direction load cell, a motion apparatus and a control circuit. Each of the load cells respective include a pressure-sensing plane and an electrical signal output terminal, for respectively converting the pressure on the pressure-sensing plane to an electrical signal and outputting the electrical signal to the electrical signal output terminal. The control circuit is coupled to the electrical signal output terminals of the first, second, third, and fourth direction load cells and the motion apparatus. The control circuit changes the moving direction of the motion apparatus according to the difference of the electrical signals of the first, second, third, and fourth direction load cells. | 02-12-2015 |
Cheng-Yi Shih, Hsinchu City TW
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20140060201 | MEASURING DEVICE AND OPERATION METHOD THEREOF - A measuring device linked to a conveyor for transporting a flexible glass is provided. The measuring device includes a base, a first roller, and at least one second roller. The first roller disposed on the base moves back and forth along a first axis. The second roller disposed on the base moves back and forth along a second axis. The flexible glass enters the conveyor passing through the second roller and the first roller. An operation method of the measuring device is also provided. | 03-06-2014 |
Chia-Hsing Shih, Hsinchu City TW
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20130205908 | MEMS PRESSURE SENSOR DEVICE AND MANUFACTURING METHOD THEREOF - The present invention discloses a Micro-Electro-Mechanical System (MEMS) pressure sensor device and a manufacturing method thereof. The MEMS pressure sensor device includes: a substrate having at least one recess formed on an upper surface thereof, the recess defining a boss; a membrane, which is bonded to at least a part of the upper surface and at least a part of the boss, so that the at least one recess forms a cavity; at least one sensing unit, which is coupled to the membrane, for sensing deflection of the membrane; and an opening, which is formed on a lower surface of the substrate, and connects to the cavity. | 08-15-2013 |
Chieh-Wen Shih, Hsinchu City TW
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20120272080 | Multi-Core Electronic System and Associated Rate Adjustment Device - A multi-core electronic system for accessing a data storage device includes a plurality of processors, a data transmission interface and a rate adjustment module. The processors respectively provide a bandwidth requirement, and communicate with the data storage device via the shared data transmission interface. The rate adjustment module receives the bandwidth requirements, and determines a transmission rate of the data transmission interface according to the bandwidth requirements. | 10-25-2012 |
Chien-Chia Shih, Hsinchu City TW
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20120194532 | CONTROL METHOD FOR BI-STABLE DISPLAYING, TIMING CONTROLLER, AND BI-STABLE DISPLAY DEVICE WITH SUCH TIMING CONTROLLER - A control method for bi-stable displaying is provided, using queues for storing coordinates to achieve pipeline parallel processing on display data, thereby increasing display speed. In a preceding stage of the display process, because a plurality of queues may be used for temporarily storing part of the display data which is then reconstructed into complete display data to update a current frame buffer, comparing pixel data and generating driving data can be simultaneously preformed upon a plurality of line segments. Moreover, in a succeeding stage of the display process, a similar process may be performed to update a previous frame buffer, so access time can be reduced and errors caused by overlapping image blocks can also be avoided. Furthermore, the method may be also applied to a timing controller and a bi-stable display device. | 08-02-2012 |
20120206467 | DRIVING METHOD FOR BISTABLE DISPLAY DEVICE AND DRIVING DEVICE THEREOF - A driving method adapted to a bistable display including a display panel is provided. The driving method includes following steps. A first area data and a second area data respectively received are sequentially stored in a first queue and a second queue, respectively. A first area image corresponding to the first area data and a second area image corresponding to the second area data are sequentially calculated. The first area image is displayed on the display panel during a first frame period of a first period, and the second area image is displayed on the display panel during a second first frame period of the first period. After the first period, the first area image on the display panel is in a stable state. After a summation time of first period and the second frame period, the second area image on the display panel is in a stable state. | 08-16-2012 |
20120299904 | APPARATUS AND METHOD FOR DRIVING DISPLAY - An apparatus for driving a display includes a shift register, a first latch unit, a second latch unit, a data comparison unit and a level select unit. The shift register generates multiple latch signals according to a sync signal. The first latch unit latches a data signal in response to the latch signals to obtain multiple first data corresponding to multiple channels. The second latch unit is coupled to the first latch unit and latches the first data of the channels as multiple second data in response to a latch data signal. The data comparison unit responds to the latch data signal to respectively compare the first data and the second data corresponding to the same channel to output multiple third data corresponding to the channels. The level select unit selects multiple voltage levels corresponding to the channels according to the third data. | 11-29-2012 |
Chih-Chao Shih, Hsinchu City TW
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20130266038 | APPARATUS AND METHOD FOR MEASURING THERMAL DIFFUSIVITY - An apparatus for measuring thermal diffusivity includes a Raman spectroscope, a heating device, and a signal analyzing unit. The Raman spectroscope is utilized to measure a Raman scattering intensity of different sites of a film to be measured. The heating device is utilized to provide a controllable thermal driving wave. The signal analyzing unit is utilized to analyze the Raman scattering intensity from the Raman spectroscope and the thermal driving wave so as to evaluate the thermal diffusivity of the film to be measured. | 10-10-2013 |
20140166065 | STRUCTURE OF THERMOELECTRIC FILM - A structure of a thermoelectric film including a thermoelectric substrate and a pair of first diamond-like carbon (DLC) layers is provided. The first DLC layers are respectively located on two opposite surfaces of the thermoelectric substrate and have electrical conductivity. | 06-19-2014 |
20160005943 | STRUCTURE OF THERMOELECTRIC FILM - A structure of a thermoelectric film including a thermoelectric substrate and a pair of first diamond-like carbon (DLC) layers is provided. The first DLC layers are respectively located on two opposite surfaces of the thermoelectric substrate and have electrical conductivity. | 01-07-2016 |
Chih-Chung Shih, Hsinchu City TW
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20100128059 | Decompression system and method for DCT-base compressed graphic data with transparent attribute - A decompression system for DCT-base compressed graphic data with transparent attribute includes a memory to store a compressed graphic data and a compressed mask data; a controller to read the compressed graphic data and the compressed mask data out of the memory; a first decompressor to decompress the compressed graphic data and generate a first color space image signal; a color space transformation device to transform the first color space image signal into a second color space image signal; a special color signal storage to store a plurality of special color signals; a second decompressor to decompress the compressed mask data and generate a select signal; and a first multiplexer to select the second color space image signal or a special color signal to output based on the select signal, wherein each special color signal indicates a different level of transparent attribute. | 05-27-2010 |
Chih-Tsung Shih, Hsinchu City TW
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20090010587 | ELECTRO-OPTICAL MODULATOR WITH CURVING RESONANTOR - An electro-optical modulator includes a structural substrate, having an insulating layer on top. A waveguide layer, disposed on the insulating layer. A curving resonant MOS device, disposed on the insulating layer and having an optical coupling region with the waveguide layer. | 01-08-2009 |
20090290273 | LIGHT-EMITTING DIODE PACKAGE HAVING ELECTROSTATIC DISCHARGE PROTECTION FUNCTION AND METHOD OF FABRICATING THE SAME - A light-emitting diode (LED) package having electrostatic discharge (ESD) protection function and a method of fabricating the same adopt a composite substrate to prepare an embedded diode and an LED, and use an insulating layer in the composite substrate to isolate some individual embedded diodes, such that the LED device has the ESD protection. | 11-26-2009 |
20090317033 | INTEGRATED CIRCUIT AND PHOTONIC BOARD THEREOF - An integrated circuit (IC) including at least a first and a second logical blocks and a photonic board is provided. The photonic board connects with the first and the second logical blocks through a eutectic bonding technology, and communicates at least a logical signal of the first logical block to the second logical block by light conduction. | 12-24-2009 |
20100084958 | LED Structure, Manufacturing Method Thereof and LED Module - A light emitting diode (LED) structure, a manufacturing method thereof and a LED module are provided. The LED structure has temperature sensing function. The LED structure comprises a composite substrate and an LED. The composite substrate comprises a diode structure whose P-type semiconductor region or N-type semiconductor region has a predetermined doping concentration. The diode structure is a temperature sensor, and the sensitivity of the temperature sensor is based on the predetermined doping concentration. The LED is disposed on the composite substrate. The diode structure is used for sensing the heat emitted from the LED. | 04-08-2010 |
20110223590 | SINGLE-MOLECULE DETECTION SYSTEM AND METHODS - Embodiments encompass a single-molecule detection system and methods of using the detection system to detect an object. Further, embodiments encompass a detection system comprising a movable light coupler, a waveguide, and a light detector. Embodiments further encompass methods of single-molecule detection, including methods of single-molecule nucleic acid sequencing. | 09-15-2011 |
20110280511 | BONDING SYSTEM FOR OPTICAL ALIGNMENT - A bonding system and a bonding method for alignment are provided. An optical semiconductor includes a light source and a plurality of protruded elements on a surface thereof. A semiconductor bench includes a light receiving element and a plurality of recess elements on a surface thereof. A sidewall of the protruded elements or a sidewall of the recess elements is slanted. A first metallized layer is disposed on a bonding surface of each protruded element and a second metallized layer is disposed on a bottom surface of each recess element, wherein the first metallized layer is used for bonding with the second metallized layer. | 11-17-2011 |
20110306039 | Apparatus for single-molecule detection - An apparatus for detecting an object capable of emitting light. The apparatus comprises a light source and a waveguide. The waveguide comprises a core layer and a first cladding layer. At least one nanowell is formed in at least the first cladding layer. The apparatus further comprises a light detector. The light detector can detect a light emitted from a single molecule object contained in the at least one nanowell. | 12-15-2011 |
20110306143 | Apparatus for single-molecule detection - An apparatus for detecting an object capable of emitting light. The apparatus includes a light source and a waveguide. The waveguide includes a core layer and a first cladding layer. At least one nanowell is formed in at least the first cladding layer. The apparatus further includes a light detector. The light detector can detect a light emitted from a single molecule object contained in the at least one nanowell. | 12-15-2011 |
20120219897 | PHOTORESIST HAVING IMPROVED EXTREME-ULTRAVIOLET LITHOGRAPHY IMAGING PERFORMANCE - Provided is a photoresist that includes a polymer is free of a aromatic group and a photo acid generator (PAG) that has less than three aromatic groups. In an embodiment, the PAG includes an anion component and a cation component. The anion component has one of the following chemical formulas: | 08-30-2012 |
20130280643 | REFLECTIVE MASK AND METHOD OF MAKING SAME - A reflective mask is described. The mask includes a low thermal expansion material (LTEM) substrate, a conductive layer deposited on a first surface of the LTEM substrate, a stack of reflective multilayers (ML) deposited on a second surface of the LTEM substrate, a capping layer deposited on the stack of reflective ML, a first absorption layer deposited on the first capping layer, a main pattern, and a border ditch. The border ditch reaches to the capping layer, the second absorption layer deposited inside the border ditch, and the second absorption layer contacts the capping layer. | 10-24-2013 |
20140038086 | Phase Shift Mask for Extreme Ultraviolet Lithography and Method of Fabricating Same - A mask and method of fabricating same are disclosed. In an example, a mask includes a substrate, a reflective multilayer coating disposed over the substrate, an Ag | 02-06-2014 |
20140272678 | Structure and Method for Reflective-Type Mask - The present disclosure provides an embodiment of a reflective mask that includes a substrate; a reflective multilayer formed on the substrate; a capping layer formed on the reflective multilayer and having a hardness greater than about 8; and an absorber layer formed on the capping layer and patterned according to an integrated circuit layout. | 09-18-2014 |
20140272682 | Extreme Ultraviolet Lithography Process and Mask - The present disclosure is directed towards an extreme ultraviolet (EUV) mask. The EUV mask includes a low thermal expansion material (LTEM) substrate. The EUV mask has a first region and a second region. The EUV mask also includes a structure disposed in the first region. The structure has a multiple facets with an angle to each other. The EUV mask also includes a conformal reflective multilayer (ML) disposed over the structure in the first region and over the LTEM substrate in the second region. The conformal reflective ML has a similar surface profile as the structure in the first region and a flat surface profile in the second region. | 09-18-2014 |
20140342272 | Method to Define Multiple Layer Patterns With a Single Exposure by E-Beam Lithography - The present disclosure provides a method that includes forming a first resist layer on a substrate; forming a second resist layer over the first resist layer; and performing an electron-beam (e-beam) lithography exposure process to the first resist layer and the second resist layer, thereby forming a first latent feature in the first resist layer and a second latent feature in the second resist layer. | 11-20-2014 |
20140342564 | Photomask With Three States For Forming Multiple Layer Patterns With A Single Exposure - The present disclosure provides one embodiment of a mask for a lithography exposure process. The mask includes a mask substrate; a first mask material layer patterned to have a first plurality of openings that define a first layer pattern; and a second mask material layer patterned to have a second plurality of openings that define a second layer pattern. | 11-20-2014 |
20140367589 | Apparatus For Single-Molecule Detection - An apparatus for detecting an object capable of emitting light. The apparatus includes a light source and a waveguide. The waveguide includes a core layer and a first cladding layer. At least one nanowell is formed in at least the first cladding layer. The apparatus further includes a light detector. The light detector can detect a light emitted from a single molecule object contained in the at least one nanowell. | 12-18-2014 |
20150024305 | EXTREME ULTRAVIOLET LIGHT (EUV) PHOTOMASKS AND FABRICATION METHODS THEREOF - Embodiments of EUV photomasks and methods for forming a EUV photomask are provided. The method comprises providing a substrate, a reflective layer, a capping layer, a hard mask layer, and forming an opening therein. An absorber layer is then filled in the opening and over the top surface of the hard mask layer. A removing process is provided to form an absorber with a top surface lower than a top surface of the capping layer. | 01-22-2015 |
20150037712 | Extreme Ultraviolet (EUV) Mask, Method Of Fabricating The EUV Mask And Method Of Inspecting The EUV Mask - An out-of-band (OoB) suppression layer is applied on a reflective multiplayer (ML) coating, so as to avoid the OoB reflection and to enhance the optical contrast at 13.5 nm A material having a low reflectivity at wavelength of 193-257 nm, for example, silicon carbide (SiC), is used as the OoB suppression layer. A method of fabricating an EUV mask having the OoB suppression layer and a method of inspecting an EUV mask having the OoB suppression are also provided. | 02-05-2015 |
20150064611 | Extreme Ultraviolet (Euv) Mask And Method Of Fabricating The Euv Mask - A Cu-containing material is provided as an absorber layer of an EUV mask. With the absorber layer of the Cu-containing material, the same lithography performance of a conventional absorber in 70 nm thickness of TaBN can be achieved by only a 30-nm thickness of the absorber layer according to the various embodiments of the present disclosure. Furthermore, the out-off-band (OOB) flare of the radiation light in 193-257 nm can be reduced so as to achieve the better lithography performance. | 03-05-2015 |
20150069622 | Via Definition Scheme - A method includes defining a metal pattern layer over a first dielectric layer. The first dielectric layer is disposed over an etch stop layer and the etch stop layer is disposed over a second dielectric layer. A spacer layer is grown over the metal pattern layer and the first dielectric layer. A metal trench is formed with a metal width in the first dielectric layer. A via hole is formed with a via width in the second dielectric layer. | 03-12-2015 |
20150104734 | Extreme Ultraviolet Lithography Process and Mask - A system of an extreme ultraviolet lithography (EUVL) is disclosed. The system includes a mask having first and second reflective regions. The system also includes an illumination to expose the mask to produce a resultant reflected light form the mask. The resultant reflected light is constructed by a first reflected light reflected from the first reflective region and a second reflected light reflected from the second reflective region. The resultant reflected light contains mainly diffracted light. The system also a projection optics box (POB) to collect and direct resultant reflected light to expose a target. | 04-16-2015 |
20150104736 | REFLECTIVE MASK AND METHOD OF MAKING SAME - A reflective mask is described. The mask includes a low thermal expansion material (LTEM) substrate, a conductive layer deposited on a first surface of the LTEM substrate, a stack of reflective multilayers (ML) deposited on a second surface of the LTEM substrate, a capping layer deposited on the stack of reflective ML, a first absorption layer deposited on the first capping layer, a main pattern, and a border ditch. The border ditch reaches to the capping layer, a second absorption layer deposited inside the border ditch, and where the second absorption layer contacts the capping layer. In some instances, the border ditch crosses the capping layer and partially enters the reflective multilayer. | 04-16-2015 |
20150138524 | Extreme Ultraviolet Lithography Process and Mask - A system of an extreme ultraviolet lithography (EUVL) is disclosed. The system includes a mask having reflective phase-shift-grating-blocks (PhSGBs). The system also includes an illumination to expose the mask to produce a resultant reflected light from the mask. The resultant reflected light contains mainly diffracted lights. The system also has projection optics to collect and direct resultant reflected light to expose a target. | 05-21-2015 |
20150200130 | METHOD FOR FORMING DIFFERENT PATTERNS IN A SEMICONDUCTOR STRUCTURE USING A SINGLE MASK - The present disclosure provides a method for forming an integrated circuit (IC) structure. The method comprises providing a semiconductor structure including a substrate, a dielectric layer formed over the substrate, and a hard mask region formed over the dielectric layer; forming a first photoresist layer over the hard mask region; performing a first lithography exposure using a photomask to form a first latent pattern; forming a second photoresist layer over the hard mask region; and performing a second lithography exposure using the photomask to form a second latent pattern. The photomask includes a first mask feature and a second mask feature. The first latent pattern corresponds to the first mask feature, and the second latent pattern corresponds to the first mask feature and the second mask feature. | 07-16-2015 |
20150261082 | Structure and Method for Reflective-Type Mask - A reflective mask includes a substrate; a reflective multilayer formed on the substrate; an absorber layer formed on the reflective multilayer, wherein the absorber layer is patterned to have openings according to an integrated circuit layout; and a protection layer formed over the reflective multilayer within the openings. | 09-17-2015 |
20150286138 | Photoresist Having Improved Extreme-Ultraviolet Lithography Imaging Performance - Provided herein is a photoresist compound with improved extreme-ultraviolet lithography image performance. The photoresist includes a polymer that is free of an aromatic group and a photo acid generator (PAG) free of aromatic groups. The PAG includes an anion component and a cation component, wherein the anion component has one of the several specified chemical formulas and the cation component also has a specified chemical formula. The anion component includes a material selected from the group consisting of methyl and ethyl and the cation component includes a material selected from the group consisting of: an alkyl group, an alkenyl group, and an oxoalkyl group. | 10-08-2015 |
20150287596 | Method to Define Multiple Layer Patterns with a Single Exposure by Charged Particle Beam Lithography - The present disclosure provides a method that includes forming a first patternable material layer on a substrate; forming a second patternable material layer over the first patternable material layer; and performing a charged particle beam lithography exposure process to the first patternable material layer and the second patternable material layer, thereby forming a first latent feature in the first patternable material layer and a second latent feature in the second patternable material layer. | 10-08-2015 |
20150309405 | METHOD OF MAKING AN EXTREME ULTRAVIOLET PELLICLE - The present disclosure relates to a method of forming an EUV pellicle having an pellicle film connected to a pellicle frame without a supportive mesh, and an associated apparatus. In some embodiments, the method is performed by forming a cleaving plane within a substrate at a position parallel to a top surface of the substrate. A pellicle frame is attached to the top surface of the substrate. The substrate is cleaved along the cleaving plane to form a pellicle film comprising a thinned substrate coupled to the pellicle frame. Prior to cleaving the substrate, the substrate is operated upon to reduce structural damage to the top surface of substrate during formation of the cleaving plane and/or during cleaving the substrate. Reducing structural damage to the top surface of the substrate improves the durability of the thinned substrate and removes a need for a support structure for the pellicle film. | 10-29-2015 |
20150311075 | Method for Integrated Circuit Patterning - Provided is a method of patterning a substrate. The method includes forming a resist layer over the substrate, wherein a layer of resist scum forms in between a first portion of the resist layer and the substrate. The method further includes patterning the resist layer to form a plurality of trenches in the first portion, wherein the layer of resist scum provides a floor for the plurality of trenches. The method further includes forming a first material layer in the plurality of trenches, wherein the first material layer has a higher etch resistance than the resist layer and the layer of resist scum. The method further includes etching the first material layer, the resist layer, and the layer of resist scum, thereby forming a patterned first material layer over a patterned layer of resist scum over the substrate. | 10-29-2015 |
20150318173 | Method of Semiconductor Integrated Circuit Fabrication - A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A dielectric layer is formed over a substrate. An interlayer is formed over the dielectric layer. A first photoresist layer with a first opening is formed over the interlayer and a second photoresist layer having a second opening is formed over the first photoresist layer. Spacers are formed along sidewalls of the first opening and the second opening. A first trench is formed in the interlayer by using the spacer along the first opening as an etch mask. A second trench is formed in the interlayer by using the spacer along the second opening as an etch mask. The first trench and the second trench are extended down into the dielectric layer as a lower portion and an upper portion, respectively, of a dielectric trench. | 11-05-2015 |
20160064239 | Method for Integrated Circuit Patterning - Provided is a method of patterning a substrate. The method includes patterning a resist layer formed over the substrate to result in a resist pattern and treating the resist pattern with an ion beam. The ion beam is generated with a gas, such as CH | 03-03-2016 |
20160064240 | Method for Integrated Circuit Patterning - A method includes forming a resist over a substrate, resulting in a layer of resist scum between the resist and the substrate. The method further includes forming trenches in the resist, wherein at least a portion of the layer of resist scum remains between the trenches and the substrate. The method further includes forming a first material layer in the trenches, wherein the first material layer has a higher etch resistance than the resist in an etching process. The method further includes performing the etching process to the first material layer, the resist, and the layer of resist scum, thereby forming a patterned first material layer over a patterned layer of resist scum over the substrate. | 03-03-2016 |
20160109798 | METHOD OF MAKING AN EXTREME ULTRAVIOLET PELLICLE - The present disclosure relates to a method of forming an extreme ultraviolet (EUV) pellicle having an pellicle film connected to a pellicle frame without a supportive mesh, and an associated apparatus. In some embodiments, the method is performed by forming a cleaving plane within a substrate. A pellicle frame is attached to an upper surface of the substrate, and the substrate is cleaved along the cleaving plane to form a pellicle film attached to the pellicle frame. The method forms the pellicle without using a support structure, which may block EUV radiation and cause substantial non-uniformities in the intensity of EUV radiation incident on an EUV reticle. | 04-21-2016 |
Chih-Yung Shih, Hsinchu City TW
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20120327790 | APPARATUSES AND METHODS FOR COORDINATING CIRCUIT SWITCHED (CS) SERVICES IN PACKET TRANSFER MODE (PTM) - A wireless communications device is provided with a baseband chip capable of coordinating operations between circuit-switched (CS) and packet-switched (PS) services with different subscriber identity cards. The baseband chip is configured to perform a packet switched (PS) data service associated with a second service network, sacrifice a portion of data transceiving from/to the second service network to monitor a channel associated with a first service network during the PS data service, so as to receive message from the first service network or maintain mobility in the first service network. | 12-27-2012 |
20130252614 | METHODS FOR PREFERABLY CAMPING ON AND STAYING IN A CELL BELONGING TO A HIGH DATA TRANSMISSION THROUGHPUT RAT AND COMMUNICATIONS APPARATUSES UTILIZING THE SAME - A communications apparatus includes a processor coupled to at least one RF transceiver and at least one baseband processing device and capable of communicating with a first wireless network belonging to a first RAT and a second wireless network belonging to a second RAT having a higher data transmission throughput than the first RAT. A first processor logic unit of the processor performs an enhanced cell search procedure via the RF transceiver to find one or more cell(s) belonging to the second RAT having stronger signal strength and/or better signal quality than a predetermined threshold, which are not included in a broadcast neighbor cell list. A second processor logic unit of the processor determines a suitable cell from among the cell(s) and performs a cell reselection procedure to camp on the suitable cell. | 09-26-2013 |
Ching Chang Shih, Hsinchu City TW
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20110191488 | NETWORK MEDIA PROCESSING DEVICE AND NETWORK MEDIA DISPLAY SYSTEM - A network media processing device includes a network connection module and a graphics processor. The network connection module is electrically connected to the graphics processor directly. The network connection module is used for connecting to a local area network (LAN). Through the LAN, a host may transmit or broadcast digital image data to the network connection module. The network media processing device can receive media data transmitted by the network with a very simple hardware construction. Therefore, the use convenience can be greatly improved when media data is transmitted using a LAN. | 08-04-2011 |
20110210975 | MULTI-SCREEN SIGNAL PROCESSING DEVICE AND MULTI-SCREEN SYSTEM - A multi-screen signal processing device includes a main graphics processor and a plurality of sub-graphics processors. The main graphics processor is electrically connected to the plurality of sub-graphics processors respectively. The main graphics processor is used for receiving an external image data, and capable of decoding the external image data and outputting a frame data. Each sub-graphics processor respectively captures a part of the frame data synchronously and outputs a broadcasting signal. The multi-screen signal processing device may be connected to multiple screens to play multiple images at the same time. Moreover, the decoding step using a single graphics processor enables easy synchronization of frames displayed on different screens and saves energy consumed by repeating the decoding step. | 09-01-2011 |
20110285728 | IMAGE PROCESSING DEVICE AND IMAGE SIGNAL PROCESSING SYSTEM - An image signal processing system is presented, which includes a computer, a master image processing device, and at least one slave image processing device. The master image processing device is used for receiving an image signal. The master image processing device includes a master signal conversion device and a master signal output device. The master signal conversion device is used for converting the image signal into an instruction signal, and the master signal output device is used for outputting the instruction signal. The slave image processing device includes a slave signal input device, a slave signal conversion device, and a GPU. The slave signal input device is used for receiving the instruction signal. The slave signal conversion device is used for selectively converting the instruction signal into an image signal according to the instruction signal. The GPU is used for receiving the image signal and generating a broadcasting signal. | 11-24-2011 |
Ching-Wei Shih, Hsinchu City TW
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20150114470 | FLOW CONTROL DEVICE AND THE METHOD FOR CONTROLLING THE FLOW THEREOF - The flow control device is provided and the method for controlling the flow. A flow control device comprises: a body including a first end, opposite second end, a first flow channel and a second flow channel, a plug and a laminar flow layer accommodated in the second flow channel; a telescopic device accommodated the length of the telescopic device is adjustable, so as to control the flow of fluid flowing through the opening area in the body. | 04-30-2015 |
20150120131 | COMMUNICATION SYSTEM BETWEEN ELECTRIC BIKES AND COMMUNICATION METHOD THEREOF - The present invention provides a communication system between electric bikes and communication method thereof. The communication system comprises a plurality of electric bikes. Each of the electric bikes comprises a monitor module and a portable electric device, wherein the portable device further comprises a storing unit and a WiFi module. The monitor module is configured to monitor the status of the electric bike to generate a plurality of monitor information. When a temporary network is formed between the electric bikes, the electric bikes transmit the monitor information each other through the temporary network and each of the electric bikes stores the received monitor information. | 04-30-2015 |
Chin-Ming Shih, Hsinchu City TW
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20120127730 | LENS-HOLDING-AND-ALIGNING SEAT AND LED LIGHT PANEL THEREOF - A lens-holding-and-aligning seat and an LED light panel thereof are presented. The light panel includes a substrate, an LED, a lens and a holding-and-aligning seat. The LED is disposed on the substrate in corresponding to a soldering pad of the substrate, and the holding-and-aligning seat has a holding portion and an aligning element. The lens is fixed on the holding-and-aligning seat by the holding portion, and the aligning element is bonded on the soldering pad corresponding to the soldering pad by a reflow process. Therefore, the lens is aligned with the LED by a soldering self-alignment mechanism, such that the light shape and light intensity distribution of the light emitted by the LED may be adjusted by the lens. | 05-24-2012 |
20130140078 | ELECTRONIC DEVICE AND JOINT - An electronic device and a joint are provided. The electronic device includes a casing, an electronic element and the joint. The casing has a cable hole. The electronic element is disposed inside the casing. The joint includes a body, a waterproof and breathable film and a fastener. The body is fixed to the cable hole and has a breathable channel. The waterproof and breathable film is disposed at the breathable channel. The fastener is used for fastening a power cable to the body. The power cable passes through the fastener and the body and electrically connects the electronic element. The joint, a power cable and the casing form a waterproof and breathable chamber. | 06-06-2013 |
Chin-Te Shih, Hsinchu City TW
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20100213054 | VACUUM COATING APPARATUS WITH MUTIPLE ANODES AND FILM COATING METHOD USING THE SAME - A vacuum coating apparatus is disclosed. The apparatus includes a cathode target, a plurality of anodes, a transiting device, a pulsed arc discharge device, and a pulsed laser device. The plurality of anodes is placed on the transiting device and successively passes though a working position by the transiting device. The pulsed arc discharge device is electrically connected to the cathode target and the anode at the operable position to form plasma in a vacuum chamber for film coating. The pulsed laser device is located outside of the vacuum chamber and provides a pulsed laser beam onto the surface of the cathode surface to serve as a plasma trigger. A coating method for the vacuum coating apparatus is also disclosed. | 08-26-2010 |
Da-Yuan Shih, Hsinchu City TW
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20150108206 | INDIRECT PRINTING BUMPING METHOD FOR SOLDER BALL DEPOSITION - Some embodiments of the present disclosure relate to an apparatus and method to form a pattern of solder bumps. A solder paste is applied a plate comprising a pattern of holes, where each hole is partially filled by a piston attached to a movable stage. The remainder of the holes are filled by applying a force to the solder paste with a first solder paste application tool. A second solder paste application tool then removes excess paste from the front surface of the plate. The solder paste is then disposed onto a surface of a substrate by moving the movable stage, which fills a larger portion of each hole with a piston, forces the solder paste out of each hole, and forms pattern of solder paste on the surface of the substrate. The pattern of solder paste is then subjected to additional processing to form a pattern of solder bumps. | 04-23-2015 |
Fu-Ming Shih, Hsinchu City TW
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20090082677 | EXERCISE ASSISTING DEVICES - An exercise assisting device comprising a detector configured to detect at least one physiological data of a user, a control module configured to convert the at least one physiological data into at least one index in accordance with an algorithm, each of the at least one index being representative of an exercise performance level, a memory module including a first section configured to store a number of predetermined data related to a number of exercise performance levels, a second section configured to store the at least one index, and a third section configured to store the algorithm, and a display module configured to display at least one of the number of predetermined data in accordance with the at least one index. | 03-26-2009 |
Fu Yang Shih, Hsinchu City TW
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20090315507 | Photovoltaic Circuit - A photovoltaic circuit configured to supply an output current to a tank module is provided. The photovoltaic circuit comprises a photovoltaic transformation module, a first process module, a plurality of second process modules, and a first control module. The process modules are connected to each other in parallel. The process modules in the parallel connection are connected to the photovoltaic transformation module and the tank module in series. The first control module is connected to the first process module and generates a control signal to the process modules in response to a divided current, a modulation current, and a last output current generated by the first process module. Thereby, the process modules interlacedly output the corresponding modulation current as the output current supplied to the energy reserve module. | 12-24-2009 |
20110074799 | SCAN-TYPE DISPLAY DEVICE CONTROL CIRCUIT - A scan-type display device control circuit is suitable for receiving successive frame data and driving a light-emitting diode (LED) display device accordingly. The scan-type display device control circuit includes a ping-pong buffer, a data storage controller, a line scan controller, a display buffer, and a scrambled pulse width modulation (PMW) signal generating device. The scan-type display device control circuit can utilize frame data circularly and repeatedly, so as to prevent a great mass of data from being transmitted repeatedly. Therefore, a band width for inputting data can be reduced significantly. Furthermore, the scrambled PMW signal generating device can scramble a PMW signal with a long period into a plurality of scrambled PMW signals with a short period. Therefore, the refresh rate can be efficiently enhanced without changing the band width for inputting data. | 03-31-2011 |
20110140758 | ANALOG MULTIPLIER - An analog multiplier includes a bias circuit, a level shifter, a multiplying circuit, and a current mirror. The analog multiplying circuit is used for inputting a first voltage and a second voltage, and outputting a product current. The product current is proportional to a product of the first voltage and the second voltage. The analog multiplier is implemented by a few devices, thereby having a simple architecture and being capable of being driven by a small amount of power. | 06-16-2011 |
Hsiang-Chueh Shih, Hsinchu City TW
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20100199078 | METHOD OF SAFE AND RECOVERABLE FIRMWARE UPDATE AND DEVICE USING THE SAME - A safe and recoverable firmware update method which for a remote embedded electronic device and the device thereof. The method includes reading an update status in a flash memory, and determining the update status. If the update status is “DEFAULT”, a default firmware is executed. If the update status is not “DEFAULT”, the update status is further determined if it is “UPDATED”. If the update status is “UPDATED”, a configuration area is set as “BOOTING” and a new firmware is executed. If the update status is not “UPDATED”, the update status is determined if it is “RUNNEW”. If the update status is “RUNNEW”, a new firmware and an update validation method are executed. If the update validation method gets an update completion validation message, the update status is set as “RUNNEW”. If the update status is not “RUNNEW”, a default firmware is executed. | 08-05-2010 |
Hsiang-Wen Shih, Hsinchu City TW
Hsueh-Hao Shih, Hsinchu City TW
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20150048482 | SEMICONDUCTOR CAPACITOR - A semiconductor capacitor is includes a substrate, a plurality of odd layers formed on the substrate, and a plurality of even layers formed on the substrate. Each odd layer includes a plurality of first odd fingers and a first odd terminal electrically connected thereto, and a plurality of second odd fingers and a second odd terminal electrically connected thereto. Each even layer includes a plurality of first even fingers and a first even terminal electrically connected thereto, and a plurality of second even fingers and a second even terminal electrically connected thereto. The semiconductor capacitor further includes at least a first odd connecting structure electrically connecting the first odd terminals, at least a second odd connecting structure electrically connecting the second odd terminals, at least a first even connecting structure electrically connecting the first even terminals, and at least a second even connecting structure electrically connecting the second even terminals. | 02-19-2015 |
20150228547 | SEMICONDUCTOR STRUCTURE WITH THROUGH SILICON VIA AND METHOD FOR FABRICATING AND TESTING THE SAME - A semiconductor structure with a through silicon via includes a substrate having a front side and a back side. The through silicon via penetrates the substrate. A device is disposed on the front side of the substrate. Numerous dielectric layers cover the front side. A first test pad for testing the device is disposed on the front side of the substrate. A second test pad for testing the through silicon via is disposed on the back side of the substrate. A method of fabricating and testing the semiconductor structure is also provided. | 08-13-2015 |
Hung-Cheng Shih, Hsinchu City TW
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20120331146 | DECENTRALIZED STRUCTURED PEER-TO-PEER NETWORK AND LOAD BALANCING METHODS THEREOF - An approach is provided for reassigning and sharing loads to peers with a same identity, which is based on a threshold. The peers are configured to store indexes of a key and to share the same loading (i.e., indexes) of the key to the peers with same secondary identities in different zones. The secondary identity is derived and has a modulo relationship with a first identity of the peer. The threshold indicates maximum number of indexes stored in each peer. Therefore, the loading are distributed evenly to peers in different zones, which achieves load balance to a decentralized structured peer-to-peer network. | 12-27-2012 |
20130275599 | DECENTRALIZED STRUCTURED PEER-TO-PEER NETWORK AND LOAD BALANCING METHODS THEREOF - An approach is provided for reassigning and sharing loads to peers with a same identity, which is based on a threshold. The peers are configured to store indexes of a key and to share the same loading (i.e., indexes) of the key to the peers with same secondary identities in different zones. The secondary identity is derived and has a modulo relationship with a first identity of the peer. The threshold indicates maximum number of indexes stored in each peer. Therefore, the loading are distributed evenly to peers in different zones, which achieves load balance to a decentralized structured peer-to-peer network. | 10-17-2013 |
Jun-Ren Shih, Hsinchu City TW
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20090323768 | SPREAD SPECTRUM CLOCK SIGNAL GENERATOR - A spread spectrum clock signal generator for spreading an input clock signal into an output clock signal includes a clock signal delay chain for delaying the input clock signal into a delay clock signal group having a plurality of delay clock signals, a modulation controller for outputting a counter clock signal control signal, a clock signal selection circuit for selecting, from the delay clock signal group, a modulation clock signal group having a plurality of modulation clock signals, a programmable counter for generating a counting value according to a counter clock signal, and a clock signal output unit for combining the modulation clock signals into the output clock signal according to the counting value, and further generating the counter clock signal, outputted to the programmable counter, according to the counter clock signal control signal. | 12-31-2009 |
20100110115 | Frame Rate Control Method and Display Device Using the Same - A frame rate control (FRC) method is provided for driving a number of pixels according to a number of pixels data. The pixels include a number of first color sub-pixels. In this method, the dithering process is performed to the pixels data in two frames according to two basic matrixes respectively. In one of the two frames, the numbers of the first color sub-pixels, driven by the positive pixel voltages and the negative pixel voltages and to which the dithering process has been performed, are the same in substantiality. Further, in the other of the two frames, the numbers of the first color sub-pixels, driven by the positive pixel voltages and the negative pixel voltages and to which the dithering process has been performed, are also the same in substantiality. | 05-06-2010 |
20110007052 | DRIVING CIRCUIT AND LCD SYSTEM INCLUDING THE SAME - A driving circuit for an LCD system is provided. The LCD system includes a common electrode, a display electrode, and a capacitor. An AC voltage output terminal of the driving circuit is coupled to the common electrode via the capacitor. The display electrode and a charging/discharging unit in the driving circuit are respectively coupled to the AC voltage output terminal through a switch. According to requirements to change the electrical polarity of the common electrode, a control unit in the driving circuit turns on/off the two switches respectively so as to charge or discharge the AC voltage output terminal. | 01-13-2011 |
20110032247 | DRIVING CIRCUIT AND DISPLAY SYSTEM INCLUDING THE SAME - A driving circuit for a display system is provided. The driving circuit includes two driving units. After receiving N image data, the first driving unit drives the display system based on M image data among the N image data. The second driving unit receives the other (N−M) image data and a set of control signals from the first driving unit. The second driving unit drives the display system based on the (N−M) image data and the set of control signals. The first driving unit adjusts the timing sequence of the set of control signals according to the mode of the display system. | 02-10-2011 |
20110142162 | DATA TRANSMITTING METHOD AND DATA TRANSMITTING STRUCTURE - A data transmitting structure and a data transmitting method are disclosed. The data transmitting structure includes an input buffer layer and an output buffer layer. The input buffer layer includes N input latches connected sequentially in series. The 1st input latch of the input buffer layer is coupled to a data module. The output buffer layer includes N output latches connected sequentially in series. The 1st output latch of the output buffer layer is coupled to the Nth input latch of the input buffer layer. When the input buffer layer is turned on, the data in the data module are sequentially loaded into the input buffer layer, and then the data in the input latches are sequentially transmitted to the output latches of the output buffer layer. Finally, the data are sequentially transmitted to the Nth output latch of the output buffer layer and outputted from the Nth output latch. | 06-16-2011 |
20120229483 | PANEL DRIVING DEVICE AND DISPLAY DEVICE HAVING THE SAME - A panel driving device for driving a display panel including N data lines is disclosed. The panel driving device includes a memory array and a source driver. The memory array includes M memory blocks, a controller and an output unit. Each memory block includes N memory units. The controller is configured to divide serial image data into M groups of sub-image data and write each group of sub-image data into the corresponding memory block sequentially, wherein each group of sub-image data has N sub-image data. The output unit is configured to output the data in the M memory blocks sequentially in a time division manner in response to a selection signal. The source driver includes N driving units having the same configuration. After the driving unit receives the time-divided data output from the output unit, signal processing is performed to generate an image signal to be output to the corresponding data line. | 09-13-2012 |
Kai-Sheng Shih, Hsinchu City TW
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20150311263 | PIXEL STRUCTURE AND ELECTROLUMINESCENT DISPLAY HAVING THE SAME - A pixel structure and an electroluminescent display having the same are disclosed. The pixel structure comprises a first pixel and a second pixel. The first pixel and the second pixel each comprise a first sub-pixel, a second sub-pixel and a third sub-pixel. The first sub-pixel of the first pixel is adjacent to the first sub-pixel of the second pixel, the second sub-pixel of the first pixel is adjacent to the second sub-pixel of the second pixel, and the third sub-pixel of the first pixel is adjacent to the third sub-pixel of the second pixel. The first sub-pixel of the first pixel is adjacent to the first sub-pixel of the second pixel in a first direction, and the second sub-pixel of the first pixel is adjacent to the second sub-pixel of the second pixel in a second direction that is not parallel to the first direction. | 10-29-2015 |
Kai-Yao Shih, Hsinchu City TW
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20160111295 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device is provided. The method includes the following steps. A substrate including a memory cell region and a peripheral region is provided, and a plurality of isolation structures are formed in the substrate. Each of the isolation structures contains an exposed portion protruding beyond the surface of the substrate. A first dielectric layer is formed on the substrate. A protective layer is formed on a sidewall of the exposed portion of each of the isolation structures. The first dielectric layer on the peripheral region is removed. A second dielectric layer is formed on the substrate of the peripheral region. | 04-21-2016 |
Kun-Hong Shih, Hsinchu City TW
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20130213704 | PACKAGE STRUCTURE AND THE METHOD TO FABRICATE THEREOF - The invention discloses a package structure made of the combination of a device carrier and a modifiable substrate. In one embodiment, a recess is formed in the device carrier and a conductive element is disposed on the substrate, wherein the substrate is disposed on the device carrier and the conductive element is located in the recess of the device carrier. The conductive pattern in the substrate is electrically connected to the device carrier and I/O terminals of the first conductive element. The invention also discloses a method for manufacturing a package structure made of the combination of a device carrier and a modifiable substrate. In one embodiment, a portion of the conductive pattern in the substrate can be modified. | 08-22-2013 |
Ming-Yung Shih, Hsinchu City TW
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20120128181 | Analog-to-Digital Converter, Sound Processing Device, and Method for Analog-to-Digital Conversion - The invention provides a sound processing device. In one embodiment, the sound processing device comprises a first microphone, a first analog-to-digital converter, a second microphone, and a second analog-to-digital converter. The first microphone detects a first sound pressure to generate a first analog audio signal. The first analog-to-digital converter converts the first analog audio signal to a first digital audio signal. The second microphone detects a second sound pressure to generate a second analog audio signal. The second analog-to-digital converter converts the second analog audio signal to a second digital audio signal, encodes a third digital audio signal according to the second digital audio signal, receives the first digital audio signal and a clock signal, outputs data bits of the third digital audio signal when the clock signal oscillates to a logic low level, and outputs data bits of the first digital audio signal when the clock signal oscillates to a logic high level. | 05-24-2012 |
Min-Yung Shih, Hsinchu City TW
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20100295616 | AUDIO COMPENSATION METHOD AND AUDIO APPARATUS WITH CLASS AB POWER AMPLIFIER - An audio apparatus is provided, receiving a reference voltage and an input signal to generate an output signal. In the audio apparatus, a compensation circuit, generates a compensated reference voltage based on the input signal, the reference voltage and the output signal. A class AB power amplifier receives the compensated reference voltage to amplify the input signal into the output signal. | 11-25-2010 |
20120128180 | Analog-to-Digital Converter and Analog-to-Digital Conversion Method - The invention provides an analog-to-digital converter. In one embodiment, the analog-to-digital converter receives a first audio signal from a microphone, and comprises a coding selection module, a pre-amplifier, a | 05-24-2012 |
Pei-Hsiu Shih, Hsinchu City TW
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20140084188 | APPARATUS FOR MEASURING THE OPTOELECTRONIC CHARACTERISTICS OF LIGHT-EMITTING DIODE - An apparatus for measuring the optoelectronic characteristics of a light-emitting diode includes: a container including a light input port and a light output port; a measurement module connected to the light output port of the container; a sample holder under the container for holding a light-emitting diode under test, wherein a surface of the measurement module reflects more than 50% of the luminous flux generated by the light-emitting diode under test; and a light gathering unit between the container and the sample holder, wherein an interior wall of the light gathering unit reflects more than 50% of the luminous flux generated by the light-emitting diode under test. | 03-27-2014 |
Ping-Chia Shih, Hsinchu City TW
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20090243030 | METHOD OF FORMING SHALLOW TRENCH ISOLATION STRUCTURE - A method of fabricating an isolation structure and the structure thereof is provided. The method is compatible with the embedded memory process and provides the isolation structure with a poly cap thereon to protect the top corners of the isolation structure, without using an extra photomask. | 10-01-2009 |
Po-Cheng Shih, Hsinchu City TW
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20110207329 | DOUBLE PATTERNING STRATEGY FOR CONTACT HOLE AND TRENCH IN PHOTOLITHOGRAPHY - A method of lithography patterning includes forming a mask layer on a material layer and forming a capping layer on the mask layer. The capping layer is a boron-containing layer with a higher resistance to an etching reaction of patterning process of the material layer. By adapting the boron-containing layer as the capping layer, the thickness of the mask layer can be thus reduced. Hence, a better gap filling for forming an interconnect metallization in the material layer could be achieved as well. | 08-25-2011 |
20130256888 | INTERCONNECT STRUCTURE AND METHOD FOR FORMING THE SAME - A interconnect structure includes a first etch stop layer over a substrate, a dielectric layer over the first etch stop layer, a conductor in the dielectric layer, and a second etch stop layer over the dielectric layer. The dielectric layer contains carbon and has a top portion and a bottom potion. A difference of C content in the top portion and the bottom potion is less than 2 at %. An oxygen content in a surface of the conductor is less than about 1 at %. | 10-03-2013 |
20130256903 | INTERCONNECT STRUCTURE AND METHOD FOR FORMING THE SAME - A interconnect structure includes a conductive layer formed in a dielectric layer. An adhesion layer is formed between the dielectric layer and a substrate. The adhesion layer has a carbon content ratio greater than a carbon content ratio of the dielectric layer. | 10-03-2013 |
20150056802 | INTERCONNECT STRUCTURE AND METHOD FOR FORMING THE SAME - Embodiments of an interconnect structure and methods for forming an interconnect structure are provided. The method includes forming a low-k dielectric layer over a substrate, forming an opening in the low-k dielectric layer, forming a conductor in the opening, forming a capping layer over the conductor, and forming an etch stop layer over the capping layer and the low-k dielectric layer. The etch stop layer includes an N element with a content ratio not less than about 25 at %. | 02-26-2015 |
20150200133 | METHOD FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE - Embodiments of the disclosure provide a method for forming a semiconductor device structure. The method includes forming a dielectric layer over a semiconductor substrate. The method also includes applying a carbon-containing material over the dielectric layer. The method further includes irradiating the dielectric layer and the carbon-containing material with a light to repair the dielectric layer, and the light has a wavelength greater than about 450 nm. | 07-16-2015 |
Robert Shih, Hsinchu City TW
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20140179090 | STORAGE AND SUB-ATMOSPHERIC DELIVERY OF DOPANT COMPOSITIONS FOR CARBON ION IMPLANTATION - A supply source for delivery of a CO-containing dopant gas composition is provided. The composition includes a controlled amount of a diluent gas mixture such as xenon and hydrogen, which are each provided at controlled volumetric ratios to ensure optimal carbon ion implantation performance. The composition can be packaged as a dopant gas kit consisting of a CO-containing supply source and a diluent mixture supply source. Alternatively, the composition can be pre-mixed and introduced from a single source that can be actuated in response to a sub-atmospheric condition achieved along the discharge flow path to allow a controlled flow of the dopant mixture from the interior volume of the device into an ion source apparatus. | 06-26-2014 |
Sheng-Hung Shih, Hsinchu City TW
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20140264233 | RESISTANCE VARIABLE MEMORY STRUCTURE AND METHOD OF FORMING THE SAME - A semiconductor structure includes a memory region. A memory structure is disposed on the memory region. The memory structure includes a first electrode, a resistance variable layer, protection spacers and a second electrode. The first electrode has a top surface and a first outer sidewall surface on the memory region. The resistance variable layer has a first portion and a second portion. The first portion is disposed over the top surface of the first electrode and the second portion extends upwardly from the first portion. The protection spacers are disposed over a portion of the top surface of the first electrode and surround at least the second portion of the resistance variable layer. The protection spacers are configurable to protect at least one conductive path in the resistance variable layer. The protection spacers have a second outer sidewall surface substantially aligned with the first outer sidewall surface of the first electrode. The second electrode is disposed over the resistance variable layer. | 09-18-2014 |
20150069315 | RESISTIVE RANDOM ACCESS MEMORY AND MANUFACTURING METHOD THEREOF - One embodiment in the present disclosure provides a resistor in a resistive random access memory (RRAM). The resistor includes a first electrode; a resistive layer on the first electrode; an electric field enhancement array in the resistive layer; and a second electrode on the resistive layer. The electric field enhancement array includes a plurality of electric field enhancers arranged in a same plane. One embodiment in the present disclosure provides a method of manufacturing a resistor structure in an RRAM. The method comprises (1) forming a first resistive layer on a first electrode; (2) forming a metal layer on the resistive layer; (3) patterning the metal layer to form a metal dot array on the resistive layer; and (4) forming a second electrode on the metal dot array. The metal dot array comprises a plurality of metal dots, and a distance between adjacent metal dots is less than 40 nm. | 03-12-2015 |
20150090949 | RRAM CELL STRUCTURE WITH LATERALLY OFFSET BEVA/TEVA - The present disclosure relates to a resistive random access memory (RRAM) cell architecture, with off-axis or laterally offset top electrode via (TEVA) and bottom electrode via (BEVA). Traditional RRAM cells having a TEVA and BEVA that are on-axis can cause high contact resistance variations. The off-axis TEVA and BEVA in the current disclosure pushes the TEVA away from the insulating layer over the RRAM cell, which can improve the contact resistance variations. The present disclosure also relates to a memory device having a rectangular shaped RRAM cell having a larger area that can lower the forming voltage and improve data retention. | 04-02-2015 |
20150092471 | MEMORY CELLS BREAKDOWN PROTECTION - A method is disclosed that includes the operations outlined below. A first voltage is applied to a gate of an access transistor of each of a row of memory cells during a reset operation, wherein a first source/drain of the access transistor is electrically connected to a first electrode of a resistive random access memory (RRAM) device in the same memory cell. An inhibition voltage is applied to a second electrode of the RRAM device or to a second source/drain of the access transistor of each of a plurality of unselected memory cells when the first voltage is applied to the gate of the access transistor. | 04-02-2015 |
20150144859 | Top Electrode Blocking Layer for RRAM Device - An integrated circuit device including a resistive random access memory (RRAM) cell formed over a substrate. The RRAM cell includes a top electrode having an upper surface. A blocking layer covers a portion of the upper surface. A via extends above the top electrode within a matrix of dielectric. The upper surface of the top electrode includes an area that interfaces with the blocking layer and an area that interfaces with the via. The area of the upper surface that interfaces with the via surrounds the area of the upper surface that interfaces with the blocking layer. The blocking layer is functional during processing to protect the RRAM cell from etch damage while being structured in such a way as to not interfere with contact between the overlying via and the top electrode. | 05-28-2015 |
20150325786 | RRAM CELL STRUCTURE WITH LATERALLY OFFSET BEVA/TEVA - The present disclosure relates to a method of forming a resistive random access memory (RRAM) cell. The method forms a bottom electrode over a bottom electrode via. The method further forms a variable resistive dielectric layer over the bottom electrode, and a top electrode over the variable resistive dielectric layer. The method forms a top electrode via vertically extending outward from an upper surface of the top electrode at a position centered along a first axis that is laterally offset from a second axis centered upon the bottom electrode via. The top electrode via has a smaller width than the top electrode. Laterally offsetting the top electrode via from the bottom electrode via provides the top electrode via with good contact resistance. | 11-12-2015 |
20160035975 | TOP ELECTRODE FOR DEVICE STRUCTURES IN INTERCONNECT - Some embodiments relate to an integrated circuit device. The integrated circuit device includes a resistive random access memory (RRAM) cell, which includes a top electrode and a bottom electrode that are separated by a RRAM dielectric layer. The top electrode of the RRAM cell has a recess in its upper surface. A via is disposed over the RRAM cell and contacts the top electrode within the recess. | 02-04-2016 |
Sheng-Wen Shih, Hsinchu City TW
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20120194784 | IRIS IMAGE DEFINITION ESTIMATION SYSTEM USING THE ASTIGMATISM OF THE CORNEAL REFLECTION OF A NON-COAXIAL LIGHT SOURCE - An iris image definition estimation system using the astigmatism of the corneal reflection of a non-coaxial light source to assess both the resolution of the iris patterns and the direction of focus adjustment. The corneal reflection results in two virtual images on the meridional and the sagittal planes. These virtual images are formed behind the cornea and close to the iris. Yet, both are projected onto the same location and result in a composite glint area. In addition, the shape of the glint area of a non-coaxial light source varies with different camera focus settings. Furthermore, due to the high intensity of the glint area, the shape can be easily observed, and the size and the shape of the glint area can be used to determine the resolution of the iris image and the direction of focus adjustment, respectively. | 08-02-2012 |
Shu-Fen Shih, Hsinchu City TW
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20120143362 | INTERACTIVE MEDIA PLAYING SYSTEM AND METHOD - An interactive media playing system and method are presented. The system includes a server and a media playing device. After the media playing device logs in to the server, the server compares personal data of a authenticated member data with matching information of media information, finds at least one target media information, introduces matching information of the target media information and the personal data of the authenticated member data into a weighted distribution rule, in order to find a media playing sequence conforming to both the matching information of the target media information and the personal data of the authenticated member data, and outputs the media information to a media playing device. In this way, a user can perform an operation behavior on the media information through the media playing device. | 06-07-2012 |
Wei-Kuan Shih, Hsinchu City TW
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20130109366 | Communication System and Communicating Connection Method Thereof | 05-02-2013 |
Yang-Hung Shih, Hsinchu City TW
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20080285888 | IMAGE RESIZING DEVICE AND PARAMETER ADJUSTING METHOD THEREOF - A parameter adjusting method of an image resizing module. The method includes receiving an image signal; and referencing a signal characteristic of the image signal to adjust a parameter with which the image resizing module resizes the image signal. | 11-20-2008 |
20090322938 | METHOD AND RELATED IMAGE PROCESSING APPARATUS UTILIZED FOR COMBINING COLOR LOOK-UP TABLE AND VIDEO DAC CALIBRATION MAPPING TABLE - A signal processing apparatus for generating an output analog signal according to a raw digital signal is disclosed. The signal processing apparatus includes a DAC, a storage device, and an adjusting device. The storage device is utilized for storing a target mapping table equivalent to a combination of a predetermined correction mapping table and a DAC calibration mapping table corresponding to the DAC. The adjusting device is coupled to the DAC and the storage device, and is utilized for adjusting the raw digital signal to generate a calibrated digital signal according to the target mapping table stored in the storage device. The DAC converts the calibrated digital signal to generate the output analog signal. | 12-31-2009 |
20100128802 | VIDEO PROCESSING CIUCUIT AND RELATED METHOD FOR MERGING VIDEO OUTPUT STREAMS WITH GRAPHICAL STREAM FOR TRANSMISSION - A video processing circuit includes a video generating unit for generating a video output stream, a graphic generating unit for providing a graphical stream, and a communication interface circuit coupled to the video generating unit and the graphic generating unit. The communication interface circuit has a first mode provided for mixing the video output stream and the graphical stream to transmit a mixed video output stream through a channel and a second mode provided for merging the video output stream and the graphical stream to transmit a first merged signal through the channel. In the second mode, the communication interface circuit merges the video output stream and the graphical stream by increasing a working frequency of the communication interface circuit to increase bandwidths of the channel, using positions for transmitting a portion of video control signals in the video output stream to transmit the graphical stream, and compressing the video output stream. | 05-27-2010 |
20130265489 | VIDEO PROCESSING CIRCUIT AND RELATED METHOD FOR MERGING VIDEO OUTPUT STREAMS WITH GRAPHICAL STREAM FOR TRANSMISSION - A video processing circuit includes a video generating unit for generating a video output stream, a graphic generating unit for providing a graphical stream, and a communication interface circuit. The communication interface circuit has a first mode provided for mixing the video output stream and the graphical stream to transmit a mixed video output stream through a channel and a second mode provided for merging the video output stream and the graphical stream to transmit a first merged signal through the channel. In the second mode, the communication interface circuit merges the video output stream and the graphical stream by increasing a working frequency of the communication interface circuit to increase bandwidths of the channel, using positions for transmitting a portion of video control signals in the video output stream to transmit the graphical stream, and compressing the video output stream. | 10-10-2013 |
20150334312 | VIDEO PROCESSING CIRCUIT AND RELATED METHOD FOR MERGING VIDEO OUTPUT STREAMS WITH DATA STREAM FOR TRANSMISSION - A video processing circuit includes a video generating unit for generating a video output stream, a data generating unit (e.g. graphic generating unit) for providing a data stream (e.g. graphical stream), and a communication interface circuit. The communication interface circuit has a mode provided for merging the video output stream and the graphical stream to transmit a first merged signal through a channel. In the mode, the communication interface circuit merges the video output stream and the data stream by increasing a working frequency of the communication interface circuit to increase bandwidths of the channel, using positions for transmitting a portion of video control signals in the video output stream to transmit the data stream, and compressing the video output stream. The communication interface circuit may have another mode provided for mixing the video output stream and the data stream to transmit a mixed video output stream through the channel. | 11-19-2015 |
Yi-Chang Shih, Hsinchu City TW
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20130027011 | POWER SUPPLYING CIRCUIT AND POWER SUPPLYING METHOD - A power supplying circuit for generating an output voltage, which comprises: a noise detecting circuit, for receiving a first reference voltage and for generating a second reference voltage according to the output voltage and the first reference voltage, wherein a noise component of the second reference voltage is the same as which of the output voltage; a control voltage generating unit, for receiving a feedback voltage and the second reference voltage, and for generating a control voltage according to the feedback voltage and the second reference voltage; a voltage providing device, for generating the output voltage according to the control voltage and an input voltage; and a feedback module, for generating the feedback voltage according to the output voltage. | 01-31-2013 |
20130029601 | COMMUNICATION DEVICE WITH SIMULTANEOUS WIRELESS LAN AND BLUE-TOOTH COMMUNICATION CAPABILITY - A communication device is disclosed, having a wireless LAN transceiver, a wireless LAN demodulation circuit, a Bluetooth transceiver, a Bluetooth demodulation circuit, an oscillator, and a mixer. The wireless LAN transceiver conducts communication in a first frequency band and the wireless LAN demodulation circuit demodulates the wireless LAN signals. The Bluetooth transceiver conducts communication in a second band and a third frequency band, which are higher and lower than the first frequency band, respectively. The oscillator generates oscillating signals. The mixer mixes the signals in the second frequency band with an oscillating signal, which is higher than the second frequency band, and mixes the signals in the third frequency band with another oscillating signal, which is lower than the third frequency band to generate mixed signals. The Bluetooth demodulation circuit demodulates the mixed signals of the mixer. | 01-31-2013 |
Ying Ching Shih, Hsinchu City TW
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20150228604 | SELF-ALIGNING CONDUCTIVE BUMP STRUCTURE AND METHOD OF FABRICATION - A semiconductor device includes a substrate having a major surface and conductive bumps distributed over the major surface of the substrate. Each conductive bump of a first subset of the conductive bumps comprises a regular body and a second subset of the conductive bumps comprises a group of separate conductive bumps uniformly distributed around a periphery of a central opening. | 08-13-2015 |
Ying-Chou Shih, Hsinchu City TW
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20140154997 | RF TESTING SYSTEM - An integrated circuit (IC) is provided. The IC includes an RF transmitter configured to generate an RF signal in response to a command signal from test equipment; an RF receiver configured to generate an evaluation signal according to the RF signal, and report the evaluation signal to the test equipment, so that the test equipment performs a test analysis on the evaluation signal to determine a test result, wherein the test equipment is external to the IC. | 06-05-2014 |
20150229415 | RF TESTING SYSTEM - An integrated circuit (IC) is provided. The IC includes an RF transmitter configured to generate an RF signal in response to a command signal from test equipment; an RF receiver configured to generate an evaluation signal according to the RF signal, and report the evaluation signal to the test equipment, so that the test equipment performs a test analysis on the evaluation signal to determine a test result, wherein the test equipment is external to the IC. | 08-13-2015 |
Yuan-Yuan Shih, Hsinchu City TW
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20130138921 | DE-COUPLED CO-PROCESSOR INTERFACE - A de-coupled co-processor interface (CPIF) is provided. The de-coupled CPIF transfers endian information along with the dispatching of co-processor (COP) instructions. The de-coupled CPIF divides the status report provided by a COP into an early status report and a late status report. The de-coupled CPIF may disable the late status report in order to improve the performance. The de-coupled CPIF further provides multiple early flush interfaces (EFIs) to transfer early flush events from a main processor (MP) to a corresponding COP. As a result, the de-coupled CPIF can improve the performance of the processing of data endian, status reports and early flush events between an MP and a COP. | 05-30-2013 |
Yueh-Hong Shih, Hsinchu City TW
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20090128783 | Ocular-protection projector device - The present invention discloses an ocular-protection projector device, wherein the projector is additionally equipped with an image-capture unit. When the projector projects information onto a screen, the image-capture unit captures the human-shape image of a user. An image-processing unit, which is arranged inside the projector or an external electronic device, receives the human-shape image, creates a human-shape black mask, and outputs the human-shape black mask via the projector onto an area of the screen corresponding to the user's position. Thereby, the present invention can effectively protect the user's eyes from the harm of intense light. | 05-21-2009 |
20150177853 | INTERACTIVE DISPLAY SYSTEM AND INPUT DEVICE THEREOF - An interactive display system includes an input device and an image interaction module. The input device has a touch portion including a built-in first light-emitting module and a built-in second light-emitting module. The image interaction module includes a display module, a first image-capturing module, a second image-capturing module and a processing module. The processing module captures invisible light generated by the first light-emitting module through the first image-capturing module, for determining and obtaining the position of the touch portion. The processing module captures visible light generated by the second light-emitting module through the second image-capturing module according to the position of the touch portion, for determining and obtaining a predetermined color light source provided by the visible light generated by the second light-emitting module. | 06-25-2015 |
Yung-Wei Shih, Hsinchu City TW
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20160073771 | TOOTHBRUSH WITH DENTAL PLAGUE DISPLAY FUNCTION - The present invention relates to a toothbrush with dental plague display function. The toothbrush includes a toothbrush head, a toothbrush handle, a filter lens, a power device, an LED and a control circuit. Through the control circuit and the power device, the LED generates ultraviolet light that is radiated upon surfaces of teeth. The ultraviolet light is reflected by a mirror, and excessively reflected ultraviolet light on the surfaces of teeth is removed by the exclusive filter lens, and a user is allowed to easily observe dental plague displaying a fluorescence reaction on the surfaces of teeth. | 03-17-2016 |
Zen-Chung Shih, Hsinchu City TW
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20090141030 | SYSTEM AND METHOD FOR MULTILEVEL SIMULATION OF ANIMATION CLOTH AND COMPUTER-READABLE RECORDING MEDIUM THEREOF - A system for multilevel simulation of an animation cloth is provided. The system includes a multilevel area generation module, a curvature calculation module, a curvature comparison module, and a dynamic simulation module. The multilevel area generation module divides a plurality of grid units of the animation cloth into a plurality of level sub-areas based on a multilevel technique, wherein each of the level sub-areas is generated by dividing an upper level sub-area. The curvature calculation module calculates the curvatures of the level sub-areas according to the plane vectors of the grid units in a frame. The curvature comparison module compares the curvatures of the level sub-areas with a flatness threshold. The dynamic simulation module calculates the plane vector of each grid unit in a next frame through different method according to the comparison result of the curvature comparison module. | 06-04-2009 |