Seiji Noguchi
Seiji Noguchi, Ube-Shi JP
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20130200777 | BLUE-LIGHT-EMITTING PHOSPHOR AND LIGHT-EMITTING DEVICE EQUIPPED WITH THE BLUE-LIGHT-EMITTING PHOSPHOR - A blue light-emitting phosphor having an elemental formula of Sr | 08-08-2013 |
20130244033 | SILICATE-BASED BLUE LIGHT-EMITTING PHOSPHOR AND METHOD FOR PRODUCING SAME - A blue light-emitting silicate phosphor favorably employable as a blue light-emitting source of a light-emitting apparatus which gives emission of a visible light upon irradiation of ultraviolet rays having a wave-length of 254 nm, such as ultraviolet rays emitted by a fluorescent lamp is produced by a method comprising calcining a powdery mixture comprising a magnesium oxide powder, an MeO source powder, a EuO source powder and a SiO | 09-19-2013 |
20140054634 | SILICATE PHOSPHOR EXHIBITING HIGH LIGHT EMISSION CHARACTERISTICS AND MOISTURE RESISTANCE, AND LIGHT EMITTING DEVICE - A silicate phosphor having a coating layer comprising a fluorine-containing compound on its surface which is obtained by a method of heating a mixture of 100 weight parts of a silicate phosphor and 0.5-15 weight parts of ammonium fluoride at a temperature in the range of 200 to 600° C. exhibits high light emission intensity and high moisture resistance. | 02-27-2014 |
20140084780 | BLUE LIGHT-EMITTING PHOSPHOR AND LIGHT-EMITTING DEVICE USING THE BLUE LIGHT-EMITTING PHOSPHOR - The emission strength of a light released from a blue light-emitting phosphor having a merwinite crystal structure and an elemental formula of (Sr,Ca) | 03-27-2014 |
20140151732 | BLUE LIGHT-EMITTING PHOSPHOR AND LIGHT-EMITTING DEVICE USING SAME - A blue light-emitting Eu-activated silicate phosphor having a constitutional formula of Sr | 06-05-2014 |
Seiji Noguchi, Matsumoto-City JP
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20140070270 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD - IGBT and diode are formed with optimal electrical characteristics on the same semiconductor substrate. IGBT region and FWD region are provided on the same semiconductor substrate. There are a plurality of trenches at predetermined intervals in the front surface of an n | 03-13-2014 |
20140377942 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device suppresses loss of vacuum in a chamber of an ion implanter, sag of a resist mask pattern for ion implantation, and producing a resist residue after ashing. First ion implanting process implants n-type impurity to form n | 12-25-2014 |
Seiji Noguchi, Nagano JP
Patent application number | Description | Published |
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20140377941 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - When forming a p+ area and n+ area on the same surface of an n− semiconductor wafer, a first ion implantation forms the p+ area on the entire rear surface of the n− semiconductor wafer. Next, a resist mask selectively covering the rear surface of the n− semiconductor wafer is formed. With this resist mask as the mask, an n-type impurity is injected into the rear surface of the n− semiconductor wafer through a second ion implantation to form the n+ area on a portion deeper from the rear surface of the n− semiconductor wafer than the p+ type area. Thereafter, the n− semiconductor wafer is exposed to an oxygen (O | 12-25-2014 |