Patent application number | Description | Published |
20080299929 | Increasing sensitivity of radio receiver - A direct-conversion radio receiver is provided. The receiver includes a first measurement unit configured to measure a signal level of a received signal at an input of the receiver. The receiver also includes a gain controller configured to stepwise adjust at least a front-end gain and a baseband gain of the receiver when the signal level of the received signal at the input of the receiver exceeds a given sensitivity level, and adjust the front-end gain with at least one further gain step when the input signal level is below the given sensitivity level. | 12-04-2008 |
20110210881 | DOUBLE BALANCED DIGITAL TRANSMITTER - A digital-to-analog upconverter directly converts a baseband digital value comprising a plurality of bits to an RF analog signal to combine digital-to-analog operations with frequency upconversion operations. One exemplary digital-to-analog upconverter comprises a plurality of conversion units, one for each of the plurality of bits in the baseband digital value, and an output node coupled to each of the conversion units. Each conversion unit generates a weighted analog signal at a low frequency or at a radio frequency responsive to the corresponding input bit and an oscillator signal at RF. The weighting factor of each conversion unit corresponds to a relative weighting of the corresponding bit. The output node combines the weighted analog signals to generate a combined RF analog signal representative of the baseband digital value. | 09-01-2011 |
20120171980 | Amplifier with On-Chip Filter - An integrated circuit for a radio receiver comprising a radio-frequency amplifier and a radio-frequency filter is described. The amplifier receives radio-frequency signals from an antenna, the filter is connected to the amplifier output, and the output of the filter is provided to a processing stage of the receiver. The amplifier comprises an amplifying stage controlled by a radio-frequency input signal and a signal fed back from the filter. The amplifier input impedance is substantially matched to the antenna impedance at a frequency band of interest. The signal fed back from the filter providing attenuation of signals outside the frequency band of interest at the amplifier input. The filter comprises one or more filter components. A filter component comprises a first input and a second input for receiving the amplifier output, a first switch arranged to selectively connect the first input to a first impedance, a second switch arranged to selectively connect the first input to a second impedance, a third switch arranged to selectively connect the second input to the first impedance, and a fourth switch arranged to selectively connect the second input to the second impedance. The first and fourth switches are controlled by a first oscillator signal and the second and third switches are controlled by a second oscillator signal that is 180° out of phase with the first oscillator signal. | 07-05-2012 |
20120314795 | High Output Power Digital TX - The disclosed apparatus and corresponding method uses amplifiers and a differential combiner to control the output power of a digital-to-analog upconverter and to isolate In-phase and Quadrature branches of the upconverter. First and second upconverters convert In-phase and Quadrature portions of a baseband digital value to respective first/second In-phase (I | 12-13-2012 |
20130169327 | Charge-to-Digital Timer - The charge-to-digital timer apparatus and method disclosed herein estimates the elapsed time between two signals, e.g., a start signal and a stop signal. To that end, at least a capacitive load is charged with a known current to generate a load voltage. Subsequently, a first voltage is ramped in a plurality of discrete voltage steps associated with a plurality of known capacitances until the ramped voltage satisfies a predetermined criterion relative to a second voltage. The elapsed time is determined from the discrete voltage steps, one of the first and second voltages, the known current, and the known capacitive load. | 07-04-2013 |
20150244328 | PPA Linearization - A linearization circuit improves the linearity of a power amplifier based on an envelope of an input RF signal. The linearization circuit comprises an RF signal generation circuit, a replica circuit, and an adaptive amplifier. The RF signal generation circuit generates the RF signal from a phase and an amplitude of an input digital signal. The replica circuit extracts the envelope from the RF signal and generates a sensing voltage based on the extracted envelope. The adaptive amplifier generates an adaptive bias voltage for the power amplifier based on the sensing voltage, and applies the adaptive bias voltage to the power amplifier and to the replica circuit to improve the linearity of the power amplifier by regulating the power amplifier and the replica circuit according to the envelope. | 08-27-2015 |
20150311908 | LOCAL OSCILLATOR INTERFERENCE CANCELLATION - Systems and methods for mitigating interference in a Local Oscillator (LO) signal generated by a Phase-Locked Loop (PLL) are disclosed. In one embodiment, a system includes a PLL and an error compensation subsystem. The PLL includes a Controlled Oscillator (CO) that provides a LO output signal based on a control signal, a phase detector that generates a phase detector output signal that is indicative of a phase error between a feedback signal that is a function of the LO output signal and a reference signal, and a loop filter that filters the phase detector output signal to provide the control signal for the CO. The error compensation subsystem applies, based on the phase detector output signal, a phase rotation to a signal derived from the LO output signal to thereby compensate for a phase error in the signal resulting from a phase error in the local oscillator output signal. | 10-29-2015 |
20150333704 | Method for Class-B Amplifier Mismatch Correction - A calibration solution for a power amplifier array comprising a plurality of amplifier cells is presented that improves the linearity and efficiency of the power amplifier, especially when only a small number of the amplifier cells are active. To that end, a bias control word is selected from a predetermined bias table for each of the active power amplifier cells. An average of the selected bias control words is then used to bias an input stage of each active power amplifier cell. The solution presented herein provides techniques for determining the bias control words, as well as using the bias control words. | 11-19-2015 |