Patent application number | Description | Published |
20100127352 | SELF-ALIGNED BIPOLAR TRANSISTOR STRUCTURE - A bipolar transistor structure comprises a semiconductor substrate having a first conductivity type, a collector region having a second conductivity type that is opposite the first conductivity type formed in a substrate active device region defined by isolation dielectric material formed in an upper surface of the semiconductor substrate, a base region that includes an intrinsic base region having the first conductivity type formed over the collector region and an extrinsic base region having the second conductivity type formed over the isolation dielectric material, and a sloped in-situ doped emitter plug having the second conductivity type formed on the intrinsic base region. | 05-27-2010 |
20110065256 | SYSTEM AND METHOD FOR INCREASING BREAKDOWN VOLTAGE OF LOCOS ISOLATED DEVICES - An efficient method is disclosed for increasing the breakdown voltage of an integrated circuit device that is isolated by a local oxidation of silicon (LOCOS) process. The method comprises forming a portion of a field oxide in an integrated circuit so that the field oxide has a gradual profile. The gradual profile of the field oxide reduces impact ionization in the field oxide by creating a reduced value of electric field for a given value of applied voltage. The reduction in impact ionization increases the breakdown voltage of the integrated circuit. The gradual profile is formed by using an increased thickness of pad oxide and a reduced thickness of silicon nitride during a field oxide oxidation process. | 03-17-2011 |
20120261753 | DMOS Transistor with a Slanted Super Junction Drift Structure - A DMOS transistor with a lower on-state drain-to-source resistance and a higher breakdown voltage utilizes a slanted super junction drift structure that lies along the side wall of an opening with the drain region at the bottom of the opening and the source region near the top of the opening. | 10-18-2012 |
20120273881 | DMOS Transistor with a Cavity that Lies Below the Drift Region - A lateral DMOS transistor formed on a silicon-on-insulator (SOI) structure has a higher breakdown voltage that results from a cavity that is formed in the bulk region of the SOI structure. The cavity exposes a portion of the bottom surface of the insulator layer of the SOI structure that lies directly vertically below the drift region of the DMOS transistor. | 11-01-2012 |
20130248935 | SIGE HETEROJUNCTION BIPOLAR TRANSISTOR WITH A SHALLOW OUT-DIFFUSED P+ EMITTER REGION - A pnp SiGe heterojunction bipolar transistor (HBT) reduces the rate that p-type dopant atoms in the p+ emitter of the transistor out diffuse into a lowly-doped region of the base of the transistor by epitaxially growing the emitter to include a single-crystal germanium region and an overlying single-crystal silicon region. | 09-26-2013 |
20130249057 | SIGE HETEROJUNCTION BIPOLAR TRANSISTOR WITH AN IMPROVED BREAKDOWN VOLTAGE-CUTOFF FREQUENCY PRODUCT - The product of the breakdown voltage (BV | 09-26-2013 |