Patent application number | Description | Published |
20100306604 | METHOD AND CIRCUIT FOR BROWNOUT DETECTION IN A MEMORY SYSTEM - Detecting brown-out in a system having a non-volatile memory (NVM) includes loading data in the NVM, wherein a next step in loading is performed on a location in the NVM that is logically sequential to an immediately preceding loading. A pair of adjacent locations include one with possible data and another that is empty. Determining which of the two, if at all, have experienced brownout includes using two different sense references. One has a higher standard for detecting a logic high and the other higher standard for detecting a logic low. Results from using the two different references are compared. If the results are the same for both references, then there is no brownout. If the results are different for either there has been a brownout. The location with the different results is set to an invalid state as the location that has experienced the brownout. | 12-02-2010 |
20110078362 | OPERATING AN EMULATED ELECTRICALLY ERASABLE (EEE) MEMORY - An emulated electrically erasable memory system includes a random access memory (RAM) and a non-volatile memory (NVM). A write access to the RAM is received which provides first write data and a first address, where the first write data is stored in the RAM at the first address, and a currently filling sector of the NVM is updated to store both the first write data and the first address as a first record. In response to the write access, based on whether there are any remaining active records in an oldest filled sector of the NVM, a portion of an erase process or a transfer of up to a predetermined number of active records from the oldest filled sector to the currently filling sector is performed. The predetermined number of active records is less than a maximum number of total records that may be stored within the oldest filled sector. | 03-31-2011 |
20110107009 | NON-VOLATILE MEMORY CONTROLLER DEVICE AND METHOD THEREFOR - A method of storing information at a non-volatile memory includes storing a status bit prior to storing data at the memory. A second status bit is stored after storing of the data. Because the storage of data is interleaved with the storage of the status bits, a brownout or other corrupting event during storage of the data will likely result in a failure to store the second status bit. Therefore, the first and second status bits can be compared to determine if the data was properly stored at the non-volatile memory. | 05-05-2011 |
20110173373 | NON-VOLATILE MEMORY DEVICE AND METHOD THEREFOR - A method of storing information at a non-volatile memory includes storing a first status bit at a sector header of the memory prior to erasing a sector at the memory. A second status bit is stored after erasing of the sector. Because the erasure of the sector is interleaved with the storage of the status bits, a brownout or other corrupting event during erasure of the record will likely result in a failure to store the second status bit. Therefore, the first and second status bits can be compared to determine if the data was properly erased at the non-volatile memory. Further, multiple status bits can be employed to indicate the status of other memory sectors, so that a difference in the status bits for a particular sector can indicate a brownout or other corrupting event. | 07-14-2011 |
20110271034 | MULTIPLE PARTITIONED EMULATED ELECTRICALLY ERASABLE (EEE) MEMORY AND METHOD OF OPERATION - A method and system wherein a volatile memory is partitioned to have a first percentage of address space dedicated to a first classification of data which is data that is expected to have greater than a predetermined number of times of being modified and a second percentage of address space dedicated to a second classification of data which is data that is expected to have less than the predetermined probability of being modified. Address assignment of data to be stored in the volatile memory is made on a basis of predicted change of the data. Memory addresses of the first and second percentages of address space are respectively assigned to first and second sections of nonvolatile memory. The memory addresses of the first percentage initially consume a smaller percentage of an address map of the first section than the memory addresses of the second percentage of the second section. | 11-03-2011 |
20110271035 | EMULATED ELECTRICALLY ERASABLE (EEE) MEMORY AND METHOD OF OPERATION - A system has an emulation memory having a plurality of sectors for storing information. A controller calculates a number of addresses used divided by a number of valid records in a predetermined address range of the emulation memory. An amount of remaining addresses in a currently used space of the emulation memory which have not been used to store information is calculated. A determination is made whether the calculation is greater than a first predetermined number and whether the amount of remaining addresses is greater than a second predetermined number. If both the fraction is greater than the first predetermined number and the amount of remaining addresses is greater than the second predetermined number, any subsequent update requests are responded to using the currently used space of the emulation memory. Otherwise a compression of the emulation memory is required by copying valid data to an available sector. | 11-03-2011 |
20120005403 | RECOVERY SCHEME FOR AN EMULATED MEMORY SYSTEM - In a system having an emulation memory having a first sector of non-volatile memory for storing information, wherein the non-volatile memory includes a plurality of records, a method includes determining if a last record written of the plurality of records is a compromised record; if the last record written is not a compromised record, performing a next write to a record of the plurality of records that is next to the last record written; and if the last record written is a comprised record: determining an address of the compromised record; writing valid data for the address of the compromised record into the record of the plurality of records that is next to the compromised record; and writing data into a record that is next to the record of the plurality of records that is next to the compromised record. | 01-05-2012 |
20130265828 | SMART CHARGE PUMP CONFIGURATION FOR NON-VOLATILE MEMORIES - A semiconductor memory device includes a non-volatile memory, a memory controller, and a charge pump system. The memory controller establishes first parameters for a first programming cycle of a first plurality of memory cells of the non-volatile memory prior to the first programming cycle being performed. The charge pump system includes a plurality of charge pumps and provides a first programming pulse for use in performing the first program cycle. The first programming pulse is provided by selecting, according to the first parameters, which of the plurality of charge pumps are to be enabled during the first program cycle and which are to be disabled during the first program cycle. | 10-10-2013 |
20130268717 | EMULATED ELECTRICALLY ERASABLE MEMORY HAVING SECTOR MANAGEMENT - A semiconductor memory device comprises a volatile memory and a non-volatile memory including a plurality of sectors. Each of the plurality of sectors configured to store a sector status indicator and a plurality of data records. A control module is coupled to the non-volatile memory and the volatile memory. The control module manages the sectors by scanning the sectors to identify the records with invalid data; changing the status indicator of a particular sector when all of the records in the particular sector are invalid, and discontinuing scanning the particular sector while all of the records in the particular sector are invalid. | 10-10-2013 |
20130290603 | EMULATED ELECTRICALLY ERASABLE MEMORY PARALLEL RECORD MANAGEMENT - A method of transferring data from a non-volatile memory (NVM) having a plurality of blocks of an emulated electrically erasable (EEE) memory to a random access memory (RAM) of the EEE includes accessing a plurality of records, a record from each block. A determination is made if any of the data signals of the first data signals are valid and thereby considered valid data signals. If there is only one or none that are valid, the valid data, if any is loaded into RAM and the process continues with subsequent simultaneous accesses. If more than one is valid, then the processes is halted until the RAM is loaded with the valid data, then the method continues with subsequent simultaneous accesses of records. | 10-31-2013 |
20130346680 | EMULATED ELECTRICALLY ERASABLE MEMORY HAVING AN ADDRESS RAM FOR DATA STORED IN FLASH MEMORY - A memory system comprises a memory controller, an address RAM coupled to the memory controller, and a non-volatile memory coupled to the memory controller. The non-volatile memory has an address portion and a data portion. The address portion of the non-volatile memory provides data portion addresses and data portion addresses of valid data to the memory controller. The memory controller loads the data portion addresses and stores them in the address RAM at locations defined by the data portion addresses of valid data into the address RAM. The memory controller uses the data portion addresses, and locations of data blocks within the address RAM, to locate the data blocks within the data portion of non-volatile memory. The memory controller uses the data portion addresses, and locations of the data block addresses within the address RAM, to locate data blocks within the data portion of non-volatile memory | 12-26-2013 |
20140059398 | ADAPTIVE ERROR CORRECTION FOR NON-VOLATILE MEMORIES - Methods and systems are disclosed for adaptive error correction for non-volatile memories that dynamically adjust sense amplifier read detection windows. Memory control circuitry uses error correction code (ECC) routines to detect bit errors that are non-correctable using these ECC routines. The memory control circuitry then dynamically adjusts sense amplifier read detection windows to allow for correct data to be determined. Corrected data can then be output to external circuitry. The corrected data can also be stored for later access when subsequent read operations attempt to access address locations that previously suffered bit failures. The disclosed methods and systems can also be used with respect to memories that are not non-volatile memories. | 02-27-2014 |
20140082257 | SYSTEMS AND METHODS FOR CODE PROTECTION IN NON-VOLATILE MEMORY SYSTEMS - Methods and systems are disclosed for code protection in non-volatile memory (NVM) systems. Information stored within NVM memory sectors, such as boot code or other code blocks, is protected using lockout codes and lockout keys written in program-once memory areas within the NVM systems. Further, lockout codes can be combined into a merged lockout code that can be stored in a merged protection register. The merged protection register is used to control write access to protected memory sectors. Lockout code/key pairs are written to the program-once area when a memory sector is protected. The program-once area, which stores the lockout code/key pairs, is not readable by external users. Once protected, a memory sector can not be updated without the lockout code/key pair. | 03-20-2014 |
20140244895 | Robust Sector ID Scheme for Tracking Dead Sectors to Automate Search and Copydown - A brownout tolerant EEPROM emulator ( | 08-28-2014 |
20140258792 | Symmetrical Data Replication For Failure Management In Non-Volatile Memory Systems - Methods and systems are disclosed for symmetrical replication of data within multiple data subsystems for failure management in non-volatile memory (NVM) systems. Disclosed embodiments perform symmetrical write operations to multiple different data block subsystems so that duplicate subsystems are created. As the subsystems are operated symmetrically, address locations and pointers are the same for each subsystem. If an error is detected in data within one subsystem, the duplicated data at the same symmetrical location within a duplicate subsystem can be used. As such, the endurance and lifetime of NVM systems is greatly enhanced. These extended lifetime NVM systems can then be used, for example, to emulate EEPROM (erasable programmable read only memory) systems. | 09-11-2014 |
Patent application number | Description | Published |
20100160955 | PERCUTANEOUS CATHETER AND GUIDEWIRE HAVING FILTER AND MEDICAL DEVICE DEPLOYMENT CAPABILITIES - The invention provides a nested tubing cannula which comprises outer and inner elongate tubular members, both having a proximal end, a distal end, and a lumen therebetween. The inner tubular member is sealed at its distal end and is nested substantially coaxially within the lumen of the outer tubular member, so that the gap between the inner and the outer tubular member defines a second lumen whereas the first lumen is the lumen of the inner tubular member. A tubular sleeve is disposed coaxially between the inner and outer tubular members. A balloon is mounted on a distal region of the outer tubular member and is in communication with the first lumen. The cannula further comprises a port proximal or distal the balloon occluder and is in communication with the second lumen. Methods for making the devices herein are disclosed. | 06-24-2010 |
20100222736 | ENDOLUMINAL OCCLUSION-IRRIGATION CATHETER WITH ASPIRATION CAPABILITIES AND METHODS OF USE - A catheter system comprising a guidewire, an endovascular catheter, and an aspiration catheter. The guidewire has an expandable occluder mounted on a distal end. The guidewire and the endovascular catheter are insertable into a lumen of the aspiration catheter. The aspiration catheter also includes infusion and aspiration lumen(s) and port(s). Methods of using the catheter system for treating a vascular lesion and removing embolic material during the procedure are also disclosed. | 09-02-2010 |
20110066177 | GUIDED FILTER WITH SUPPORT WIRE AND METHODS OF USE - A guided filter system for temporary placement of a filter in an artery or vein is disclosed. The system includes a guidewire slideable through a wire guide included in a distal region of a support wire. The support wire has an expandable filter, which is operable between a collapsed or enlarged condition. A variety of endovascular devices, including angioplasty, atherectomy, and stent-deployment catheters, are insertable over the guidewire and/or the support wire. Methods of using the guided filter system to direct and exchange endovascular devices to a region of interest, and to entrap and remove embolic material from the vessel are also disclosed. | 03-17-2011 |
20110224716 | PERCUTANEOUS CATHETER AND GUIDEWIRE HAVING FILTER AND MEDICAL DEVICE DEPLOYMENT CAPABILITIES - The invention provides a nested tubing cannula which comprises outer and inner elongate tubular members, both having a proximal end, a distal end, and a lumen therebetween. The inner tubular member is sealed at its distal end and is nested substantially coaxially within the lumen of the outer tubular member, so that the gap between the inner and the outer tubular member defines a second lumen whereas the first lumen is the lumen of the inner tubular member. A tubular sleeve is disposed coaxially between the inner and outer tubular members. A balloon is mounted on a distal region of the outer tubular member and is in communication with the first lumen. The cannula further comprises a port proximal or distal the balloon occluder and is in communication with the second lumen. Methods for making the devices herein are disclosed. | 09-15-2011 |