Patent application number | Description | Published |
20080206933 | SEMICONDUCTOR FIN INTEGRATION USING A SACRIFICIAL FIN - There is a method for forming a semiconductor device. Portions of a sacrificial layer are removed to expose a first seed layer region. The first seed layer region corresponds to a first semiconductor region, and a remaining portion of the sacrificial layer corresponds to a second semiconductor region. An epitaxial semiconductor material is deposited over the first seed layer region. A capping layer is formed to overlie the epitaxial semiconductor material and the remaining portion of the sacrificial layer. Portions of the capping layer are removed to form a capping structure that overlies a part of the remaining portion of the sacrificial layer. Portions of the sacrificial layer not covered by the capping structure are removed to form a sacrificial structure having sidewalls. Fin structures are formed adjoining the sidewalls by depositing a semiconductor material along the sidewalls. Portions of the capping structure are removed to expose portions of sacrificial layer between adjacent fin structures. Portions of the sacrificial material between the adjacent fin structures are removed. | 08-28-2008 |
20080206934 | FORMING SEMICONDUCTOR FINS USING A SACRIFICIAL FIN - A semiconductor device is made by steps of removing portions of a first capping layer, removing portions of a sacrificial layer, recessing sidewalls, and forming fin structures. The step of removing portions of the first capping layer forms a first capping structure that covers portions of the sacrificial layer. The step of removing portions of the sacrificial layer removes portions of the sacrificial layer that are not covered by the first capping structure to define an intermediate structure. The step of recessing the sidewalls recesses sidewalls of the intermediate structure relative to edge regions of the first capping structure to form a sacrificial structure having recessed sidewalls. The step of forming fin structures forms fin structures adjacent to the recessed sidewalls. | 08-28-2008 |
20080206984 | CONDUCTIVE VIA FORMATION UTILIZING ELECTROPLATING - A method for forming a conductive via is discussed and includes forming a seed layer over a first side of a semiconductor substrate, wherein the semiconductor substrate includes a first side opposite a second side, forming a via hole in a semiconductor substrate from the second side of the semiconductor substrate, wherein the via hole exposes the seed layer; and electroplating a conductive via material in the via hole from the seed layer. In one embodiment, a continuous conductive layer is formed over and electrically coupled to the seed layer. The continuous conductive layer can serve as the current source while electroplating the conductive via material. | 08-28-2008 |
20090086524 | PROGRAMMABLE ROM USING TWO BONDED STRATA AND METHOD OF OPERATION - A read only memory implemented as a 3D integrated device has a first stratum, a second stratum, and bonded inter-strata connections for coupling the first stratum to the second stratum. The physical bonding between the two strata implements the programming of the read only memory. The stratum may be in wafer form or in die form. The first stratum includes functional active devices and at least one non-programmed active device. The second stratum includes at least conductive routing to be associated with the at least one non-programmed active device. The bonded inter-strata connections include at least one bonded programmable inter-strata connection for programming the at least one non-programmed active device and for providing conductive routing to the programmed active device. The two strata thus form a programmed ROM. Other types of programmable storage devices may be implemented by bonding the two strata. | 04-02-2009 |
20100127345 | 3-D CIRCUITS WITH INTEGRATED PASSIVE DEVICES | 05-27-2010 |
20100276735 | SEMICONDUCTOR DEVICE WITH PHOTONICS - A method for forming a semiconductor structure having a transistor region and an optical device region includes forming a transistor in and on a first semiconductor layer of the semiconductor structure, wherein the first semiconductor layer is over a first insulating layer, the first insulating layer is over a second semiconductor layer, and the second semiconductor layer is over a second insulating layer, wherein a gate dielectric of the transistor is in physical contact with a top surface of the first semiconductor layer, and wherein the transistor is formed in the transistor region of the semiconductor structure. The method also includes forming a waveguide device in the optical device region, wherein forming the waveguide device includes exposing a portion of the second semiconductor layer in the optical device region; and epitaxially growing a third semiconductor layer over the exposed portion of the second semiconductor layer. | 11-04-2010 |
20110027950 | METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A PHOTODETECTOR - A method is provided for integrating a germanium photodetector with a CMOS circuit. The method comprises: forming first and second isolation regions in a silicon substrate; forming a gate electrode in the first isolation region; implanting source/drain extensions in the silicon substrate adjacent to the gate electrode; forming a first sidewall spacer on the gate electrode; implanting source/drain regions in the silicon substrate; removing the first sidewall spacer from the gate electrode; forming a first protective layer over the first and second isolation regions; removing a portion of the first protective layer to form an opening over the second isolation region; forming a semiconductor material comprising germanium in the opening; forming a second protective layer over the first and second isolation regions; selectively removing the first and second protective layers from the first isolation region; and forming contacts to the transistor and to the semiconductor material. | 02-03-2011 |
20120080730 | SEMICONDUCTOR DEVICE WITH PHOTONICS - A semiconductor structure having a transistor region and an optical device region includes a transistor in a first semiconductor layer of the semiconductor structure, wherein the first semiconductor layer is over a first insulating layer, the first insulating layer is over a second semiconductor layer, and the second semiconductor layer is over a second insulating layer. A gate dielectric of the transistor is in physical contact with a top surface of the first semiconductor layer, and the transistor is formed in the transistor region of the semiconductor structure. A waveguide device in the optical device region and a third semiconductor layer over a portion of the second semiconductor layer. | 04-05-2012 |
20130143367 | METHODS OF FORMING 3-D CIRCUITS WITH INTEGRATED PASSIVE DEVICES - Methods of forming 3-D ICs with integrated passive devices (IPDs) include stacking separately prefabricated substrates coupled by through-substrate-vias (TSVs). An active device (AD) substrate has contacts on its upper portion. An isolator substrate is bonded to the AD substrate so that TSVs in the isolator substrate are coupled to the contacts on the AD substrate. An IPD substrate is bonded to the isolator substrate so that TSVs therein are coupled to an interconnect zone on the isolator substrate and/or TSVs therein. The IPDs of the IPD substrate are coupled by TSVs in the IPD and isolator substrates to devices in the AD substrate. The isolator substrate provides superior IPD to AD cross-talk attenuation while permitting each substrate to have small high aspect ratio TSVs, thus facilitating high circuit packing density and efficient manufacturing. | 06-06-2013 |
20140332980 | METHODS OF FORMING 3-D CIRCUITS WITH INTEGRATED PASSIVE DEVICES - Methods of forming 3-D ICs with integrated passive devices (IPDs) include stacking separately prefabricated substrates coupled by through-substrate-vias (TSVs). An active device (AD) substrate has contacts on its upper portion. An isolator substrate is bonded to the AD substrate so that TSVs in the isolator substrate are coupled to the contacts on the AD substrate. An IPD substrate is bonded to the isolator substrate so that TSVs therein are coupled to an interconnect zone on the isolator substrate and/or TSVs therein. The IPDs of the IPD substrate are coupled by TSVs in the IPD and isolator substrates to devices in the AD substrate. The isolator substrate provides superior IPD to AD cross-talk attenuation while permitting each substrate to have small high aspect ratio TSVs, thus facilitating high circuit packing density and efficient manufacturing. | 11-13-2014 |
Patent application number | Description | Published |
20100298842 | BURR HOLE CAP AND METHODS OF USE - In one embodiment, an apparatus comprises: a base structure adapted to be inserted within the burr hole; a lead securing member for securing the lead, the lead securing member comprising a first arm structure and a second arm structure, at least one spring loaded structure adapted to exert a force to bring the first arm structure and the second arm structure together; and a positioning tool having a distal end adapted to be inserted within the lead securing member. When the positioning tool is positioned within the lead securing member, the distal end holds the first and second arm structures a sufficient distance apart to receive a lead between the first and second arm structures; wherein the positioning tool comprises a control structure at a proximal end that, when engaged, causes the distal end of the positioning tool to be released from between the first and second arm structures. | 11-25-2010 |
20110004281 | IMPLANTABLE ANCHOR WITH LOCKING CAM - There is disclosed various embodiments of an implantable anchor for anchoring a medical lead within a patient. The implantable anchor includes a body having at least one lumen for receiving a medical lead, a cam integrated with the body and rotatable to extend into the lumen for engaging the medical lead and inhibiting the movement of the lead with respect to the anchor. The cam may include a handle for facilitating the rotation of the cam. A needle could be connected to the handle to facilitate the securing of the anchor to a portion of the patient. | 01-06-2011 |
20110144655 | BURR HOLE CAPS AND METHODS OF USE - In one embodiment, an apparatus comprises: a base structure adapted to be inserted within the burr hole; a lead securing member for securing the lead, the lead securing member comprising a first arm structure and a second arm structure, at least one spring loaded structure adapted to exert a force to bring the first arm structure and the second arm structure together; and a positioning tool having a distal end adapted to be inserted within the lead securing member. When the positioning tool is positioned within the lead securing member, the distal end holds the first and second arm structures a sufficient distance apart to receive a lead between the first and second arm structures; wherein the positioning tool comprises a control structure at a proximal end that, when engaged, causes the distal end of the positioning tool to be released from between the first and second arm structures. | 06-16-2011 |
20130035730 | IMPLANTABLE PULSE GENERATOR - In one embodiment, there is disclosed a lead locking mechanism for use in a header component of an implantable pulse generator. In certain embodiments, the lead locking mechanism comprises a first locking member positioned to engage a surface of at least two leads; a second locking member positioned to also engage a surface of at least two leads, and a coupling member coupling the first locking member to the second locking member. | 02-07-2013 |
20130138191 | IMPLANTABLE ANCHOR WITH LOCKING CAM - There is disclosed various embodiments of an implantable anchor for anchoring a medical lead within a patient. The implantable anchor includes a body having at least one lumen for receiving a medical lead, a cam integrated with the body and rotatable to extend into the lumen for engaging the medical lead and inhibiting the movement of the lead with respect to the anchor. The cam may include a handle for facilitating the rotation of the cam. A needle could be connected to the handle to facilitate the securing of the anchor to a portion of the patient. | 05-30-2013 |