Patent application number | Description | Published |
20130289022 | TETRAMERIC ALPHA-SYNUCLEIN AND USE THEREOF - Disclosed herein are methods and related compositions for identifying compounds that stabilize natively folded tetrameric α-synuclein. These methods and compositions are useful for the treatment and diagnosis of α-synuclein-associated diseases and disorders. | 10-31-2013 |
20130309690 | TETRAMERIC ALPHA-SYNUCLEIN AS BIOMARKERS - The present invention provides the surprising finding that alpha-synuclein exists in vivo as a folded tetramer. Provided are various methods and technologies that arise from this finding, including methods and kits for identifying individuals susceptible to or suffering from certain diseases, disorders or conditions associated with stability of alpha-synuclein tetramers, and/or individuals likely (or not) to respond to therapy with agents that alter level and/or stability of alpha-synuclein tetramers. | 11-21-2013 |
20130316384 | ICE-CLEAVED ALPHA-SYNUCLEIN AS A BIOMARKER - The present disclosure provides ICE-cleaved alpha-synuclein fragments as biomarkers for alpha-synuclein-associated disease or disorder and/or for ICE-regulator therapy. | 11-28-2013 |
20140288145 | TREATMENT OF AMYLOIDOSIS BY COMPOUNDS THAT REGULATE RETROMER STABILIZATION - The present invention provides pharmaceutical compositions and related methods for stabilizing retromer in cells. | 09-25-2014 |
20140309172 | ICE INHIBITING COMPOUNDS AND USES THEREOF - The present disclosure identifies caspase-1/ICE as a therapeutic target for α-synuclein associated diseases and disorders. Related methods and compositions are also provided. | 10-16-2014 |
20150259391 | TREATMENT OF AMYOTROPHIC LATERAL SCLEROSIS - Nonsense-mediated mRNA decay (NMD) polypeptides, nucleic acids encoding NMD polypeptides, and methods of using such polypeptides and nucleic acids in the treatment of ALS and in screening for agents for the treatment of ALS are described. | 09-17-2015 |
20150361063 | TREATMENT OF AMYLOIDOSIS BY COMPOUNDS THAT REGULATE RETROMER STABILIZATION - The present invention provides pharmaceutical compositions and related methods for stabilizing retromer in cells. | 12-17-2015 |
Patent application number | Description | Published |
20080216042 | Method and Computer System for Otimizing the Signal Time Behavior of an Electronic Circuit Design - A method and program for designing an electronic circuit, especially a clock tree and a sub-clock tree, within a set of sinks with given target arrival time windows, preferably on an integrated circuit. The clock tree and the sub-clock tree are preferably connected through one or multiple fixed circuits which must not be altered, cloned or removed. Several alternative implementations of the at least one logic structure are built and for each of the several alternative implementations data is stored. A set of configurations is built, each configuration comprising a combination of the one or several alternative implementations and each configuration satisfying the target arrival time windows at the complete set of sinks. A configuration is selected according to an evaluation of the data, preferably latency data, for constructing the configuration. No manual interaction is needed and a configuration with minimum latencies is provided. | 09-04-2008 |
20080216043 | Structure for Optimizing the Signal Time Behavior of an Electronic Circuit Design - A design structure for designing an electronic circuit, especially a clock tree and a sub-clock tree, within a set of sinks with given target arrival time windows, preferably on an integrated circuit designed by an IC design house or other circuit design provider. The clock tree and the sub-clock tree are preferably connected through one or multiple fixed circuits which must not be altered, cloned or removed. Several alternative implementations of the at least one logic structure are built and for each of the several alternative implementations data is stored. A set of configurations is built, each configuration comprising a combination of the one or several alternative implementations and each configuration satisfying the target arrival time windows at the complete set of sinks. A configuration is selected according to an evaluation of the data, preferably latency data, for constructing the configuration. No manual interaction is needed and a configuration with minimum latencies is provided. | 09-04-2008 |
20090064069 | METHOD AND SYSTEM FOR GENERATING A LAYOUT FOR AN INTEGRATED ELECTRONIC CIRCUIT - A method to provide optimization between synthesis and layout in modern integrated circuit design, the method includes the steps of:
| 03-05-2009 |
20090083689 | GRIDDED-ROUTER BASED WIRING ON A NON-GRIDDED LIBRARY - A computerized method for automatically generating a grid-based derivative of a non-gridded cell library of an integrated circuit design comprises the step of determining at least one valid position of at least one wiring element of a circuit of the first cell library, wherein the at least one valid position fulfills all technological design rules and wherein the at least one valid position fits into the second grid format. The method can also be used for automatically transforming a first cell library of an integrated circuit design having a first grid format into a second cell library having a second grid format or for automatically analyzing a grid-based cell library of an integrated circuit design in view of the circuit quality regarding technical design rules. | 03-26-2009 |
20120144362 | METHOD AND DATA PROCESSING SYSTEM TO OPTIMIZE PERFORMANCE OF AN ELECTRIC CIRCUIT DESIGN, DATA PROCESSING PROGRAM AND COMPUTER PROGRAM PRODUCT - A method to optimize performance of an electric circuit design is disclosed. The method comprises providing for each circuit element of the electric circuit design available design parameter options; transforming the electric circuit design and the design parameter options into a linear programming model; determining a solution for the linear programming model; and based on the solution generating a list of circuit elements which design parameters need to be changed to a different option to achieve performance optimization. | 06-07-2012 |
20140157221 | TECHNIQUES FOR ROUTING SIGNAL WIRES IN AN INTEGRATED CIRCUIT DESIGN - A technique for routing signal wires in an integrated circuit design includes applying a first rule that attempts to route a signal wire along existing power supply shapes of the integrated circuit design and applying a second rule that provides shield wires along segments of the signal wire that are not routed along one of the existing power supply shapes. The technique also includes routing the signal wire between a first endpoint and a second endpoint while applying the first and second rules to substantially minimize a route cost for the signal wire between the first and second endpoints. | 06-05-2014 |