Patent application number | Description | Published |
20130013969 | BUS TRANSACTION MONITORING AND DEBUGGING SYSTEM USING FPGA - The various embodiments herein provide a method and a system for providing a bus transaction monitoring and debugging using FPGA. The system comprises a first FPGA, a second FPGA, application software and a communication interface to connect the second FPGA with the application software. The second FPGA comprises a monitor RTL for tapping data signals from different levels of the first FPGA, a transaction based signal trigger for capturing the signals tapped at different levels of the RTL, a monitor data interface for storing the data signals of interest and a packetizer for converting the signals to a plurality of data packets and transmit the data packets to the application software. The application software decodes the transmitted data packets and displays the transactions on a waveform viewer by communicating the information related to the data packets using a plurality of communication protocols. | 01-10-2013 |
20130014066 | METHOD AND SYSTEM FOR TEST VECTOR GENERATION - The various embodiments of the present invention provide a method for automatically generating a unique set of test vectors for verifying design intent of integrated circuit chips. The method includes obtaining configuration parameters associated with a plurality of integrated circuit chips, generating an Executable Verification Plan pertaining to the configuration parameters of a plurality of integrated circuit chips in one or more execution PCs (EPs), creating a plurality of data structures corresponding to the configuration parameters, communicating the data structures created to a DCMS server, mapping the data structures of the Execution PCs with one or more data structures present in a database of the DCMS server, customizing the executable verification plan based on changes in the configurations of the integrated circuit chips, generating a unique set of test vectors based on mapping of the data structures and performing automatic design verification of the plurality of integrated circuit chips. | 01-10-2013 |
20130014077 | METHOD AND SYSTEM FOR CREATING AN EXECUTABLE VERIFICATION PLAN - The various embodiments herein provide a method and a system for creating a verification plan in executable structure for verifying a product specification using a web user interface. The method comprises collecting the input parameters through a web user interface. The input parameters are stored in a temporary storage are converted to an object with a format such as XML. An interconnected structure of the related objects is created and transformed into a plurality of complex objects for generating a plurality of features. The stored information is fetched and processed by inserting the structure values into a permanent file based on header tag to identify an object. An output for the processed information is generated and displayed through the web user interface. The milestones of the product are directly mapped to the features for generating the features of the product. | 01-10-2013 |
20130067280 | METHOD AND SYSTEM FOR PROVIDING A RANDOM SEQUENCE COVERAGE - The various embodiments of the present invention provide a method and system for providing random sequence coverage. The method comprising receiving a plurality of data packet packets carrying transaction data from a transaction database, specifying transactions in a configuration file along with the transaction data, identifying one or more fields in the packets received from the transaction database, generating an automatic random sequence based on the identification of at least one of a field among the one or more fields in the data packets, generating a coverage report for the random sequence generated automatically and determining uncovered sequences based on the coverage report generated. The system comprises a transaction database for storing transaction data during simulation, a transaction viewer for providing transactions data packets, an auto sequence generator module for generating an automatic random sequence and a report generator module for generating a coverage report for the random sequence generated. | 03-14-2013 |
Patent application number | Description | Published |
20140281116 | Method and Apparatus to Speed up the Load Access and Data Return Speed Path Using Early Lower Address Bits - A microprocessor implemented method for processing a load instruction is disclosed. The method comprises computing a virtual address corresponding to the load instruction. Next, it comprises performing a lookup of a set associative translation lookaside buffer (TLB) and a set associative data cache memory in parallel using early calculated lower address bits of the virtual address. Subsequently, it comprises retrieving a set of entries from the TLB corresponding to a first group of lower address bits transmitted to the TLB, wherein the set of entries comprise a plurality of virtual addresses and corresponding physical addresses. Further, it comprises finding a matching entry for the virtual address in the set of entries using upper bits of the virtual address, wherein the matching entry comprises a physical address corresponding to the virtual address. Finally, it comprises finding a matching entry in the data cache memory using the physical address. | 09-18-2014 |
20140281242 | METHODS, SYSTEMS AND APPARATUS FOR PREDICTING THE WAY OF A SET ASSOCIATIVE CACHE - A method for predicting a way of a set associative shadow cache is disclosed. As a part of a method, a request to fetch a first far taken branch instruction of a first cache line from an instruction cache is received, and responsive to a hit in the instruction cache, a predicted way is selected from a way array using a way that corresponds to the hit in the instruction cache. A second cache line is selected from a shadow cache using the predicted way and the first cache line and the second cache line are forwarded in the same clock cycle. | 09-18-2014 |
20140282546 | METHODS, SYSTEMS AND APPARATUS FOR SUPPORTING WIDE AND EFFICIENT FRONT-END OPERATION WITH GUEST-ARCHITECTURE EMULATION - Methods for supporting wide and efficient front-end operation with guest architecture emulation are disclosed. As a part of a method for supporting wide and efficient front-end operation, upon receiving a request to fetch a first far taken branch instruction, a cache line that includes the first far taken branch instruction, a next cache line and a cache line located at the target of the first far taken branch instruction is read. Based on information that is accessed from a data table, the cache line and either the next cache line or the cache line located at the target is fetched in a single cycle. | 09-18-2014 |
20140304492 | METHOD AND APPARATUS TO INCREASE THE SPEED OF THE LOAD ACCESS AND DATA RETURN SPEED PATH USING EARLY LOWER ADDRESS BITS - A microprocessor implemented method for resolving dependencies for a load instruction in a load store queue (LSQ) is disclosed. The method comprises initiating a computation of a virtual address corresponding to the load instruction in a first clock cycle. It also comprises transmitting early calculated lower address bits of the virtual address to a load store queue (LSQ) in the same cycle as the initiating. Finally, it comprises performing a partial match in the LSQ responsive to and using the lower address bits to find a prior aliasing store, wherein the prior aliasing store stores to a same address as the load instruction. | 10-09-2014 |
20140317351 | METHOD AND APPARATUS FOR PREVENTING NON-TEMPORAL ENTRIES FROM POLLUTING SMALL STRUCTURES USING A TRANSIENT BUFFER - A method for preventing non-temporal entries from entering small critical structures is disclosed. The method comprises transferring a first entry from a higher level memory structure to an intermediate buffer. It further comprises determining a second entry to be evicted from the intermediate buffer and a corresponding value associated with the second entry. Subsequently, responsive to a determination that the second entry is frequently accessed, the method comprises installing the second entry into a lower level memory structure. Finally, the method comprises installing the first entry into a slot previously occupied by the second entry in the intermediate buffer. | 10-23-2014 |
Patent application number | Description | Published |
20090013070 | SYSTEM AND METHOD FOR PROVIDING NETWORK APPLICATION PERFORMANCE MANAGEMENT IN A NETWORK - The present invention relates to a system and method for network performance management for monitoring performance of network applications. The system comprises a transmitter for sending one or more types of probe packets to the network, a receiver for receiving the one or more network probe packets from the network and for receiving one or more network application performance queries from one or more network applications, a processor connected to the transmitter and the receiver and operable to process network probe packets received by the receiver to generate network performance statistics for each type of probe packet and to look up the network application performance requirements of the one or more network applications and compare the network application performance requirements with the corresponding network performance statistics to determine whether the network application should access the network. Network performance statistics may be obtained using lean packet probes, using real traffic test streams or obtaining network performance statistics from a service provider. Thus by providing a probe, lookup, feedback methodology, network parameters, or network application requirements, may be adjusted to meet performance requirements of one or more network applications. | 01-08-2009 |
20090279444 | Method and apparatus for discovering, negotiating, and provisioning end-to-end SLAs between multiple service provider domains - Domains (multiple collaborating service providers) create service offerings between pairs of edge nodes that interconnect with other domains in the network. The service offerings may specify the available bandwidth, quality of service, reliability, available security, price, subscriber and service contextual specific and other SLA information. When a new service is to be created, the service definition is used along with information about the available service offerings to determine a set of networks to implement the service. Information associated with the service offerings may be flooded to all other networks. Alternatively, the service offering information may be provided to a trusted third party (SLA broker) which may provide SLA services on the network to select sets of domains to implement inter-domain services, and may also proxy to set up the service for the SLA requesting party. A hybrid approach may also be used wherein some SLA information is flooded and other information is retained in secret and provided only to the SLA broker. | 11-12-2009 |
20110161526 | Method and Apparatus for Discovering, Negotiating, and Provisioning End-to-End SLAS Between Multiple Service Provider Domains - Domains (multiple collaborating service providers) create service offerings between pairs of edge nodes that interconnect with other domains in the network. The service offerings may specify the available bandwidth, quality of service, reliability, available security, price, subscriber and service contextual specific and other SLA information. When a new service is to be created, the service definition is used along with information about the available service offerings to determine a set of networks to implement the service. Information associated with the service offerings may be flooded to all other networks. Alternatively, the service offering information may be provided to a trusted third party (SLA broker) which may provide SLA services on the network to select sets of domains to implement inter-domain services, and may also proxy to set up the service for the SLA requesting party. A hybrid approach may also be used wherein some SLA information is flooded and other information is retained in secret and provided only to the SLA broker. | 06-30-2011 |
20150089057 | METHOD AND APPARATUS FOR DISCOVERING, NEGOTIATING, AND PROVISIONING END-TO-END SLAS BETWEEN MULTIPLE SERVICE PROVIDER DOMAINS - Domains (multiple collaborating service providers) create service offerings between pairs of edge nodes that interconnect with other domains in the network. The service offerings may specify the available bandwidth, quality of service, reliability, available security, price, subscriber and service contextual specific and other SLA information. When a new service is to be created, the service definition is used along with information about the available service offerings to determine a set of networks to implement the service. Information associated with the service offerings may be flooded to all other networks. Alternatively, the service offering information may be provided to a trusted third party (SLA broker) which may provide SLA services on the network to select sets of domains to implement inter-domain services, and may also proxy to set up the service for the SLA requesting party. A hybrid approach may also be used. | 03-26-2015 |