Patent application number | Description | Published |
20090134897 | APPARATUS AND METHOD FOR LIMITING OVER TRAVEL IN A PROBE CARD ASSEMBLY - Methods and apparatuses for testing semiconductor devices are disclosed. Over travel stops limit over travel of a device to be tested with respect to probes of a probe card assembly. Feedback control techniques are employed to control relative movement of the device and the probe card assembly. A probe card assembly includes flexible base for absorbing excessive over travel of the device to be tested with respect to the probe card assembly. | 05-28-2009 |
20150035638 | INTEGRATION OF A COIL AND A DISCONTINUOUS MAGNETIC CORE - A particular device includes a coil and a discontinuous magnetic core. The discontinuous magnetic core includes a first elongated portion, a second elongated portion, and at least two curved portions, where the portions are coplanar and physically separated from each other. The discontinuous magnetic core is arranged to form a discontinuous loop. The discontinuous magnetic core is deposited as a first layer above a dielectric substrate. A first portion of the coil extends above a first surface of the magnetic core. A second portion of the coil extends below a second surface of the magnetic core. The second portion of the coil is electrically coupled to the first portion of the coil. The second surface of the magnetic core is opposite the first surface of the magnetic core. | 02-05-2015 |
20150091179 | SEMICONDUCTOR DEVICE WITH VIA BAR - A semiconductor device comprising a second surface of a logic die and a second surface of a via bar coupled to a first surface of a substrate, a second surface of a memory die coupled to a first surface of the via bar, a portion of the second surface of the memory die extending over the first surface of the logic die, such that the logic die and the memory die are vertically staggered, and the memory die electrically coupled to the logic die through the via bar. The via bar can be formed from glass, and include through-glass vias (TGVs) and embedded passives such as resistors, capacitors, and inductors. The semiconductor device can be formed as a single package or a package-on-package structure with the via bar and the memory die encapsulated in a package and the substrate and logic die in another package. | 04-02-2015 |
20150179731 | EMBEDDED THREE-DIMENSIONAL CAPACITOR - An embedded capacitor is provided that includes a substrate having a dielectric-filled window. A metal-insulator-metal structure lines a plurality of vias extending through the dielectric-filled window and covers at least partially opposing sides of the dielectric-filled window. | 06-25-2015 |
20150219457 | STACKED LATERAL OVERLAP TRANSDUCER (SLOT) BASED THREE-AXIS ACCELEROMETER - This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for making and using accelerometers. Some such accelerometers include a substrate, a first plurality of electrodes, a second plurality of electrodes, a first anchor attached to the substrate, a frame and a proof mass. The substrate may extend substantially in a first plane. The proof mass may be attached to the frame, may extend substantially in a second plane and may be substantially constrained for motion along first and second axes. The frame may be attached to the first anchor, may extend substantially in a second plane and may be substantially constrained for motion along the second axis. A lateral movement of the proof mass in response to an applied lateral acceleration along the first or second axes may result in a change in capacitance at the first or second plurality of electrodes. | 08-06-2015 |
20150228712 | HIGH QUALITY FACTOR CAPACITORS AND METHODS FOR FABRICATING HIGH QUALITY FACTOR CAPACITORS - Provided are space-efficient capacitors that have a higher quality factor than conventional designs and improve coupling of electrical energy from a through-glass via (TGV) to a dielectric. For example, provided is a TGV having a non-rectangular cross-section, where one end of the TGV is coupled to a first metal plate. A dielectric material is formed on the first metal plate. A second metal plate is formed on the dielectric material in a manner that overlaps at least a portion of the first metal plate to form at least one overlapped region of the dielectric material. At least a part of the perimeter of the overlapped region is non-planar. The overlapped region can be formed in a shape of a closed ring, in a plurality of portions of a ring shape, in substantially a quarter of a ring shape, and/or in substantially a half of a ring shape. | 08-13-2015 |
20150250058 | INTEGRATED INTERPOSER WITH EMBEDDED ACTIVE DEVICES - An integrated interposer between a first component and a second component includes a substrate. The substrate may have thermal and/or mechanical properties with values lying between the thermal and/or mechanical properties of the first component and the second component. Active devices are disposed on a first surface of the substrate. A contact layer is coupled to the active devices and configured to couple at least the first component and a third component to the integrated interposer. At least one through via(s) is coupled to the contact layer and extends through the substrate to a second surface of the substrate. An interconnect layer is disposed on the second surface of the substrate and coupled to the at least one through via(s). The interconnect layer is configured to couple the second component to the integrated interposer. | 09-03-2015 |