Patent application number | Description | Published |
20100331039 | INTEGRATED POLY-PHASE FIR FILTER IN DOUBLE-SAMPLED ANALOG TO DIGITAL CONVERTERS - A sigma delta analog to digital converter includes a clock operating at a conversion clock rate and first and second conversion paths. The first path includes a first sigma delta modulator configured to produce from an input analog signal a first bit stream at the clock rate, and a first digital filter configured to decimate the first bit stream. The second conversion path has a second sigma delta modulator configured to produce from the input analog signal a second bit stream separate from the first bit stream at the clock rate, and a second digital filter configured to decimate the second bit stream. | 12-30-2010 |
20110043398 | CASCADED DAC ARCHITECTURE WITH PULSE WIDTH MODULATION - An embodiment of the invention provides one or more cascade circuits that are cascaded together to form a cascaded circuit. The cascaded circuit reduces noise at an analog output of the cascaded circuit. Each of the cascade circuits contains a noise-shaping circuit, a PCM (Pulse Code Modulation)-to-PWM (Pulse Width Modulation) converter and a 1-bit P-tap AFIR (Analog Finite Impulse Response) filter DAC. Noise at the output of the cascaded circuit may be further reduced by increasing the number of cascade circuits. | 02-24-2011 |
20110267210 | Shaping Inter-Symbol-Interference in Sigma Delta Converter - A signal converting system is described that has a multi-segment digital to analog converter coupled to one or more error shaping loops. Each error shaping loop includes a quantizer with a feedback loop configured to generate a control signal responsive to a stream of symbols and to an error signal. Each error shaping loop also includes an inter-symbol-interference (ISI) shaping loop coupled to receive the control signal and to produce an ISI portion of the error signal that is responsive to inter-symbol transition rate. | 11-03-2011 |
20110285433 | SYSTEM AND METHOD FOR CORRECTING PHASE NOISE IN DIGITAL-TO-ANALOG CONVERTER OR ANALOG-TO-DIGITAL CONVERTER - A circuit includes a digital oscillator, a phase lock loop (PLL), a digital signal generator, a correction circuit and a digital-to-analog converter DAC (DAC). The digital oscillator can output a reference clock signal. The PLL can output a system clock signal based on the reference clock signal. The digital signal generator can output a digital signal based on the system clock signal. The correction circuit can output a pre-distorted signal based on the reference clock signal, the system clock signal and the digital signal. The DAC can output an analog signal based on the pre-distorted signal and the system clock signal. | 11-24-2011 |
Patent application number | Description | Published |
20120286868 | CLASS D POWER AMPLIFIER - A class D power amplifier (PA) is provided. The PA generally comprises a driver, output capacitor, a matching network, and a cancellation circuit. The driver has an input, an output, and a parasitic capacitance, and the input of the driver is configured to receive complementary first and second radio frequency (RF) signals, where there is a free-fly interval between consecutive pulses from the first and second RF signals. The output capacitor and cancellation circuit are each coupled to the output of the driver such that the cancellation circuit provides harmonic restoration at least during the free-fly interval, and the matching network is coupled to the output capacitor. | 11-15-2012 |
20120306678 | Three-level digital-to-analog converter - A system for processing a signal includes a detector configured to detect a two-level stream of bits; a converter configured to generate a three-level control signal based on two adjacent values within the two-level stream of bits; and a switch configured to determine which of three different paths to couple a current source to based on a value of the three-level control signal. Thus, based on adjacent values of the output stream a three-level control signal is generated which controls coupling of the current source to one of three different paths. This type of three-level digital-to-analog converter can be, for example, part of the feedback loop of an analog-to-digital converter. Similar techniques can also be utilized in a multi-segment digital-to-analog converter in which each segment of the DAC is controlled by a 3-level control signal and the DAC is implement using PMOS devices. The current source for each DAC segment is diverted to ground, the M-node, or the P-node depending on the value of the 3-level control signal. | 12-06-2012 |
20130147533 | PHASE AVERAGED PULSE WIDTH MODULATOR - A method is provided. A noise shaped signal having a plurality of instants is generated with each instant being associated with at least one of a plurality of output levels. A next phase is selected for each instant, where each next phase is a circularly shifted phase based at least in part on a previous phase for the associated output level for its instant. A plurality of PWM signals is then generated using the phase for each instant, and an amplified signal is generated from the plurality of PWM signals. | 06-13-2013 |
20130148760 | TRANSFORMER POWER COMBINER WITH FILTER RESPONSE - A method for generating an amplified radio frequency (RF) signal is provided. In-phase (I) and quadrature (Q) signals are received and interleaved so as to generate a time-interleaved signal. Delayed time-interleaved signals are then generated from the time interleaved signal, and each of the delayed time-interleaved signals is amplified so as to generate a plurality of amplified signals. The amplified signals are then combined with a transformer, where the delayed time-interleaved signals are arranged to generate a filter response with the transformer. | 06-13-2013 |
20130156089 | DIGITAL TIME-INTERLEAVED RF-PWM TRANSMITTER - A method for transmitting radio frequency (RF) signals is provided. In-phase (I) and quadrature (Q) signals are received and filtered using sigma-delta modulation. I and Q pulse width modulation signals are generated from the filtered I and Q signals and interleaved so as to generate a time-interleaved signal. The time-interleaved signal is then amplified to generate the RF signals. | 06-20-2013 |
20130210376 | LINC TRANSMITTER WITH IMPROVED EFFICIENCY - A radio frequency (RF) transmitter is provided. The RF transmitter includes first and second drivers that are configured to receive first and second sets of complementary RF signals. Restoration circuits are coupled to the first and second drivers, and a bridge circuit is coupled to the first and second restoration circuits. By having the restoration circuits and the bridge circuit, a common mode impedance and a differential impedance can be provided, where the common mode impedance is lower than the differential impedance. | 08-15-2013 |
20130234795 | FREE-FLY CLASS D POWER AMPLIFIER - A method is provided. A first enable signal is asserted so as to enable a first driver, where the first driver has a first output and a first parasitic capacitance. A second enable signal is asserted so as to enable a second driver, where the second driver has a second output and a second parasitic capacitance. The first and second outputs are coupled together by a switching network when the second driver is enabled. Pulses from complementary first and second radio frequency (RF) signals are applied to the first driver, where there is a first set of free-fly intervals between consecutive pulses from the first and second RF signals, and pulses from complementary third and fourth RF signals are applied to the second driver, wherein there is a second set of free-fly interval between consecutive pulses from the third and fourth RF signals. | 09-12-2013 |
20130241663 | PULSE WIDTH MODULATION SCHEME WITH REDUCED HARMONICS AND SIGNAL IMAGES - A method is provided. An input signal is received, and a noise-shaped signal is generated from the input signal. The noise-shaped signal is formed from a plurality of noise-shaping levels. A pulse stream is generated from the noise-shaped signal over a plurality of periods, where each period has a plurality of frames. The pulse stream also includes a plurality of pulse sets, where each pulse set is associated with at least one of the noise-shaping levels, and, for each pulse set having a total pulse width for its period that is less than its period and greater than zero, each pulse set includes at least one pulse in each frame for its period. | 09-19-2013 |
20130241758 | THREE-LEVEL DIGITAL-TO-ANALOG CONVERTER - A system for processing a signal includes a detector configured to detect a two-level stream of bits; a converter configured to generate a three-level control signal based on two adjacent values within the two-level stream of bits; and a switch configured to determine which of three different paths to couple a current source to based on a value of the three-level control signal. Thus, based on adjacent values of the output stream a three-level control signal is generated which controls coupling of the current source to one of three different paths. This type of three-level digital-to-analog converter can be, for example, part of the feedback loop of an analog-to-digital converter. Similar techniques can also be utilized in a multi-segment digital-to-analog converter in which each segment of the DAC is controlled by a 3-level control signal and the DAC is implement using PMOS devices. The current source for each DAC segment is diverted to ground, the M-node, or the P-node depending on the value of the 3-level control signal. | 09-19-2013 |
20150030099 | CIRCUITS AND METHODS FOR REDUCING THE AMPLITUDE OF COMPLEX SIGNALS - For crest factor reduction in a first signal having first and second components, the first component is delayed. A second signal is generated in response to detecting that a peak in the first component exceeds a predetermined threshold. Amplitude of the peak in the first component is reduced in response to detecting that the peak in the first component exceeds the predetermined threshold. Reducing amplitude of the peak in the first component includes adding the second signal to the delayed first component. | 01-29-2015 |
20150070088 | Circuits And Methods For Cancelling Nonlinear Distortions In Pulse Width Modulated Sequences - A method of canceling nonlinear distortions in pulse width modulated signals includes receiving an input signal. A first signal that is the modulated input signal is generated. The first signal has quantized levels representing the input signal. A pulse width modulated (PWM) sequence that is representative of the first signal is generated. A second signal that is the PWM sequence mixed with a carrier signal is generated. An error signal is generated in response to the first signal and modeled from the second signal. The error signal is added to the input signal. | 03-12-2015 |
20150180692 | CIRCUITS AND METHODS FOR TRANSMITTING SIGNALS - For generating quantized signals, a quantized phase domain related to quantized phases of an input signal is generated. Vectors that the input signal may occupy are calculated based on the quantized phase domain. A first quantized phase of a first component of the input signal is generated per the quantized phase domain, and a second quantized phase of a second component of the input signal is generated per the quantized phase domain. | 06-25-2015 |
Patent application number | Description | Published |
20100048426 | Enhanced Expression from the Pm Promoter - The present invention concerns a method of producing a desired gene product in a recombinant gene expression system, said method comprising expressing said gene from a Pm promoter-based expression system using at least two mutant elements selected from: (i) a mutant Pm promoter; (ii) a mutant mRNA leader; and (iii) a mutant XyIS; wherein said mutant elements each comprise one or more mutations which enhance expression of said desired gene. Particularly combinations of a mutant Pm promoter and a mutant mRNA leader are concerned. Isolated nucleic acid molecules, vectors, host cells, libraries, expression systems, methods of enhancing expression, obtaining nucleic acid molecules and identifying combination mutants which enhance expression, artificially constructed operons and their uses are also encompassed. | 02-25-2010 |
20100248972 | Enhanced Expression Method - The present invention concerns a method of producing a desired heterologous gene product wherein said heterologous gene product is expressed from a strong promoter, said method comprising expressing said gene using a mutant mRNA leader which comprises one or more mutations which enhance transcription of the gene. The invention also provides a mutant Pm mRNA leader sequence, and a vector and a library comprising the leader sequence. Methods of obtaining an mRNA mutant leader and identifying an mRNA mutant leader are encompassed, along with a vector for selection or identification of an mRNA leader mutant and a use thereof for screening. | 09-30-2010 |