Patent application number | Description | Published |
20090271753 | Methods for Cell Phasing and Placement in Dynamic Array Architecture and Implementation of the Same - A semiconductor chip is defined to include a logic block area having a first chip level in which layout features are placed according to a first virtual grate, and a second chip level in which layout features are placed according to a second virtual grate. A rational spatial relationship exists between the first and second virtual grates. A number of cells are placed within the logic block area. Each of the number of cells is defined according to an appropriate one of a number of cell phases. The appropriate one of the number of cell phases causes layout features in the first and second chip levels of a given placed cell to be aligned with the first and second virtual grates as positioned within the given placed cell. | 10-29-2009 |
20110084312 | Methods for Cell Boundary Encroachment and Layouts Implementing the Same - A semiconductor device is disclosed to include a plurality of cells. Each of the cells has a respective outer cell boundary defined to circumscribe the cell in an orthogonal manner. Also, each of the cells includes circuitry for performing one or more logic functions. This circuitry includes a plurality of conductive features defined in one or more levels of the cell. One or more of the conductive features in at least one level of a given cell is an encroaching feature positioned to encroach by an encroachment distance into an exclusion zone. The exclusion zone occupies an area within the cell defined by an exclusion distance extending perpendicularly inward into the given cell from a first segment of the outer cell boundary. The exclusion distance is based on a design rule distance representing a minimum separation distance required between conductive features in adjacently placed cells on the semiconductor device. | 04-14-2011 |
20120144360 | Scalable Meta-Data Objects - A method is disclosed for defining an integrated circuit. The method includes generating a digital data file that includes both electrical connection information and physical topology information for a number of circuit components. The method also includes operating a computer to execute a layout generation program. The layout generation program reads the electrical connection and physical topology information for each of the number of circuit components from the digital data file and automatically creates one or more layout structures necessary to form each of the number of circuit components in a semiconductor device fabrication process, such that the one or more layout structures comply with the physical topology information read from the digital data file. The computer is also operated to store the one or more layout structures necessary to form each of the number of circuit components in a digital format on a computer readable medium. | 06-07-2012 |
20120273841 | Methods for Cell Phasing and Placement in Dynamic Array Architecture and Implementation of the Same - A semiconductor chip is defined to include a logic block area having a first chip level in which layout features are placed according to a first virtual grate, and a second chip level in which layout features are placed according to a second virtual grate. A rational spatial relationship exists between the first and second virtual grates. A number of cells are placed within the logic block area. Each of the number of cells is defined according to an appropriate one of a number of cell phases. The appropriate one of the number of cell phases causes layout features in the first and second chip levels of a given placed cell to be aligned with the first and second virtual grates as positioned within the given placed cell. | 11-01-2012 |
20130126978 | CIRCUITS WITH LINEAR FINFET STRUCTURES - A first transistor has source and drain regions within a first diffusion fin. The first diffusion fin projects from a surface of a substrate. The first diffusion fin extends lengthwise in a first direction from a first end to a second end of the first diffusion fin. A second transistor has source and drain regions within a second diffusion fin. The second diffusion fin projects from the surface of the substrate. The second diffusion fin extends lengthwise in the first direction from a first end to a second end of the second diffusion fin. The second diffusion fin is positioned next to and spaced apart from the first diffusion fin. Either the first end or the second end of the second diffusion fin is positioned in the first direction between the first end and the second end of the first diffusion fin. | 05-23-2013 |
20130207199 | Finfet Transistor Circuit - A first gate level feature forms gate electrodes of a first finfet transistor of a first transistor type and a first finfet transistor of a second transistor type. A second gate level feature forms a gate electrode of a second finfet transistor of the first transistor type. A third gate level feature forms a gate electrode of a second finfet transistor of the second transistor type. The gate electrodes of the second finfet transistors of the first and second transistor types are electrically connected to each other. The gate electrodes of the second finfet transistors of the first and second transistor types are positioned on opposite sides of a gate electrode track along which the gate electrodes of the first finfet transistors of the first and second transistor types are positioned. | 08-15-2013 |
20140035152 | Methods for Cell Phasing and Placement in Dynamic Array Architecture and Implementation of the Same - A semiconductor chip is defined to include a logic block area having a first chip level in which layout features are placed according to a first virtual grate, and a second chip level in which layout features are placed according to a second virtual grate. A rational spatial relationship exists between the first and second virtual grates. A number of cells are placed within the logic block area. Each of the number of cells is defined according to an appropriate one of a number of cell phases. The appropriate one of the number of cell phases causes layout features in the first and second chip levels of a given placed cell to be aligned with the first and second virtual grates as positioned within the given placed cell. | 02-06-2014 |
20140167117 | Methods for Cell Boundary Encroachment and Layouts Implementing the Same - A semiconductor device is disclosed to include a plurality of cells. Each of the cells has a respective outer cell boundary defined to circumscribe the cell in an orthogonal manner. Also, each of the cells includes circuitry for performing one or more logic functions. This circuitry includes a plurality of conductive features defined in one or more levels of the cell. One or more of the conductive features in at least one level of a given cell is an encroaching feature positioned to encroach by an encroachment distance into an exclusion zone. The exclusion zone occupies an area within the cell defined by an exclusion distance extending perpendicularly inward into the given cell from a first segment of the outer cell boundary. The exclusion distance is based on a design rule distance representing a minimum separation distance required between conductive features in adjacently placed cells on the semiconductor device. | 06-19-2014 |
20140380260 | Scalable Meta-Data Objects - A method is disclosed for defining an integrated circuit. The method includes generating a digital data file that includes both electrical connection information and physical topology information for a number of circuit components. The method also includes operating a computer to execute a layout generation program. The layout generation program reads the electrical connection and physical topology information for each of the number of circuit components from the digital data file and automatically creates one or more layout structures necessary to form each of the number of circuit components in a semiconductor device fabrication process, such that the one or more layout structures comply with the physical topology information read from the digital data file. The computer is also operated to store the one or more layout structures necessary to form each of the number of circuit components in a digital format on a computer readable medium. | 12-25-2014 |
Patent application number | Description | Published |
20090248494 | SYSTEM AND METHOD FOR COLLECTING AND TARGETING VISITOR BEHAVIOR - A system and method is disclosed for collecting website visitor activity for profiling visitor interests and dynamically modifying the content of the website to better match the visitor's profile. The visitor activity data is collected directly from the visitor's client browser or from the website's own web log information. The collected data consists of the page identifier, page links, and the previous page identifier. Similarly, the modified page content can be sent directly to the client browser or can be sent back to the website server for integration with the other page content. The collected data is stored in a database. Based on the amount of information collected on the visitor and the various items that are presented on the website, the visitors and items are profiled so that a visitor's response to other items can be predicted and recommended to the visitor. The recommendations can be requested and displayed directly by and to the client browser or the website server can make the request and subsequently display the matching content. The system has application in personalization, behavioral targeting, Internet retailing, social networking, affiliate marketing, and online advertising, to name but a few applications. | 10-01-2009 |
20090248495 | SYSTEM AND METHOD FOR COMBINING AND OPTIMIZING BUSINESS STRATEGIES - A system and method is disclosed for tracking subject behavior and making object recommendations to drive the subject to a desired outcome. The system consists of several components: a data collection module that captures subject behavior and provides behavioral context for the recommendations; a profiling module that extracts characteristics of subjects and objects from the behavior data; and a recommendation module, which uses the profiles and the behavior context to generate personalized content, including product recommendations, content recommendations, and advertisements. The recommendation module consists of several sub-modules: a behavioral recommendation module, which matches profiles or uses other unconstrained methods for matching objects to subjects; a business rule module, which filters and modifies recommendations by applying application-specific business logic to defined attributes of the objects; and a promotion engine, which modifies the scores from the recommendation module to bias the recommendations towards certain objects based on additional business goals, such as exposing new objects, selling out old products, or satisfying promotional business agreements with partners. The system continuously samples and assesses the performance of a variety of candidate recommendation strategies and optimizes the selection of the rules and profiling methods to maximize or minimize the value of some objective function that characterizes the system. The system has application to Internet retailing, behavioral targeting, recommendation systems, personalization, business rules, and business optimization. | 10-01-2009 |
20090248496 | SYSTEM AND METHOD FOR AUTOMATING MARKET ANALYSIS FROM ANONYMOUS BEHAVIOR PROFILES - A system and method is disclosed for profiling subjects and objects based on subjects' responses to various objects for purposes of determining and presenting the objects most likely to generate the most likely response from each visitor. Object ratings, such as aesthetic response, preference, interest, or relevancy, are explicitly submitted by subjects or derived implicitly from visitor interactions with the objects. Objects include movies, books, songs, commercial products, news articles, advertisements or any other type of content or physical item. A profiling engine processes the ratings information and generates compact profiles of each subject and object based on the similarities and differences in affinities between the group of subjects and the group of objects. The object profiles can be clustered to create behavioral object categories. Additionally, a modeling module inverts the abstract subject and object profiles into physical attributes, such as predicting demographic or personality traits or subjective or other descriptive attributes of objects, such as size, shape, color, hipness, or trendiness. The system has application in market analysis and segmentation, behavioral targeting, product placement, and online advertising, to name but a few applications. | 10-01-2009 |
20090248523 | SYSTEM AND METHOD FOR GENERATING AUTOMATED SELF-OPTIMIZING TARGETED E-MAILS - A system and method is disclosed for generating targeted e-mails based on individual subject behavior and interests, as determined by an application's website browsing behavior, online and offline purchases, ratings, and other implicit and explicit indications of subject preferences and interests. The subject's behavior data is collected directly from the subject's client browser or from the application's own information and used to generate profiles of the subjects that will be sent e-mails and the objects that will be recommended. Targeted content is generated by matching subject and object profiles in combination with any subject segmentation filters that the application provides. The e-mail targeting is optimized by measuring subject response to targeted e-mails and adjusting recommendation strategies used to generate subsequent recommendations. The system has application in personalization, behavioral targeting, Internet retailing, affiliate marketing, and online advertising, to name but a few applications. | 10-01-2009 |
20090248599 | UNIVERSAL SYSTEM AND METHOD FOR REPRESENTING AND PREDICTING HUMAN BEHAVIOR - A system and method is disclosed for profiling subjects and objects based on subjects' responses to various objects for purposes of determining and presenting the objects most likely to generate the most positive response from each visitor. Object ratings, such as aesthetic response, preference, interest, or relevancy, are explicitly submitted by subjects or derived implicitly from visitor interactions with the objects. Objects include movies, books, songs, commercial products, news articles, advertisements or any other type of content or physical item. A profiling engine processes the ratings information and generates compact profiles of each subject and object based on the similarities and differences in affinities between the group of subjects and the group of objects. A recommendation engine then generates recommendations to a subject based on similarity between the subject and object profiles. The recommendation engine can also match subjects to other subjects and objects to other objects. The recommendation engine can also predict affinity across object catalogs and across time. Additionally, the object profiles can be clustered to create behavioral object categories. The system has application in personalization, behavioral targeting, Internet retailing and interactive radio, to name but a few applications. | 10-01-2009 |
20090248682 | SYSTEM AND METHOD FOR PERSONALIZED SEARCH - A system and method is disclosed for profiling a subject's search engine keywords and results based on relevancy feedback. Because the system is based on the search behavior of the user, the profiling is language independent and balances the specificity of search terms against the profiled interests of the user. The system can also synthesize new keyword combinations to assist the user in refining the search or acquiring related content. The system has application in text mining, personalization, behavioral search, search engine optimization, and content acquisition, to name but a few applications. | 10-01-2009 |
20130173809 | FAULT TOLERANCE AND MAINTAINING SERVICE RESPONSE UNDER UNANTICIPATED LOAD CONDITIONS - A system and method is disclosed for allocating servers across a large number of applications and for providing a predictable and consistent service response under conditions where the use of the service and associated loads is driven by unknown factors. The invention provides fault tolerance within an application through multiple resources per application and fault tolerance across applications by limiting the overlap in resources between applications. The computational load on the service may include both individual processing time due to the complexity of a single request and the number of requests. Complexity may be unpredictable because the service is self-provisioned and may allow service users to create an arbitrary sequence of compound processing steps. The number of requests may vary due to a variety of events, including daily, seasonal, or holidays, or factors driven more directly by the user of the service, such as sales, advertising, or promotions. The invention throttles server loads to provide managed degradation of application processing. The system has application in personalization, behavioral targeting, Internet retailing, personalized search, email segmentation and ad targeting, to name but a few applications. | 07-04-2013 |