Patent application number | Description | Published |
20130099243 | SUBSTRATE BREAKDOWN VOLTAGE IMPROVEMENT FOR GROUP III-NITRIDE ON A SILICON SUBSTRATE - A circuit structure includes a substrate, a nucleation layer of undoped aluminum nitride, a graded buffer layer comprising aluminum, gallium, nitrogen, one of silicon and oxygen, and a p-type conductivity dopant, a ungraded buffer layer comprising gallium, nitrogen, one of silicon and oxygen, and a p-type conductivity dopant without aluminum, and a bulk layer of undoped gallium nitride over the ungraded buffer layer. The various dopants in the graded buffer layer and the ungraded buffer layer increases resistivity and results in layers having an intrinsically balanced conductivity. | 04-25-2013 |
20130112939 | NEW III-NITRIDE GROWTH METHOD ON SILICON SUBSTRATE - A circuit structure includes a substrate and a patterned dielectric layer over the substrate. The patterned dielectric layer includes a plurality of vias; and a number of group-III group-V (III-V) compound semiconductor layer. The III-V compound semiconductor layers include a first layer in the vias, a second layer over the first layer and the dielectric layer, and a bulk layer over the second layer. | 05-09-2013 |
20130140525 | GALLIUM NITRIDE GROWTH METHOD ON SILICON SUBSTRATE - A semiconductor structure includes a silicon substrate; more than one bulk layer of group-III/group-V (III-V) compound semiconductor atop the silicon substrate; and each bulk layer of the group III-V compound is separated by an interlayer. | 06-06-2013 |
20140001439 | Graded Aluminum-Gallium-Nitride and Superlattice Buffer Layer for III-V Nitride Layer on Silicon Substrate | 01-02-2014 |
20140197418 | SEMICONDUCTOR STRUCTURE HAVING SETS OF III-V COMPOUND LAYERS AND METHOD OF FORMING THE SAME - A semiconductor structure includes a substrate, a first III-V compound layer over the substrate, one or more sets of III-V compound layers over the first III-V compound layer, a second III-V compound layer over the one or more sets of III-V compound layers, and an active layer over the second III-V compound layer. The first III-V compound layer has a first type doping. Each of the one or more sets of III-V compound layers includes a lower III-V compound layer and an upper III-V compound layer over the lower III-V compound layer. The upper III-V compound layer having the first type doping, and the lower III-V compound layer is at least one of undoped, unintentionally doped having a second type doping, or doped having the second type doping. The second III-V compound layer is either undoped or unintentionally doped having the second type doping. | 07-17-2014 |
20140203289 | High Electron Mobility Transistors - The present disclosure relates to a donor layer of bi-layer AlGaN and associated method of fabrication within a high electron mobility transistor (HEMT) configured to provide low-resistance ohmic source and drain contacts to reduce power consumption, while maintaining a high-mobility of a two-dimensional electron gas (2DEG) within a channel of the HEMT. The donor layer of bi-layer AlGaN comprises a mobility-enhancing layer of Al | 07-24-2014 |
20140209918 | Thick ALN Inter-Layer for III-Nitride Layer on Silicon Substrate - The present disclosure relates to a gallium-nitride (GaN) transistor device having a composite gallium nitride layer with alternating layers of GaN and aluminum nitride (AlN). In some embodiments, the GaN transistor device has a first GaN layer disposed above a semiconductor substrate. An AlN inter-layer is disposed on the first GaN layer. A second GaN layer is disposed on the AlN inter-layer. The AlN inter-layer allows for the thickness of the GaN layer to be increased over continuous GaN layers, mitigating bowing and cracking of the GaN substrate, while improving the breakdown voltage of the disclosed GaN device. | 07-31-2014 |
20140209920 | High Electron Mobility Transistor Structure - The present disclosure relates to a channel layer of bi-layer of gallium nitride (GaN) within a HEMT. A first breakdown voltage layer of GaN is disposed beneath an active layer of the HEMT. A second breakdown voltage layer of GaN is disposed beneath the first breakdown voltage layer, wherein the first resistivity value is less than the second resistivity value. An increased resistivity of the second breakdown voltage layer results from an increased concentration of carbon dopants which increases the breakdown voltage in the second breakdown voltage layer, but can degrade the crystal structure. To alleviate this degradation, a crystal adaptation layer is disposed beneath the second breakdown voltage layer and configured to lattice-match to the second breakdown voltage layer of GaN. As a result, the HEMT achieves a high breakdown voltage without any associated degradation to the first breakdown voltage layer, wherein a channel of the HEMT resides. | 07-31-2014 |
20150021660 | TRANSISTOR HAVING A BACK-BARRIER LAYER AND METHOD OF MAKING THE SAME - A transistor includes a substrate and a buffer layer on the substrate, wherein the buffer layer comprises p-type dopants. The transistor further includes a channel layer on the buffer layer and a back-barrier layer between a first portion of the channel layer and a second portion of the channel layer. The back-barrier layer has a band gap discontinuity with the channel layer. The transistor further includes an active layer on the second portion of the channel layer, wherein the active layer has a band gap discontinuity with the second portion of the channel layer. The transistor further includes a two dimensional electron gas (2-DEG) in the channel layer adjacent an interface between the channel layer and the active layer. | 01-22-2015 |
20150021661 | TRANSISTOR HAVING HIGH BREAKDOWN VOLTAGE AND METHOD OF MAKING THE SAME - A transistor includes a substrate and a graded layer on the substrate, wherein the graded layer is doped with p-type dopants. The transistor further includes a superlattice layer (SLS) on the graded layer, wherein the SLS has a p-type dopant concentration equal to or greater than 1×10 | 01-22-2015 |
20150021665 | TRANSISTOR HAVING BACK-BARRIER LAYER AND METHOD OF MAKING THE SAME - A transistor includes a substrate, a channel layer over the substrate, a back-barrier layer over the channel layer, and an active layer over the back-barrier layer. The back-barrier layer has a band gap discontinuity with the channel layer. The band gap of the active layer is less than the band gap of the back-barrier layer. A two dimensional electron gas (2-DEG) is formed in the channel layer adjacent an interface between the channel layer and the back-barrier layer. | 01-22-2015 |
20150021666 | TRANSISTOR HAVING PARTIALLY OR WHOLLY REPLACED SUBSTRATE AND METHOD OF MAKING THE SAME - A transistor includes a substrate, a channel layer over the substrate, an active structure over the channel layer, a gate electrode over the channel layer, and a drain electrode over the channel layer. The active structure is configured to cause a two dimensional electron gas (2DEG) to be formed in the channel layer along an interface between the channel layer and the active structure. The gate electrode and the drain electrode define a first space therebetween. The substrate has a first portion directly under the first space defined between the gate electrode and the drain electrode, and the first portion has a first electrical conductivity value less than that of intrinsic silicon and a thermal conductivity value greater than that of intrinsic silicon. | 01-22-2015 |
20150041825 | SEMICONDUCTOR DEVICE, HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) AND METHOD OF MANUFACTURING - A semiconductor device includes a substrate, a channel layer over the substrate, an active layer over the channel layer, and a barrier structure between the substrate and the channel layer. The active layer is configured to cause a two dimensional electron gas (2DEG) to be formed in the channel layer along an interface between the channel layer and the active layer. The barrier structure is configured to block diffusion of at least one of a material of the substrate or a dopant toward the channel layer. | 02-12-2015 |
20150053990 | TRANSISTOR HAVING AN OHMIC CONTACT BY SCREEN LAYER AND METHOD OF MAKING THE SAME - A transistor includes a substrate, a channel layer over the substrate and an active layer over the channel layer. The active layer includes a first portion and a screen layer over the first portion. The transistor includes a metal layer over the screen layer. | 02-26-2015 |
20150053991 | TRANSISTOR HAVING AN OHMIC CONTACT BY GRADIENT LAYER AND METHOD OF MAKING THE SAME - A transistor includes a substrate, a channel layer over the substrate and an active layer over the channel layer. The active layer includes a gradient having a first concentration of a first material at an interface with the channel layer and a second concentration of the first material at a surface opposite the channel layer, and the first concentration is higher than the second concentration. | 02-26-2015 |
20150053992 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING - A semiconductor device includes a substrate, a channel layer over the substrate, an active layer over the channel layer, a gate structure over the active layer, and a barrier layer between the gate structure and the active layer. The active layer is configured to cause a two dimensional electron gas (2DEG) to be formed in the channel layer along an interface between the channel layer and the active layer. The gate structure is configured to deplete the 2DEG under the gate structure. The gate structure includes a dopant. The barrier layer is configured to block diffusion of the dopant from the gate structure into the active layer. | 02-26-2015 |