Patent application number | Description | Published |
20080310616 | METHOD AND SYSTEM FOR SUBSCRIBER LINE INTERFACE CIRCUIT - A subscriber line interface circuit apparatus includes a linefeed circuit and a subscriber line control circuit (SLCC). In an embodiment, the linefeed circuit includes a signal conversion circuit which provides a differential mode signal and a common mode signal in response to at least a tip signal and a ring signal from the subscriber loop. The linefeed circuit includes a tip control circuit and a ring control circuit. In an embodiment, the SLCC is provided in a single integrated circuit chip and is coupled to the linefeed circuit which isolates the SLCC from the tip or ring signals. The SLCC includes a first and a second differential mode inputs for receiving the differential mode signal, and a common-mode input for receiving the common-mode signal. In an embodiment, the SLCC also provides various tip control signals and ring control signals to the tip control circuit and the ring control circuit, respectively. | 12-18-2008 |
20080310655 | PROGRAMMABLE INTEGRATED MICROPHONE INTERFACE CIRCUIT - An integrated circuit for providing programmable microphone interface includes an input terminal for receiving an input signal and an output terminal for providing an output audio signal. In an embodiment, the integrated circuit includes a bias circuit, an amplifier circuit and two feedback circuits. The amplifier circuit includes a first input, a second input, and an output. The first input receives either the input signal or a feedback signal, depending upon mode control signals. The second input receives either the feedback signal or the input signal depending upon the mode control signals. The first feedback circuit is in communication with the output and the first input of the amplifier and includes a first resistor and a first capacitor connected in parallel. The second feedback circuit includes an integrator circuit and provides the feedback signal. The mode control signals can be set in a programmable mode control register. | 12-18-2008 |
20090110213 | PROGRAMMABLE INTEGRATED MICROPHONE INTERFACE CIRCUIT - An integrated circuit for providing programmable microphone interface includes an input terminal for receiving an input signal and an output terminal for providing an output audio signal. The integrated circuit includes a bias circuit, an amplifier circuit, and two feedback circuits. The bias circuit provides a microphone bias signal to the microphone and provides a sensed microphone signal. The amplifier circuit includes a first input, a second input, and an output. The first input is configured to receive the sensed microphone signal, a first feedback signal, and a second feedback signal. The second input is configured to receive a first reference signal. The feedback circuits are in communication with the output and the first input of the amplifier circuit. In a specific embodiment, the first feedback circuit includes an RC circuit and the second feedback circuit includes an integrator. | 04-30-2009 |
20100086121 | METHOD AND SYSTEM FOR SUBSCRIBER LINE INTERFACE CIRCUIT HAVING A HIGH-VOLTAGE MOS LINEFEED CIRCUIT - A subscriber line interface circuit apparatus includes a linefeed circuit and a subscriber line control circuit (SLCC). In an embodiment, the linefeed circuit includes a signal conversion circuit having cross-coupled first and second MOSFETs for providing a differential mode signal and a common mode signal in response to at least a tip signal and a ring signal from the subscriber loop. The linefeed circuit includes a tip control circuit and a ring control circuit, each having two or more MOSFETs. In an embodiment, the SLCC is provided in a single integrated circuit chip and is coupled to the linefeed circuit which isolates the SLCC from the tip or ring signals. The SLCC includes a first and a second differential mode inputs for receiving the differential mode signal, and a common-mode input for receiving the common-mode signal. | 04-08-2010 |
20100148851 | LOW VOLTAGE ANALOG CMOS SWITCH - A CMOS analog switch circuit includes an NMOS switch transistor, a PMOS switch transistor, and a bias circuit. In an embodiment, the bias circuit includes a first and a second native bias transistors having their gate terminals coupled to a first and a second terminals of the CMOS switch circuit, respectively. The source terminals of the first and the second native bias transistors are coupled together and are also coupled to the body terminal of the PMOS switch transistor. In an configuration, the first and the second native bias transistors are characterized by substantially 0V threshold voltages, and the PMOS switch transistor is configured to exhibit a lower on-resistance in response to the greater of the voltages of the first terminal and the second terminal of the CMOS analog switch circuit. | 06-17-2010 |
20150340187 | ELECTRICALLY RESETTABLE FUSE DEVICE - An integrated circuit is provided that includes an electrically resettable fuse device. The electrically resettable fuse device has a plurality of resettable fuse modules coupled in parallel. Each resettable fuse module including a fuse element characterized by a first and a second impedance states. The plurality of resettable fuse modules are configured such that when the fuse element is in the first impedance state, and a current flowing through each fuse element in a first direction exceeds a current limit, the fuse element enters into the second impedance state. When the fuse element is in the second impedance state and, in response to a global reset signal and a local reset signal, a current is applied to the fuse element in a second direction opposite the first direction, the fuse element is reset to the first impedance state. | 11-26-2015 |
20160079917 | METHOD AND APPARATUS OF A SELF-BIASED RC OSCILLATOR AND RAMP GENERATOR - A self-biased RC (resistor-capacitor) oscillator and ramp generator circuit includes a combined current and voltage reference circuit for providing a reference current, a first reference voltage, and a second reference voltage. The combined current and voltage reference circuit includes a circuit branch of an NMOS transistor in a diode connection, a PMOS transistor in a diode connection, and a resistor coupled in series. The circuit also has a signal generating circuit that includes a capacitor. The signal generating circuit is configured to charge and discharge the capacitor between the first reference voltage and the second reference voltage. The self-biased RC oscillator and ramp generator circuit is configured to provide a ramp or saw tooth signal at a node of the capacitor and to provide an oscillator output signal at an output of the signal generating circuit. | 03-17-2016 |
20160112005 | METHOD AND APPARATUS FOR AN INTEGRATED PN-JUNCTION OSCILLATOR - An integrated oscillator circuit has a plurality oscillator stages including a first oscillator stage, an odd number of intermediate oscillator stages, and a last oscillator stage arranged in series. Each of the oscillator stages has a reverse-biased diode device and a transistor coupled in series between a power supply and a ground. Each diode device has an anode and a cathode, and each transistor has a control terminal for controlling a current flow from a first terminal to a second terminal. In each oscillator stage, the anode of the diode is coupled to the first terminal of the transistor at an internal node. The control terminal of the transistor in each oscillator stage is coupled to the internal node of a proceeding oscillator stage. Further, the control terminal of the transistor in the first oscillator stage is coupled to the internal node of the last oscillator stage. | 04-21-2016 |