Patent application number | Description | Published |
20110062983 | REDUCING SWITCHING NOISE - Described herein are various principles for operating a transmitter circuit to reduce noise affecting a signal being generated and reducing jitter. In some embodiments, a circuit is operated in a way that switching occurs at or above a bit rate of transmission, such that at least one switch changes state at least for every bit. Operating the circuit in such a way leads to a switching rate that is above a resonant frequency of the circuit and prevents large oscillations and noise from being inserted into the signal and causing communication problems. | 03-17-2011 |
20110090002 | HIGH VOLTAGE TOLERANCE OF EXTERNAL PAD CONNECTED MOS IN POWER-OFF MODE - An integrated circuit includes a number of pads. The integrated circuit further includes a cascode transistor having an open drain connection to a first one of the pads. A bias generator circuit is included in the integrated circuit. The bias generator circuit has an output connected to a gate terminal of the cascode transistor. In a first mode of operation, the bias generator outputs a bias signal that is derived from an integrated circuit supply voltage present at a second one of the pads. However, in a second mode of operation provided when the integrated circuit supply voltage is not present, the bias generator generates the bias signal derived from a voltage present at the first one of the pads. | 04-21-2011 |
20110273215 | HIGH JITTER AND FREQUENCY DRIFT TOLERANT CLOCK DATA RECOVERY - In a method for recovery of a clock from a received digital data stream and an apparatus for recovering a clock from a received digital data stream, phase-shifted clock signals are generated from a receiver's clock. After selecting one of the phase-shifted clock signals, two other phase-shifted clock signals are determined. Depending on sample values taken at rising/falling edges of the three selected phase-shifted clock signals, counter values are increased and compared. The selection of phase-shifted clock signals and the steps of sampling the input digital data stream, comparing the values and increasing counter values, if required, are repeatedly performed until the comparison result of the counter values indicates that one of the latter determined phase-shifted clock signals strobes the received digital data stream in the centre of a bit period. | 11-10-2011 |
20120169403 | POWER HARVESTING IN OPEN DRAIN TRANSMITTERS - A transmitter having at least one channel comprising a first differential circuit driven by a differential data signal, the first differential circuit configured to output the differential data at a first and second output and a first control circuit coupled between the first differential circuit and the first and second output, the first control circuit driven by a drive voltage. | 07-05-2012 |
20120169410 | TECHNIQUE TO MINIMIZE VDS MISMATCH DRIVEN VOLTAGE SWING VARIATION IN OPEN DRAIN TRANSMITTER - A switching circuit includes a source follower current mirror having an input, an output, a first source terminal, a bias terminal, and a second source terminal; a current source coupled to the input of the current mirror; an output terminal coupled to the output of the current mirror; a first bias transistor coupled to the first source terminal; a second bias transistor coupled to bias terminal of the current mirror; and a driver transistor coupled to the second source terminal. An input transistor in the current mirror is sized such that the input voltage is substantially independent of the supply voltage. | 07-05-2012 |
20120169438 | HDMI RECEIVER - An embodiment of a transmitter includes an amplifier having first and second differential output nodes, a first supply node, a first pull-up impedance having a first node coupled to the first differential output node and having a second node coupled to the supply node, and a second pull-up impedance having a first node coupled to the second differential output node and having a second node coupled to the supply node. An embodiment of a receiver includes an amplifier having first and second differential input nodes, a first supply node, a first pull-up impedance having a first node coupled to the first differential input node and having a second node coupled to the supply node, and a second pull-up impedance having a first node coupled to the second differential input node and having a second node coupled to the supply node. In an embodiment, the transmitter and receiver are capacitively coupled to one another. | 07-05-2012 |
20120297028 | INTEGRATED REMOTE POLLUTION MONITORING AND INDEXING SYSTEM AND METHOD THEREOF - The invention relates to a system for integrated remote monitoring and measuring of real time pollution levels together with real time weather details and a method of aggregating, analyzing and indexing the disparate data into a single measurable and accessible real time data for the user. The invention further relates to a method and means of displaying the pollution index of different types of pollution levels of air, water, sewage, noise, radiation, light and soil and weather details in real time through various displaying methods. | 11-22-2012 |
20140368281 | MID-BAND PSRR CIRCUIT FOR VOLTAGE CONTROLLED OSCILLATORS IN PHASE LOCK LOOP - A circuit generates a compensation signal that can remove noise in a VCO introduced by a supply signal (i.e., supply-side noise). The circuit includes two transistors connected in series. A resistor is connected between the gate of the first transistor and the supply signal, and a capacitor is connected between the gate of the second transistor and the supply signal. The circuit is designed so that the transconductance of one transistor is greater than or equal to twice the transconductance of a second transistor. The compensation signal is supplied through a capacitor, which compensates for capacitors in a VCO, to an internal supply node of the VCO. At the internal supply node, the compensation signal removes (or greatly reduces) the noise introduced by the supply signal noise, resulting in a less-noisy output signal from the VCO. | 12-18-2014 |