Patent application number | Description | Published |
20100286304 | POLYMERIC COMPOSITIONS, METHODS OF MANUFACTURE THEREOF AND ARTICLES COMPRISING THE SAME - Disclosed herein is a polymeric composition comprising a polymeric composition comprising a first crosslinked network; and a second crosslinked network; wherein the first crosslinked network is crosslinked at a first stress and/or a first strain and the second crosslinked network is crosslinked at a second stress and/or a second strain; where the first stress and/or the first strain is different from the second stress and/or the second strain either in magnitude or direction. Disclosed herein is a method comprising subjecting a polymeric mass to a first stress and/or a first strain level; crosslinking the polymeric mass to form a first crosslinked network; subjecting the polymeric mass to a second stress and/or a second strain level; and crosslinking the polymeric mass to form a second crosslinked network; where the first stress and/or the first strain level is different from the second stress and/or the second strain level. | 11-11-2010 |
20110151624 | Coating for a microelectronic device, treatment comprising same, and method of managing a thermal profile of a microelectronic die - A coating for a microelectronic device comprises a polymer film ( | 06-23-2011 |
20110159256 | Treatment for a microelectronic device and method of resisting damage to a microelectronic device using same - A treatment for a microelectronic device comprises a dicing tape ( | 06-30-2011 |
20120074581 | DIE-STACKING USING THROUGH-SILICON VIAS ON BUMPLESS BUILD-UP LAYER SUBSTRATES INCLUDING EMBEDDED-DICE, AND PROCESSES OF FORMING SAME - An apparatus includes a coreless substrate with a through-silicon via (TSV) embedded die that is integral to the coreless substrate. The apparatus includes a subsequent die that is coupled to the TSV die and that is disposed above the coreless substrate. | 03-29-2012 |
20120153494 | FORMING DIE BACKSIDE COATING STRUCTURES WITH CORELESS PACKAGES - Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include attaching a patterned die backside film (DBF) on a backside of a die, wherein the patterned DBF comprises an opening surrounding at least one through silicon via (TSV) pad disposed on the backside of the die. | 06-21-2012 |
20130017650 | COATING FOR A MICROELECTRONIC DEVICE, TREATMENT COMPRISING SAME,AND METHOD OF MANAGING A THERMAL PROFILE OF A MICROELECTRONIC DIE - A coating for a microelectronic device comprises a polymer film ( | 01-17-2013 |
20130252376 | FORMING DIE BACKSIDE COATING STRUCTURES WITH CORELESS PACKAGES - Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include attaching a patterned die backside film (DBF) on a backside of a die, wherein the patterned DBF comprises an opening surrounding at least one through silicon via (TSV) pad disposed on the backside of the die. | 09-26-2013 |
20140295621 | DIE-STACKING USING THROUGH-SILICON VIAS ON BUMPLESS BUILD-UP LAYER SUBSTRATES INCLUDING EMBEDDED-DICE, AND PROCESSES OF FORMING SAME - An apparatus includes a coreless substrate with a through-silicon via (TSV) embedded die that is integral to the coreless substrate. The apparatus includes a subsequent die that is coupled to the TSV die and that is disposed above the coreless substrate. | 10-02-2014 |
20140327149 | DIE-STACKING USING THROUGH-SILICON VIAS ON BUMPLESS BUILD-UP LAYER SUBSTRATES INCLUDING EMBEDDED-DICE, AND PROCESSES OF FORMING SAME - An apparatus includes a coreless substrate with a through-silicon via (TSV) embedded die that is integral to the coreless substrate. The apparatus includes a subsequent die that is coupled to the TSV die and that is disposed above the coreless substrate. | 11-06-2014 |