Patent application number | Description | Published |
20130092418 | CHIP-ON-FILM PANEL STRUCTURE - The present invention relates to a chip-on-film panel structure, which has a panel body and fan-out leads, first metal sheets, array leads and second metal leads thereon. The array leads are disposed at two sides of the fan-out leads, the second metal sheets are disposed at two sides of the first metal sheets, and the length of each of the second metal sheet is less than the length of each of the first metal sheet to form a lead-out area that the array leads are led out from the second metal sheets via the lead-out area. The chip-on-film panel structure having an arranged fan-out area for array leads can settle the problem of being difficult to narrow the frame of the panel because the array leads occupy available room for fan-out leads and force the fan-out area to expand longitudinally. | 04-18-2013 |
20130153905 | Flat Display Panel and Method for Forming the Same - The present invention proposes to a flat display panel and a method for forming the same. The flat display panel includes a plurality of rows of scan lines, a plurality of columns of data lines and a plurality of blocking lines which are parallel and overlapped to the data lines. The plurality of blocking lines are placed at one side of pixel electrodes one on one and made of the same metallic layer with the plurality of scan lines. Each blocking line made of the same metallic layer with the scan line is wider than a corresponding data line, so that light not blocked by the data line is blocked by the wider blocking line. | 06-20-2013 |
20130286331 | Liquid Crystal Display Module and Liquid Crystal Display Device - The present invention discloses a liquid crystal display device and liquid crystal display module thereof. The liquid crystal display module includes a color filter substrate, a thin film transistor substrate and seal. The thin film transistor substrate and the color film substrate are disposed oppositely, and the seal is disposed between the thin film transistor substrate and the color film substrate. The color filter substrate comprises a first glass substrate and black matrix. The seal comprises a first end part contacting the color filter substrate. No black matrix is disposed between the first end part and the color filter substrate, and the first end part is disposed as a shade structure. The liquid crystal display module and liquid crystal display device of the present invention provide the advantages of convenience for seal curing, facilitating narrow border design, and avoiding aggravating drive signal delay. | 10-31-2013 |
20140063426 | Liquid Crystal Display Panel and Manufacturing Method Thereof - The present invention provides a liquid crystal display panel, which comprises: a first conductive layer, a first insulating layer, a second conductive layer, a second insulating layer, and a third conductive layer; the first insulating layer being disposed on the first conductive layer and comprising at least two first via-holes corresponding respectively to at least two first subsidiary conductive regions so that at least two first subsidiary conductive regions being partially exposed through first via-holes; the second conductive layer being disposed on the first insulating layer; the second insulating layer being disposed on the second conductive layer; the second insulating layer being disposed on the second conductive layer and comprising at least two second via-holes corresponding respectively to at least two second subsidiary; a third conductive layer being connected with first subsidiary conductive regions and a second conductive layer. | 03-06-2014 |
20140063431 | Display Panel and Liquid Crystal Device with the Same - A display panel and a liquid crystal device are disclosed. The display panel includes a first substrate, a second substrate opposite to the first substrate, a sealant. The first substrate is arranged with a first alignment film. The second substrate is arranged with a second alignment film. The sealant surrounds the first substrate and the second substrate. A first wall is arranged on the first substrate, and the first wall is between an edge of the first alignment film and the sealant. A second wall is arranged on the second substrate, and the second wall is between an edge of the second alignment film and the plastic film. In this way, the distance between an active area and edges of the display panel is reduced so that the narrow bezel design may be implemented. | 03-06-2014 |
20140167160 | TFT array substrate - The present invention discloses a thin film transistor (TFT) array substrate, which includes a plurality of scan lines, data lines, and common electrode lines disposed on a substrate. The scan lines and the data lines cross with each other to define a plurality of pixel regions that have a plurality of TFTs disposed in the crossing regions therebetween. A plurality of pixel electrodes are disposed in the pixel regions. The TFT array substrate further includes a patterned shielding layer which is insulatively disposed below the data lines. The patterned shielding layer of the present invention can shield the back light directly, and the area of the black matrix on the color filter substrate can be reduced so as to increase the aperture ratio. | 06-19-2014 |
20150022211 | DETECTION CIRCUIT FOR DISPLAY PANEL - The present disclosure provides a detection circuit for a display panel, comprising: a shorting bar, with connection lines for introducing a test signal or a control signal arranged thereon; a transistor array, the gates of which are connected to the connection lines for introducing the control signal, wherein the connection lines for introducing the test signal are connected with the data lines or the scanning lines of the display panel via the sources and the drains of transistors, under the control signal, and a component, arranged between the gates of the transistor array and the shorting bar, for further reducing or increasing a voltage or current of the gates so that the transistor array can be cut off reliably when the control signal is a signal enabling the transistor array to be cut off. The detection circuit can further reduce the channel length of the thus being advantageous for the design of the narrow frame. | 01-22-2015 |
20150022749 | ARRAY SUBSTRATE AND DISPLAY PANEL - An array substrate and a display panel are disclosed. The array substrate includes at least one data line, at least one scanning line, and a pixel cell defined by the data line and the scanning line. The pixel cell includes an ITO thin film and at least one metallic layer below the ITO thin film. The ITO thin film electrically connects to the metallic layer via a through hole. The ITO thin film includes a slit arranged between the ITO thin film and the through hole, and the slit is arranged to avoid the disclination lines so as to improve the display performance. | 01-22-2015 |