Patent application number | Description | Published |
20090089537 | APPARATUS AND METHOD FOR MEMORY ADDRESS TRANSLATION ACROSS MULTIPLE NODES - A method for translating memory addresses in a plurality of nodes, that includes receiving a first memory access request initiated by a processor of a first node of the plurality of nodes, wherein the first memory access request comprises a process virtual address and a first memory operation, translating the process virtual address to a global system address, wherein the global system address corresponds to a physical memory location on a second node of the plurality of nodes, translating the global system address to an identifier corresponding to the second node, and sending a first message requesting the first memory operation to the second node based on the identifier, wherein the second node performs the first memory operation on the physical memory location. | 04-02-2009 |
20090089790 | METHOD AND SYSTEM FOR COORDINATING HYPERVISOR SCHEDULING - A method for executing an application on a plurality of nodes, that includes synchronizing a first clock of a first node of the plurality of nodes and a second clock of a second node of the plurality of nodes, configuring a first hypervisor on the first node to execute a first application domain and a first privileged domain, wherein configuring the hypervisor comprises allocating a first number of cycles of the first clock to the first privileged domain, configuring a second hypervisor on the second node to execute a second application domain and a second privileged domain, wherein configuring the second hypervisor that includes allocating the first number of cycles of the first clock to the second privileged domain, and executing the application in the first application domain and the second application domain, wherein the first application domain and the second application domain execute semi-synchronously and the first privileged domain and the second privileged domain execute semi-synchronously. | 04-02-2009 |
20090089815 | METHOD AND SYSTEM FOR PERFORMING I/O OPERATIONS USING A HYPERVISOR - A method for installing a device driver for a device in a guest domain, that includes obtaining a first device driver for the device by a hypervisor, installing, by the hypervisor, the first device driver into memory allocated to the guest domain, and notifying an operating system in the guest domain of the first device driver after installing the device driver, wherein the operating system communicates with the device using the first device driver. | 04-02-2009 |
20090216811 | DYNAMIC COMPOSITION OF AN EXECUTION ENVIRONMENT FROM MULTIPLE IMMUTABLE FILE SYSTEM IMAGES - A virtual file system is formed configured to enable the dynamic composition of immutable file system images. A file system containing a software distribution is divided into a plurality of mutually exclusive sub-trees. Each sub-tree includes a portion of the software distribution. An immutable file system image is formed for each sub-tree. During the booting of an operating system, a virtualization engine intercedes in the boot process to mount the immutable file system images to independent directories of the root file system. Upon request the virtualization engine, during run-time, combines virtual entries corresponding to immutable file system images so as to resemble the original software distribution. | 08-27-2009 |
20090216990 | DYNAMIC TRANSACTIONAL INSTANTIATION OF SYSTEM CONFIGURATION USING A VIRTUAL FILE SYSTEM LAYER - A virtual configuration system, comprising a virtualization engine and a configuration engine, for the dynamic instantiation of configuration files is disclosed. A mechanism is disclosed that allows for transactional updates to a repository of configuration settings comprising multiple files. Configuration entries are stored in a first memory location and a copy of the entries is stored in a second memory location. A virtual configuration file that includes a virtual configuration for each entry is created and used to provide the operating system with path and location information regarding the configuration entries. Simultaneously and during run-time of the computer, the configuration entries stored in the second memory location can be modified. Once the modifications are complete, a second virtual configuration file is created referencing the configuration entries stored at the second memory location. The first virtual configuration file is thereafter atomically replaced by the second virtual configuration file. | 08-27-2009 |
20090217262 | PLUGGABLE EXTENSIONS TO VIRTUAL MACHINE MONITORS - The functionality of a virtualization layer interposed between computer system hardware and a plurality of applications can be altered by pluggable extensions. According to one embodiment of the present invention, a virtualization layer is divided into a privileged portion and an unprivileged portion. While the privileged portion remains untouched, the functionality of the unprivileged portion can be modified by one or more pluggable extensions. Furthermore, file images operating on top of the virtualization layer, and in some cases unaware of the virtual nature of the virtualization layer, can be supplemented using pluggable extensions. | 08-27-2009 |
20090292887 | METHOD AND APPARATUS FOR PRESERVING MEMORY CONTENTS DURING A POWER OUTAGE - A method and apparatus for preserving contents of a volatile memory when a main (e.g., AC) power source is disconnected. The apparatus comprises flash memory, a controller for writing to the flash memory and a temporary power source. The temporary power source may be a relatively low power battery or supercapacitor. The apparatus is removably attached to a computing device (e.g., via a USB port). When main power of the device is disconnected, the temporary power source provides power for the apparatus, the volatile memory containing data to be safeguarded, and sufficient processing resources to transfer the data. For example, an auxiliary processor may be powered (instead of a relatively high-power processor) or just one core of a multi-core processor. Data are written to the apparatus and can be recovered when main power is reconnected. Or, the apparatus may be detached and attached to a different device for data recovery. | 11-26-2009 |
20120180050 | METHOD AND SYSTEM FOR COORDINATING HYPERVISOR SCHEDULING - A method for executing an application on multiple nodes includes synchronizing a first clock of a first node and a second clock of a second node, configuring a first hypervisor on the first node to execute a first application domain and a first privileged domain, and configuring a second hypervisor on the second node to execute a second application domain and a second privileged domain. Configuring the hypervisor includes allocating a first number of cycles of the first clock to the first privileged domain. Configuring the second hypervisor includes allocating the first number of cycles of the first clock to the second privileged domain. The method further includes executing the application in the first application domain and the second application domain. The first application domain and the second application domain execute semi-synchronously and the first privileged domain and the second privileged domain execute semi-synchronously. | 07-12-2012 |