Patent application number | Description | Published |
20100059887 | SEMICONDUCTOR DEVICE HAVING INSULATING FILM WITH SURFACE MODIFICATION LAYER AND METHOD FOR MANUFACTURING THE SAME - Provided is a semiconductor device, which includes an interlayer insulating film formed on a semiconductor substrate, a wiring layer filled in a recess formed in the interlayer insulating film, and a cap insulating film. The interlayer insulating film includes a first SiOCH film and a surface modification layer including an SiOCH film formed by modifying a surface layer of the first SiOCH film, the SiOCH film having a lower carbon concentration and a higher oxygen concentration than the first SiOCH film has. The cap insulating film contacts with surfaces of the metal wiring and the surface modification layer. | 03-11-2010 |
20110316161 | METHOD OF PRODUCING A DUAL DAMASCENE MULTILAYER INTERCONNECTION AND MULTILAYER INTERCONNECTION STRUCTURE - In an insulating film structure having a barrier insulating film, a via interlayer insulating film, a wiring interlayer insulating film, and a hard mask film stacked in this order on an underlayer wiring, a via hole pattern is formed in the insulating film structure, then a groove pattern is formed in the hard mask film, and a grove is formed in the insulating film structure using this as a mask. According to the prior art, the via side wall is oxidized equally severely in the both processes. The trench side wall is oxidized severely in the via first process according to the prior art, whereas, according to the present invention, the oxidation thereof is suppressed to such an extent that an almost non-oxidized state can be created. | 12-29-2011 |
20120015517 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - The semiconductor device includes an insulating film that is formed using a cyclic siloxane having a six-membered ring structure as a raw material; a trench that is formed in the insulating film; and a interconnect that is configured by a metal film embedded in the trench. In the semiconductor device, a modified layer is formed on a bottom surface of the trench, in which the number of carbon atoms and/or the number of nitrogen atoms per unit volume is larger than that inside the insulating film. | 01-19-2012 |
20120070986 | SEMICONDUCTOR DEVICE HAVING INSULATING FILM WITH SURFACE MODIFICATION LAYER AND METHOD FOR MANUFACTURING THE SAME - Provided is a semiconductor device, which includes an interlayer insulating film formed on a semiconductor substrate, a wiring layer filled in a recess formed in the interlayer insulating film, and a cap insulating film. The interlayer insulating film includes a first SiOCH film and a surface modification layer including an SiOCH film formed by modifying a surface layer of the first SiOCH film, the SiOCH film having a lower carbon concentration and a higher oxygen concentration than the first SiOCH film has. The cap insulating film contacts with surfaces of the metal wiring and the surface modification layer. | 03-22-2012 |
20120228728 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE - A semiconductor device in which MRAM is formed in a wiring layer A contained in a multilayered wiring layer, the MRAM having at least two first magnetization pinning layers in contact with a first wiring formed in a wiring layer and insulated from each other, a free magnetization layer overlapping the two first magnetization pinning layers in a plan view, and connected with the first magnetization pinning layers, a non-magnetic layer situated over the free magnetization layer, and a second magnetization pinning layer situated over the non-magnetic layer. | 09-13-2012 |
20130194010 | SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF OPERATING SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes a logic circuit having a plurality of operation modes, a power source circuit that generates a power source voltage to be supplied to the logic circuit, a power source wiring that couples the power source circuit and the logic circuit, and a charge control block that holds charges for controlling the voltage of the power source wiring. The power source circuit generates a first power source voltage for causing the logic circuit to operate in a computing mode and a second power source voltage for causing the logic circuit to operate in a sleep mode. The charge control block includes a capacitor, a first switch, and a voltage supply unit that supplies the second power source voltage or a third power source voltage lower than the second power source voltage, to the capacitor. | 08-01-2013 |
20140080228 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE - A semiconductor device in which MRAM is formed in a wiring layer A contained in a multilayered wiring layer, the MRAM having at least two first magnetization pinning layers in contact with a first wiring formed in a wiring layer and insulated from each other, a free magnetization layer overlapping the two first magnetization pinning layers in a plan view, and connected with the first magnetization pinning layers, a non-magnetic layer situated over the free magnetization layer, and a second magnetization pinning layer situated over the non-magnetic layer. | 03-20-2014 |
20150279923 | SEMICONDUCTOR DEVICE - To provide a semiconductor device having less variation in characteristics. The semiconductor device is equipped with a plug formed in an interlayer insulating film, a lower electrode provided on the plug and to be coupled to the plug, a middle layer provided on the lower electrode and made of a metal oxide, and an upper electrode provided on the middle layer. The middle layer has a layered region contiguous to the lower electrode and the upper electrode. At least a portion of the layered region does not overlap with the plug. At least a portion of the plug does not overlap with the layered region. | 10-01-2015 |