Patent application number | Description | Published |
20120297772 | SYSTEMS AND METHODS FOR EFFICIENT TWO-PHASE HEAT TRANSFER IN COMPRESSED-AIR ENERGY STORAGE SYSTEMS - In various embodiments, foam is compressed to store energy and/or expanded to recover energy. | 11-29-2012 |
20130074485 | SYSTEMS AND METHODS FOR FOAM-BASED HEAT EXCHANGE DURING ENERGY STORAGE AND RECOVERY USING COMPRESSED GAS - In various embodiments, foam is compressed to store energy and/or expanded to recover energy. | 03-28-2013 |
20130074488 | SYSTEMS AND METHODS FOR FOAM-BASED HEAT EXCHANGE DURING ENERGY STORAGE AND RECOVERY USING COMPRESSED GAS - In various embodiments, foam is compressed to store energy and/or expanded to recover energy. | 03-28-2013 |
20130074940 | SYSTEMS AND METHODS FOR FOAM-BASED HEAT EXCHANGE DURING ENERGY STORAGE AND RECOVERY USING COMPRESSED GAS - In various embodiments, foam is compressed to store energy and/or expanded to recover energy. | 03-28-2013 |
20130074941 | SYSTEMS AND METHODS FOR FOAM-BASED HEAT EXCHANGE DURING ENERGY STORAGE AND RECOVERY USING COMPRESSED GAS - In various embodiments, foam is compressed to store energy and/or expanded to recover energy. | 03-28-2013 |
20130074949 | SYSTEMS AND METHODS FOR FOAM-BASED HEAT EXCHANGE DURING ENERGY STORAGE AND RECOVERY USING COMPRESSED GAS - In various embodiments, foam is compressed to store energy and/or expanded to recover energy. | 03-28-2013 |
20130152568 | VALVE ACTIVATION IN COMPRESSED-GAS ENERGY STORAGE AND RECOVERY SYSTEMS - In various embodiments, valve efficiency and reliability are enhanced via use of hydraulic or magnetic valve actuation, valves configured for increased actuation speed, and/or valves controlled to reduce collision forces during actuation. | 06-20-2013 |
20130152571 | VALVE ACTIVATION IN COMPRESSED-GAS ENERGY STORAGE AND RECOVERY SYSTEMS - In various embodiments, valve efficiency and reliability are enhanced via use of hydraulic or magnetic valve actuation, valves configured for increased actuation speed, and/or valves controlled to reduce collision forces during actuation. | 06-20-2013 |
20130152572 | VALVE ACTIVATION IN COMPRESSED-GAS ENERGY STORAGE AND RECOVERY SYSTEMS - In various embodiments, valve efficiency and reliability are enhanced via use of hydraulic or magnetic valve actuation, valves configured for increased actuation speed, and/or valves controlled to reduce collision forces during actuation. | 06-20-2013 |
20130336721 | FLUID STORAGE IN COMPRESSED-GAS ENERGY STORAGE AND RECOVERY SYSTEMS - In various embodiments, lined underground reservoirs and/or insulated pipeline vessels are utilized for storage of compressed fluid in conjunction with energy storage and recovery systems. | 12-19-2013 |
20140000251 | SYSTEMS AND METHODS FOR EFFICIENT TWO-PHASE HEAT TRANSFER IN COMPRESSED-AIR ENERGY STORAGE SYSTEMS | 01-02-2014 |
20140013735 | FLUID STORAGE IN COMPRESSED-GAS ENERGY STORAGE AND RECOVERY SYSTEMS - In various embodiments, lined underground reservoirs and/or insulated pipeline vessels are utilized for storage of compressed fluid in conjunction with energy storage and recovery systems. | 01-16-2014 |
Patent application number | Description | Published |
20140021590 | Method of Manufacturing Semiconductor Devices Using Ion Implantation - A manufacturing method provides a semiconductor device with a substrate layer and an epitaxial layer adjoining the substrate layer. The epitaxial layer includes first columns and second columns of different conductivity types. The first and second columns extend along a main crystal direction along which channeling of implanted ions occurs from a first surface into the epitaxial layer. A vertical dopant profile of one of the first and second columns includes first portions separated by second portions. In the first portions a dopant concentration varies by at most 30%. In the second portions the dopant concentration is lower than in the first portions. The ratio of a total length of the first portions to the total length of the first and second portions is at least 50%. The uniform dopant profiles improve device characteristics. | 01-23-2014 |
20140117502 | METHOD FOR PROCESSING A SEMICONDUCTOR CARRIER, A SEMICONDUCTOR CHIP ARRANGEMENT AND A METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE - A method for processing a semiconductor carrier is provided, the method including: providing a semiconductor carrier including a doped substrate region and a device region disposed over a first side of the doped substrate region, the device region including at least part of one or more electrical devices; and implanting ions into the doped substrate region to form a gettering region in the doped substrate region of the semiconductor carrier. | 05-01-2014 |
20140151858 | INCREASING THE DOPING EFFICIENCY DURING PROTON IRRADIATION - A description is given of a method for doping a semiconductor body, and a semiconductor body produced by such a method. The method comprises irradiating the semiconductor body with protons and irradiating the semiconductor body with electrons. After the process of irradiating with protons and after the process of irradiating with electrons, the semiconductor body is subjected to heat treatment in order to attach the protons to vacancies by means of diffusion. | 06-05-2014 |
20140175593 | Super Junction Semiconductor Device - A super junction semiconductor device includes a substrate layer of a first conductivity type and an epitaxial layer adjoining the substrate layer and including first columns of the first conductivity type and second columns of a second conductivity type. The first and second columns extend along a main crystal direction into the epitaxial layer and have vertical dopant profiles perpendicular to the first surface. The vertical dopant profile of at least one of the first and second columns includes first portions separated by second portions. In each of the first portions a dopant concentration varies by at most 30% of a maximum value within the respective first portion. In the second portions the dopant concentration is lower than in the adjoining first portions. A ratio of a total length of the first portions to a total length of the first and second portions is at least 50%. | 06-26-2014 |
20140306347 | Semiconductor Device with an Insulation Layer Having a Varying Thickness - A layer with a laterally varying thickness, a substrate with a first surface and an insulation layer formed on the first surface of the substrate is provided. A plurality of at least one of recesses and openings is formed in the insulation layer, wherein the plurality is arranged at a pitch. Each of the at least one of recesses and openings has a lateral width, wherein at least one of the pitch and the lateral width varies in a lateral direction. The plurality of the at least one of recesses and openings defines a given region in the insulation layer. The insulation layer having the plurality of the at least one of the recesses and openings is tempered at elevated temperatures so that the insulation layer at least partially diffluences to provide the insulation layer with a laterally varying thickness at least in the given region. | 10-16-2014 |
20150041963 | Semiconductor Device Having a Surface with Ripples - According to one embodiment of a semiconductor device, the semiconductor device includes a semiconductor substrate having a first surface, an insulation layer having a laterally varying thickness on the first surface, and a metal layer on the first surface. The insulation layer has ripples in its surface facing the metal layer. According to another embodiment of a semiconductor device, the semiconductor device includes a semiconductor substrate having a first surface and including at least one of a laterally varying thickness and an inclined first surface. The first surface of the semiconductor substrate has ripples. | 02-12-2015 |
20150235853 | INCREASING THE DOPING EFFICIENCY DURING PROTON IRRADIATION - A description is given of a method for doping a semiconductor body, and a semiconductor body produced by such a method. The method comprises irradiating the semiconductor body with protons and irradiating the semiconductor body with electrons. After the process of irradiating with protons and after the process of irradiating with electrons, the semiconductor body is subjected to heat treatment in order to attach the protons to vacancies by means of diffusion. | 08-20-2015 |
20150325440 | Method for Forming a Semiconductor Device and Semiconductor Device - A method for forming a semiconductor device includes depositing an epitaxial layer on a semiconductor substrate, forming an oxygen diffusion region within the epitaxial layer by oxygen diffusion from the semiconductor substrate into a part of the epitaxial layer and tempering at least the oxygen diffusion region of the epitaxial layer at a temperature between 400° C. and 480° C. for more than 15 minutes. | 11-12-2015 |
20150371858 | Method for Treating a Semiconductor Wafer - A Magnetic Czochralski semiconductor wafer having opposing first and second sides arranged distant from one another in a first vertical direction is treated by implanting first particles into the semiconductor wafer via the second side to form crystal defects in the semiconductor wafer. The crystal defects have a maximum defect concentration at a first depth. The semiconductor wafer is heated in a first thermal process to form radiation induced donors. Implantation energy and dose are chosen such that the semiconductor wafer has, after the first thermal process, an n-doped semiconductor region arranged between the second side and first depth, and the n-doped semiconductor region has, in the first vertical direction, a local maximum of a net doping concentration between the first depth and second side and a local minimum of the net doping concentration between the first depth and first maximum. | 12-24-2015 |
Patent application number | Description | Published |
20140197876 | Semiconductor Device with IGBT Cell and Desaturation Channel Structure - A semiconductor device includes an IGBT cell including a second-type doped drift zone, and a desaturation semiconductor structure for desaturating a charge carrier concentration in the IGBT cell. The desaturation structure includes a first-type doped region forming a pn-junction with the drift zone, and two portions of a trench or two trenches arranged in the first-type doped region and beside the IGBT cell in a lateral direction. Each of the two trench portions or each of the two trenches has a wide part below a narrow part. The wide parts confine a first-type doped desaturation channel region of the first-type doped region at least in the lateral direction. The narrow parts confine a first-type doped mesa region of the first-type doped region at least in the lateral direction. The desaturation channel region has a width smaller than the mesa region in the lateral direction, and adjoins the mesa region. | 07-17-2014 |
20140209973 | Reverse Blocking Semiconductor Device, Semiconductor Device with Local Emitter Efficiency Modification and Method of Manufacturing a Reverse Blocking Semiconductor Device - A reverse blocking semiconductor device includes a base region of a first conductivity type and a body region of a second, complementary conductivity type, wherein the base and body regions form a pn junction. Between the base region and a collector electrode an emitter layer is arranged that includes emitter zones of the second conductivity type and at least one channel of the first conductivity type. The channels extend through the emitter layer between the base region and the collector electrode and reduce the leakage current in a forward blocking state. | 07-31-2014 |
20150041962 | Semiconductor Device with Cell Trench Structures and Contacts and Method of Manufacturing a Semiconductor Device - First and second cell trench structures extend from a first surface into a semiconductor substrate. The first cell trench structure includes a first buried electrode and a first insulator layer between the first buried electrode and a semiconductor mesa separating the first and second cell trench structures. A capping layer covers the first surface. The capping layer is patterned to form an opening having a minimum width larger than a thickness of the first insulator layer. The opening exposes a first vertical section of the first insulator layer at the first surface. An exposed portion of the first insulator layer is removed to form a recess between the semiconductor mesa and the first buried electrode. A contact structure is in the opening and the recess. The contact structure electrically connects both a buried zone in the semiconductor mesa and the first buried electrode and allows for narrower semiconductor mesa width. | 02-12-2015 |
20150076554 | Insulated Gate Bipolar Transistor with Mesa Sections Between Cell Trench Structures and Method of Manufacturing - An IGBT includes a mesa section that extends between two cell trench structures from a first surface of a semiconductor portion to a layer section of the semiconductor portion. A source region, which is electrically connected to an emitter electrode, is formed in the mesa section. A doped region, which is separated from the source region by a body region of a complementary conductivity type, includes a first portion with a first mean net impurity concentration and a second portion with a second mean net impurity concentration exceeding at least ten times the first mean net impurity concentration. In the mesa section the first portion extends from the body region to the layer section. The second portions of the doped region virtually narrow the mesa sections in a normal on-state of the IGBT. | 03-19-2015 |
20150091051 | Semiconductor Device and Method for Forming a Semiconductor Device - A semiconductor device includes an insulated gate bipolar transistor (IGBT) arrangement. The IGBT arrangement includes a carrier confinement reduction region laterally arranged between a cell region and a sensitive region. The IGBT arrangement is configured or formed so that the cell region has a first average density of free charge carriers in an on-state of the IGBT arrangement, the carrier confinement reduction region has a second average density of free charge carriers in the on-state of the IGBT arrangement and the sensitive region has a third average density of free charge carriers in the on-state of the IGBT arrangement. The first average density of free charge carriers is larger than the second average density of free charge carriers and the second average density of free charge carriers is larger than the third average density of free charge carriers. | 04-02-2015 |
20150091052 | Semiconductor Device and Method for Forming a Semiconductor Device - A semiconductor device includes an insulated gate bipolar transistor (IGBT) arrangement. The IGBT arrangement includes a first configuration region of emitter-side insulated gate bipolar transistor structures and a second configuration region of emitter-side insulated gate bipolar transistor structures. The first configuration region and the second configuration region are arranged at a main surface of a semiconductor substrate of the semiconductor device. Further, the IGBT arrangement includes a collector layer and a drift layer. The collector layer is arranged at a backside surface of the semiconductor substrate and the drift layer is arranged between the collector layer and the emitter-side IGBT structures of the first configuration region and the second configuration region. Additionally, the collector layer includes at least a first doping region laterally adjacent to a second doping region. The first doping region and second doping region include different charge carrier life times, different conductivity types or different doping concentrations. | 04-02-2015 |
20150091053 | IGBT with Reduced Feedback Capacitance - An IGBT includes at least one first type transistor cell, including a base region, a first emitter region, a body region, and a second emitter region. The body region is arranged between the first emitter region and the base region. The base region is arranged between the body region and the second emitter region. The IGBT further includes a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric, and a base electrode adjacent the base region and dielectrically insulated from the base region by a base electrode dielectric. The base region has a first base region section adjoining the base electrode dielectric and a second base region section arranged between the second emitter region and the first base region section. A doping concentration of the first base region section is higher than a doping concentration of the second base region section. | 04-02-2015 |
20150144988 | Semiconductor Device and Insulated Gate Bipolar Transistor with Barrier Regions - In a semiconductor device a barrier region is sandwiched between a drift region and a charge carrier transfer region. The barrier and charge carrier transfer regions form a pn junction. The barrier and drift regions form a homojunction. A mean impurity concentration in the barrier region is at least ten times as high as an impurity concentration in the drift region. A control structure is arranged to form an inversion layer in the drift and barrier regions in an inversion state. No inversion layer is formed in the drift and barrier regions in a non-inversion state. | 05-28-2015 |
20150145028 | Semiconductor Device with Cell Trench Structures and Contacts and Method of Manufacturing a Semiconductor Device - A semiconductor mesa is formed in a semiconductor layer between a first cell trench structure and a second cell trench structure extending from a first surface into the semiconductor layer. An opening is formed in a capping layer formed on the first surface, wherein the opening exposes at least a portion of the semiconductor mesa. Through the opening impurities of a first conductivity type are introduced into the exposed portion of the semiconductor mesa. A recess defined by the opening is formed. | 05-28-2015 |
20150162406 | Semiconductor Device with Recombination Region - A semiconductor device includes a pn junction between a drift zone and a charge-carrier transfer region in a semiconductor body. An access channel provides a permanent charge carrier path connecting the drift zone with a recombination region through a separation region between the drift zone and the recombination region. The access channel adjusts a plasma density in the drift zone and the recombination region. | 06-11-2015 |
20150162407 | Semiconductor Device with Recombination Region - A semiconductor device includes a drift zone in a semiconductor body. A charge-carrier transfer region forms a pn junction with the drift zone in the semiconductor body. A control structure electrically connects a recombination region to the drift zone during a desaturation cycle and disconnects the recombination region from the drift zone outside the desaturation cycle. During the desaturation cycle the recombination region reduces a charge carrier plasma in the drift zone and reduces reverse recovery losses without adversely affecting blocking characteristics. | 06-11-2015 |
20150214347 | Semiconductor Device Including Undulated Profile of Net Doping in a Drift Zone - A semiconductor device includes a semiconductor body having opposite first and second sides. The semiconductor device further includes a drift zone in the semiconductor body between the second side and a pn junction. A profile of net doping of the drift zone along at least 50% of a vertical extension of the drift zone between the first and second sides is undulated and includes doping peak values between 1×10 | 07-30-2015 |
20150214930 | Method of Operating a Semiconductor Device having an IGBT and Desaturation Channel Structure - A semiconductor device having an IGBT structure is operated by applying a gate voltage with a first value to a gate electrode terminal such that current flows through the IGBT between first and second electrode terminals and current flow through a desaturation channel is substantially blocked. A gate voltage with a second value is applied to the gate electrode terminal, the absolute value of the second value being lower than the absolute value of the first value, such that current flows through the IGBT between the first and second electrode terminals and charge carriers flow as a desaturating current through the desaturation channel to the first electrode terminal. A gate voltage with a third value is applied to the gate electrode terminal, the absolute value of the third value being lower than the respective absolute values of the first and second values, such that current flow through the IGBT between the first and second electrode terminals is substantially blocked. | 07-30-2015 |
20150221756 | Semiconductor Device and Insulated Gate Bipolar Transistor with Barrier Structure - A semiconductor device includes a semiconductor mesa which is formed between cell trench structures extending from a first surface into a semiconductor body. The semiconductor mesa includes a body zone forming a first pn junction with a drift zone between the body zone and a second surface opposite to the first surface. Source zones are arranged along a longitudinal axis of the semiconductor mesa at a first distance from each other and form second pn junctions with the body zone. A barrier structure, which has the conductivity type of the source zones, forms at least one of a unipolar homojunction with the drift zone and a pn junction with the body zone at least outside a vertical projection of the source zones perpendicular to the first surface. The barrier structure may be absent in the vertical projection of the source zones. | 08-06-2015 |
20150236142 | Semiconductor Device with Insert Structure at a Rear Side and Method of Manufacturing - A cavity is formed in a first semiconductor layer that is formed on a semiconducting base layer. The cavity extends from a process surface of the first semiconductor layer to the base layer. A recessed mask liner is formed on a portion of a sidewall of the cavity distant to the process surface or a mask plug is formed in a portion of the cavity distant do the process surface. A second semiconductor layer is grown by epitaxy on the process surface. The second semiconductor layer spans the cavity. | 08-20-2015 |
20150270132 | Method of Manufacturing Semiconductor Devices Including Generating and Annealing Radiation-Induced Crystal Defects - The generation of auxiliary crystal defects is induced in a semiconductor substrate. Then the semiconductor substrate is pre-annealed at a temperature above a dissociation temperature at which the auxiliary crystal defects transform into defect complexes, which may be electrically inactive. Then protons may be implanted into the semiconductor substrate to induce the generation of radiation-induced main crystal defects. The defect complexes may enhance the efficiency of the formation of particle-related dopants based on the radiation-induced main crystal defects. | 09-24-2015 |
20150270369 | Method of Manufacturing an Insulated Gate Bipolar Transistor with Mesa Sections Between Cell Trench Structures - A method of manufacturing an insulated gate bipolar transistor includes providing trenches extending from a first surface to a layer section in a semiconductor portion, introducing impurities into mesa sections between the trenches, and forming, from the introduced impurities, second portions of doped regions separated from source regions by body regions. The source regions are electrically connected to an emitter electrode. The second portions have a second mean net impurity concentration exceeding at least ten times a first mean net impurity concentration in first portions of the doped layer. The first portions extend from the body regions to the layer section, respectively. | 09-24-2015 |
20150279985 | TRENCH TRANSISTOR DEVICE - A transistor device includes a semiconductor mesa region between first and second trenches in a semiconductor body, a body region of a first conductivity type and a source region of a second conductivity type in the semiconductor mesa region, a drift region of the second conductivity type in the semiconductor body, and a gate electrode adjacent the body region in the first trench, and dielectrically insulated from the body region by a gate dielectric. The body region separates the source region from the drift region and extends to the surface of the semiconductor mesa region adjacent the source region. The body region comprises a surface region which adjoins the surface of the semiconductor mesa region and the first trench. The surface region has a higher doping concentration than a section of the body region that separates the source region from the drift region. | 10-01-2015 |
20150295034 | SEMICONDUCTOR DEVICE WITH SEMICONDUCTOR MESA INCLUDING A CONSTRICTION - A semiconductor device includes a body zone in a semiconductor mesa, which is formed between neighboring control structures that extend from a first surface into a semiconductor body. A drift zone forms a first pn junction with the body zone. In the semiconductor mesa, the drift zone includes a first drift zone section that includes a constricted section of the semiconductor mesa. A minimum horizontal width of the constricted section parallel to the first surface is smaller than a maximum horizontal width of the body zone. An emitter layer between the drift zone and the second surface parallel to the first surface includes at least one first zone of a conductivity type of the drift zone. | 10-15-2015 |
20150303190 | Semiconductor Device Having an Insulated Gate Bipolar Transistor Arrangement and a Method for Forming Such a Semiconductor Device - A semiconductor device includes an insulated gate bipolar transistor (IGBT) arrangement. The IGBT arrangement includes a carrier confinement reduction region laterally arranged between a cell region and a sensitive region. The IGBT arrangement is configured or formed so that the cell region has a first average density of free charge carriers in an on-state of the IGBT arrangement, the carrier confinement reduction region has a second average density of free charge carriers in the on-state of the IGBT arrangement and the sensitive region has a third average density of free charge carriers in the on-state of the IGBT arrangement. The first average density of free charge carriers is larger than the second average density of free charge carriers and the second average density of free charge carriers is larger than the third average density of free charge carriers. | 10-22-2015 |
20150325687 | SEMICONDUCTOR DEVICE AND INSULATED GATE BIPOLAR TRANSISTOR WITH SOURCE ZONES FORMED IN SEMICONDUCTOR MESAS - A semiconductor device includes a semiconductor mesa that includes at least one body zone forming first pn junctions with source zones and a second pn junction with a drift zone. Electrode structures are on opposite sides of the semiconductor mesa. At least one of the electrode structures includes a gate electrode configured to control a charge carrier flow through the at least one body zone. In a separation region between the source zones, which are arranged along an extension direction of the semiconductor mesa, the semiconductor mesa includes at least one partial or complete constriction. | 11-12-2015 |
20150325688 | SEMICONDUCTOR DEVICE AND REVERSE CONDUCTING INSULATED GATE BIPOLAR TRANSISTOR WITH ISOLATED SOURCE ZONES - A semiconductor device includes a semiconductor mesa with at least one body zone forming first pn junctions with source zones and a second pn junction with a drift zone. A pedestal layer at a side of the drift zone opposite to the at least one body zone includes first zones of a conductivity type of the at least one body zone and second zones of the conductivity type of the drift zone. Electrode structures are on opposite sides of the semiconductor mesa. At least one of the electrode structures includes a gate electrode controlling a charge carrier flow through the at least one body zone. In a separation region between two of the source zones (i) a capacitive coupling between the gate electrode and the semiconductor mesa or (ii) a conductivity of majority charge carriers of the drift zone is lower than outside of the separation region. | 11-12-2015 |
20150364588 | Semiconductor Device Having an Insulated Gate Bipolar Transistor Arrangement - A semiconductor device includes an insulated gate bipolar transistor (IGBT) arrangement having a first configuration region of emitter-side insulated gate bipolar transistor structures, a second configuration region of emitter-side insulated gate bipolar transistor structures, a collector layer and a drift layer. The drift layer is arranged between the collector layer and the emitter-side insulated gate bipolar transistor structures of the first configuration region and the second configuration region. The collector layer includes at least a first doping region laterally adjacent to a second doping region, the doping regions having different charge carrier life times, different conductivity types or different doping concentrations. The first configuration region is located with at least a partial lateral overlap to the first doping region, and the second configuration region is located with at least a partial lateral overlap to the second doping region. | 12-17-2015 |
20150365083 | CIRCUIT AND METHOD FOR DRIVING A POWER SEMICONDUCTOR SWITCH - A drive circuit for driving a semiconductor switch includes an overload detector circuit connected to the semiconductor switch and designed to detect an overload state of the semiconductor switch. The drive circuit further includes a driver circuit connected to a control terminal of the semiconductor switch and designed to generate, upon detection of an overload state, a driver signal having a level such that the semiconductor switch is switched off or switch-on is prevented. The driver circuit is further designed to generate a driver signal for driving the semiconductor switch according to a control signal, wherein for switching on the transistor at a first instant a driver signal is generated at a first level and, if no overload state is detected up to a predefined time period having elapsed, the level of the driver signal is increased to a second level. | 12-17-2015 |
20150380511 | FIELD EFFECT SEMICONDUCTOR COMPONENT AND METHODS FOR OPERATING AND PRODUCING IT - In accordance with one component, a power field effect transistor is proposed, including a substrate, a channel, a gate electrode, and a gate insulator. The gate insulator is arranged at least partly between the gate electrode and the channel and includes a material having a hysteresis with respect to its polarization, such that a switching state of the transistor produced by a voltage applied to the gate electrode is maintained after the voltage has been switched off. Furthermore, a half-bridge circuit is proposed, including a high-side transistor in accordance with the construction according to the disclosure, and a low-side transistor, and also methods and circuits for driving. | 12-31-2015 |
20160005818 | IGBT Having at Least One First Type Transistor Cell and Reduced Feedback Capacitance - An IGBT includes at least one first type transistor cell, including a base region, first and second emitter regions, and a body region arranged between the first emitter region and base region. The base region is arranged between the body region and second emitter region. A gate electrode adjacent the body region is dielectrically insulated from the body region by a gate dielectric. A base electrode adjacent the base region is dielectrically insulated from the base region by a base electrode dielectric. The base region has a first base region section adjoining the base electrode dielectric and a second base region section arranged between the second emitter region and the first base region section. A ratio between the doping concentration of the first base region section and the doping concentration of the second base region section is at least 10. The base electrode dielectric is thicker than the gate dielectric. | 01-07-2016 |
20160056251 | SEMICONDUCTOR SWITCHING DEVICE INCLUDING CHARGE STORAGE STRUCTURE - A semiconductor switching device includes a first load terminal electrically connected to source zones of transistor cells. The source zones form first pn junctions with body zones. A second load terminal is electrically connected to a drain construction that forms second pn junctions with the body zones. Control structures, which include a control electrode and charge storage structures, directly adjoin the body zones. The control electrode controls a load current through the body zones. The charge storage structures insulate the control electrode from the body zones and contain a control charge adapted to induce inversion channels in the body zones in the absence of a potential difference between the control electrode and the first load electrode. | 02-25-2016 |
20160071974 | SEMICONDUCTOR DEVICE WITH CONTROL STRUCTURE INCLUDING BURIED PORTIONS AND METHOD OF MANUFACTURING - A semiconductor device includes transistor cells with source zones of a first conductivity type and body zones of a second conductivity type. The source and body zones are formed in a semiconductor mesa formed from a portion of a semiconductor body. Control structures include first portions extending into the semiconductor body on at least two opposing sides of the semiconductor mesa, second portions in a distance to the first surface between the first portions, and third portions in a distance to the first surface and connecting the first and the second portions, wherein constricted sections of the semiconductor mesa are formed between neighboring third portions. | 03-10-2016 |
20160087005 | Semiconductor Device with Variable Resistive Element - A semiconductor device includes a semiconductor body including a drift zone that forms a pn junction with an emitter region. A first load electrode is at a front side of the semiconductor body. A second load electrode is at a rear side of the semiconductor body opposite to the front side. One or more variable resistive elements are electrically connected in a controlled path between the drift zone and one of the first and second load electrodes. The variable resistive elements activate and deactivate electronic elements of the semiconductor device in response to a change of the operational state of the semiconductor device. | 03-24-2016 |
20160093724 | Semiconductor Device and Reverse Conducting Insulated Gate Bipolar Transistor with Isolated Source Zones - A semiconductor device includes a semiconductor mesa having source zones separated from each other along a longitudinal axis of the semiconductor mesa and at least one body zone forming first pn junctions with the source zones and a second pn junction with a drift zone. Electrode structures are on opposite sides of the semiconductor mesa, at least one of which includes a gate electrode configured to control a charge carrier flow through the at least one body zone. First portions of the at least one body zone are formed between the source zones and separation regions. In the separation regions, at least one of (i) a capacitive coupling between the gate electrode and the semiconductor mesa and (ii) a conductivity of majority charge carriers of the drift zone is lower than outside of the separation region. | 03-31-2016 |
20160099188 | Semiconductor Device with Sensor Potential in the Active Region - A semiconductor device includes semiconductor body region and a surface region, the semiconductor body region including a first conductivity type first semiconductor region type and a second conductivity type second semiconductor region. The semiconductor device further includes: a first load contact structure included in the surface region and arranged for feeding a load current into the semiconductor body region; a first trench extending into the semiconductor body region and having a sensor electrode and a first dielectric, the first dielectric electrically insulating the sensor electrode from the second semiconductor region; an electrically conductive path electrically connecting the sensor electrode to the first semiconductor region; a first semiconductor path, wherein the first semiconductor region is electrically coupled to the first load contact structure by at least the first semiconductor path; a sensor contact structure included in the surface region and arranged for receiving an electrical potential of the sensor electrode. | 04-07-2016 |