Patent application number | Description | Published |
20110140713 | FUSE DRIVER CIRCUITS - Fuse driver circuits, fuse driver testing circuitry, and methods for testing the fuse driver circuits using the testing circuitry are described. In some embodiments, the fuse driver circuit can be made using a fuse, a NMOS transistor, and a PMOS transistor. The drain of the NMOS transistor can be connected to the negative end of the fuse. The source of the NMOS transistor can be connected to ground. The drain of the PMOS transistor can be connected to a positive end of the fuse. The NMOS and PMOS transistors provide enhanced robustness to the fuse driver circuit in both undervoltage and overvoltage conditions. Other embodiments are also described. | 06-16-2011 |
20110254618 | DIFFERENTIAL THERMISTOR CIRCUIT - This document discusses, among other things, an apparatus and method for providing temperature information. In an example, an integrated circuit apparatus can include a first resistor configured to be coupled to a first terminal of a temperature-sensitive resistance, a second resistor configured to be coupled to a second terminal of the temperature-sensitive resistance, and a temperature information circuit configured to receive a first voltage from the first terminal of the temperature-sensitive resistance and a second voltage from the second terminal of the temperature-sensitive resistance. The temperature information circuit can provide the temperature information using the first and second voltages. | 10-20-2011 |
20110291482 | VBUS POWER SWITCH - This document discusses, among other things, an electronic circuit and method for defaulting to a valid battery supply to power an electronic device. In an example, an electronic circuit can be configured to receive information about the battery supply (e.g., an internal battery), such as the battery supply voltage (V | 12-01-2011 |
20120119796 | PASS TRANSISTOR CAPACITANCE AND JITTER REDUCTION - A system comprises a pass switch circuit and a first pass switch activation circuit. The pass switch circuit includes an impedance circuit and a pass transistor having a first source/drain connection, a second source/drain connection, and a gate input. The pass switch circuit passes an electronic signal from the first source/drain connection to the second source/drain connection in response to activation of the gate input. An impedance transfer function of the pass switch circuit is determined at least in part by an impedance of the impedance circuit and the impedance is sized to minimize attenuation of the electronic signal due to the impedance transfer function of the pass switch circuit. The first pass switch activation circuit provides a first activation signal to the gate input in response to an enable signal. | 05-17-2012 |
20120161860 | MULTI-LEVEL CONTROL FOR PASS TRANSISTOR GATE VOLTAGE - A circuit for selectively providing a signal from a source to a sink is provided. The circuit includes a field effect transistor having a conducting state and a non-conducting state, the field effect transistor having a gate, a source, and a drain. The circuit also includes a first comparator configured to provide a first output based on a difference between a source voltage at the source of the field effect transistor and a first reference voltage. Finally, the circuit includes a switching amplifier configured to apply a first gate voltage to the gate of the field effect transistor as a function of the first output of the first comparator. | 06-28-2012 |
20120198183 | SUCCESSIVE APPROXIMATION RESISTOR DETECTION - An apparatus comprises a connector configured to receive an electrical contact of an accessory device that is electrically coupled to a resistor of the accessory device, a current source configured to apply a specified current to the resistor to generate a resulting voltage, a comparator configured to receive and compare the resulting voltage to a reference voltage, and a controller configured to store an outcome of the comparison as a bit in a register, to adjust the applied current using the outcome of the comparison, and to determine a resistance value for the resistor using the bit stored in the register. | 08-02-2012 |
20120206845 | PASS GATE OFF ISOLATION - This document discusses methods and apparatus for preventing or reducing sub-threshold pass gate leakage. In an example, an apparatus can include a pass gate configured to electrically couple a first node with a second node in a first state and to electrically isolate the first node from the second node in a second state, control logic configured to control the pass gate, wherein the control logic includes a supply rail, and an over-voltage circuit configured to compare voltages received at a plurality of input nodes and to couple an output to an input node a highest voltage. In an example, the output of over-voltage circuit can be selectively coupled to the supply rail. | 08-16-2012 |
20120287538 | ESD PROTECTION ON HIGH IMPEDANCE MIC INPUT - An apparatus comprises an integrated circuit (IC) including an external IC connection, a high impedance circuit, a biasing circuit communicatively coupled to the external IC connection via the high impedance circuit, and an electro-static discharge (ESD) protection circuit coupled to the biasing circuit to form a circuit shunt path leading from the IC external connection to the ESD protection circuit via the high impedance circuit. | 11-15-2012 |
20130154601 | REGULATOR TRANSIENT OVER-VOLTAGE PROTECTION - This document discusses, among other things, apparatus and methods for providing over-voltage transient protection of a voltage regulator. In an example, an apparatus can include a first transistor including a control node and first and second switch nodes, and a low-pass filter configured to couple to the control node of the first transistor and to switch the first transistor to a first state when a voltage change of the supply voltage exceeds a threshold. The first transistor, in the first state, can be configured to couple a control node of a second transistor to the supply voltage to protect components coupled to a regulator transistor. | 06-20-2013 |
20130154720 | CONSTANT VGS SWITCH - This document discusses, among other things, a signal switch circuit including a first field effect transistor (FET) configured to couple a first node to a second node in an on-state and a charge pump circuit configured to provide a first supply voltage to control the FET, wherein a reference voltage of the charge pump circuit is coupled to a well of the FET to maintain a constant gate to source voltage of the FET during the on-state. | 06-20-2013 |
20130162334 | NEGATIVE CHARGE PUMP - Generally, this disclosure provides negative charge pump circuitry that is configured to supply a voltage that is less than a reference voltage (such as ground). The charge pump circuitry includes blocking circuitry that reduces or eliminates charge leakage so that a negative voltage may be developed at the output. The charge pump circuitry generally includes complimentary pairs of MOS switches that switch in a complimentary fashion according to charge developed on complimentary capacitors to provide a negative voltage power supply. | 06-27-2013 |
20130169255 | REGULATOR POWER-ON-RESET WITH LATCH - This document discusses, among other things, apparatus and methods for providing a power-on-reset signal. An example apparatus can include a regulator configured to receive a supply voltage and to provide a regulated voltage at an output, and a power-on-reset (POR) circuit including a POR comparator. The POR circuit can be configured to provide an indication that the regulated voltage is below a threshold level using an output of the POR comparator and to disable the POR comparator when the regulated voltage is above the threshold level. | 07-04-2013 |
20130225067 | METHODS AND APPARATUS RELATED TO A REPEATER - In one general aspect, a repeater can include an input terminal configured to be coupled to a first portion of a MIPI signal path. The MIPI signal path being a unidirectional path between a receiver and a transmitter, the input terminal configured to receive a set of signals from the receiver via the MIPI signal path. The repeater can include an output terminal configured to be coupled to a second portion of the MIPI signal path, the first portion of the MIPI signal path and the second portion of the MIPI signal path having a combined distance greater than 30 centimeters. | 08-29-2013 |
20130229225 | METHODS AND APPARATUS RELATED TO AN IMPROVED COMPLEMENTARY MOSFET SWITCH - In one general aspect, an apparatus can include a complementary switch circuit including a first portion and a second portion, and a first driver circuit coupled to the first portion of the complementary switch circuit. The apparatus can include a positive charge pump device coupled to the first driver, and a second driver circuit coupled to the second portion of the complementary switch circuit. The apparatus can also include a negative charge pump device coupled to the second driver circuit. | 09-05-2013 |
20130249621 | METHODS AND APPARATUS FOR VOLTAGE SELECTION FOR A MOSFET SWITCH DEVICE - In one general aspect, an apparatus including a first voltage rail, and a second voltage rail. The apparatus includes a first P-type metal-oxide-semiconductor field effect transistor (MOSFET) PMOS device between the first voltage rail and the second voltage rail where the first PMOS device is configured to electrically couple the first voltage rail to the second voltage rail in response to the first PMOS device being activated. The apparatus can also include a second PMOS device configured to provide a charge pump voltage produced by a charge pump device to the second voltage rail in response to the second PMOS device being activated and the first PMOS device being deactivated. The apparatus can also include a pass gate, and a driver circuit coupled to the pass gate and configured to operate based on a voltage of the second voltage rail. | 09-26-2013 |
20130307591 | DEPLETION-MODE CIRCUIT - This document discloses, among other things, a switch circuit that includes a depletion-mode field-effect transistor (DMFET) having an ON-state and an OFF-state, wherein the DMFET is configured to couple a first node to a second node in the ON-state, and wherein the DMFET is configured to isolate the first node from the second node in the OFF-state, a negative charge pump that is coupled to a gate terminal of the DMFET, the charge pump configured to supply a negative charge pump voltage to the gate terminal of the DMFET, and a negative discriminator coupled to the charge pump, the discriminator configured to compare a first voltage at the first node and a second voltage at the second node and determine the negative charge pump voltage based on the comparison. | 11-21-2013 |
20130321070 | TRANSLATOR INCLUDING OVERSTRESS PROTECTION - This document discusses, among other things, a control circuit, such as a translator circuit, configured to reduce voltage stress of first and second transistors when a first voltage received by the first transistor exceeds a voltage rating of at least one of the first or second transistors. | 12-05-2013 |
20140049861 | PROTECTIVE MULTIPLEXER - Apparatus and methods for a protective multiplexer, among other things, are provided. In an example, a protective multiplexer circuit can include a first switch that in a first state can be configured to couple an input of a power supply to at least one of first or second signal nodes of a passgate when a first voltage of the at least one of the first or second signal nodes is below a first limit voltage. | 02-20-2014 |
20140143887 | SECURITY MEASURES FOR DATA PROTECTION - This document discusses, among other things, security measures for shielding or protecting data or sensitive signals on an integrated circuit (IC). The systems and methods disclosed herein can allow erasing sensitive data when access is not locked, locking out access to sensitive data during normal operations through both indirect and direct means, and shielding sensitive signals from invasive probing or manipulation. | 05-22-2014 |
20140239447 | METHODS AND APPARATUS RELATED TO CAPACITANCE REDUCTION OF A SIGNAL PORT - In one general aspect, an apparatus includes a first capacitor defined by a dielectric disposed between a bump metal and a region of a first conductivity type, and a second capacitor in series with the first capacitor and defined by a PN junction including the region of the first conductivity type and a region of a second conductivity type. The region of the first conductivity type can be configured to be coupled to a first node having a first voltage, and the region of the second conductivity type can be configured to be coupled to a second node having a second voltage different than the first voltage. | 08-28-2014 |
20140241398 | DIFFERENTIAL THERMISTOR CIRCUIT - This document discusses, among other things, an apparatus and method for providing temperature information. In an example, an integrated circuit apparatus can include a first resistor configured to be coupled to a first terminal of a temperature-sensitive resistance, a second resistor configured to be coupled to a second terminal of the temperature-sensitive resistance, and a temperature information circuit configured to receive a first voltage from the first terminal of the temperature-sensitive resistance and a second voltage from the second terminal of the temperature-sensitive resistance. The temperature information circuit can provide the temperature information using the first and second voltages. | 08-28-2014 |