Patent application number | Description | Published |
20080252382 | CLASS-F POWER AMPLIFIER CIRCUIT - An FET outputs a signal including a component of angular frequency ωo of input signal and harmonic components, a first two-terminal reactance circuit interconnects an output terminal and a ground terminal of the FET, a fundamental matching circuit is connected to an output terminal end of the FET, a second two-terminal reactance circuit is connected between an input terminal of the matching circuit and the output terminal, the FET has a parallel circuit of an output resistor and an output capacitor, the first two-terminal reactance circuit is open for a dc, shorted for angular frequencies 2ωo, 4ωo, . . . 2nωo, and parallel resonant with the output capacitor for angular frequencies 3ωo, 5ωo, . . . , (2n+1)ωo, and the second two-terminal reactance circuit is shorted for a dc, and open for angular frequencies 3ωo, 5ωo, . . . , (2n+1)ωo. | 10-16-2008 |
20090108298 | SEMICONDUCTOR DEVICE - A semiconductor device includes: substrate region; a gate electrode, a source electrode, and a drain electrode which are placed on a first surface of the substrate regions; an active area between gate and source placed between the gate electrode and the source electrode; an active area between gate and drain placed between the gate electrode and the drain electrode; an active area placed on the substrate region of the underneath part of the gate electrode, the source electrode, and the drain electrode; and a non-active area placed adjoining the active area, the active area between gate and source, and the active area between gate and drain. Furthermore, width W | 04-30-2009 |
20090108357 | SEMICONDUCTOR DEVICE - Electrode placement which applies easy heat dispersion of a semiconductor device with high power density and high exothermic density is provided for the semiconductor device including: a gate electrode, a source electrode, and a drain electrode which are placed on a first surface of a substrate | 04-30-2009 |
20090189200 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD OF THE SEMICONDUCTOR DEVICE - A semiconductor device and a fabrication method of the semiconductor device, the semiconductor device including: a gate electrode, a source electrode, and a drain electrode which are placed on a first surface of a substrate, and have a plurality of fingers; a gate terminal electrode, a source terminal electrode, and the drain terminal electrode which governed and formed a plurality of fingers for every the gate electrode, the source electrode, and the drain electrode; an active area placed on an underneath part of the gate electrode, the source electrode, and the drain electrode, on the substrate between the gate electrode and source electrode, and on the substrate between the gate electrode and the drain electrode; a sealing layer which is placed on the active area, the gate electrode, the source electrode, and the drain electrode through a cavity part, and performs a hermetic seal of the active area, the gate electrode, the source electrode, and the drain electrode. Accordingly, the semiconductor element itself can have air-tightness, it is not necessary to cover the gate electrode surface with a damp-proof protective film, gate capacitance of the semiconductor element is reduced, and high frequency characteristics and gain of the semiconductor element improve. | 07-30-2009 |
20100073099 | STABILIZATION NETWORK AND A SEMICONDUCTOR DEVICE HAVING THE STABILIZATION NETWORK - A stabilization network and a semiconductor device having the stabilization network wherein the stabilization network includes an active element having a negative resistance accompanying a high frequency negative resistance oscillation; and a tank circuit composed of a resistance connected to a main electrode of the active element, an inductance and capacitance which are connected in parallel with the resistance and synchronize with an oscillating frequency of the high frequency negative resistance oscillation, wherein the stabilization network is performed for suppressing a negative resistance accompanying a Gunn oscillation and obtaining stable and highly efficient power amplification. | 03-25-2010 |
20100091477 | PACKAGE, AND FABRICATION METHOD FOR THE PACKAGE - A package includes a conductive base plate; a ceramic wall configured to house a semiconductor device and a circuit board disposed adjoining of the semiconductor device, the ceramic wall configured to be disposed on the conductive base plate, the ceramic wall configured to include a frame shape having a screw hole in four corners; a metal seal ring configured to include a framed shape and be disposed on the ceramic wall; and a ceramic cap configured to be disposed on the metal seal ring, and the ceramic wall is screwed to the conductive base plate through the screw hole, and the package can radiate heat satisfactory in the heat generation from the semiconductor device, and can improve reliability, and can be applied to the high frequency of the microwave/millimeter wave/sub-millimeter wave band. | 04-15-2010 |
20100140721 | HIGH FREQUENCY SEMICONDUCTOR DEVICE - A high frequency semiconductor device includes: a field effect transistor including gate terminal electrodes, source terminal electrodes, and a drain terminal electrode; an input circuit pattern and an output circuit pattern which are disposed adjoining of the field effect transistor; a plurality of input bonding wires configured to connect the plurality of the gate terminal electrodes and the input circuit pattern; and a plurality of output bonding wires configured to connect the drain terminal electrode and the output circuit pattern, which makes matching an input/output signal phase by adjusting an inductance distribution of a plurality of input/output bonding wires, and improves gain and output power, and suppresses an oscillation by unbalanced operation of each FET cell. | 06-10-2010 |
20100244202 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD OF THE SEMICONDUCTOR DEVICE - A semiconductor device and its manufacturing method, the semiconductor device comprising: a semi-insulating substrate | 09-30-2010 |
20110018631 | SEMICONDUCTOR DEVICE - According to one embodiment, there is a semiconductor device including a first active element, a second active element connected in parallel with the first active element, and a first stabilization circuit connected between a gate of the first active element and a gate of the second active element and configured with a parallel circuit of a gate bypass resistor, a gate bypass capacitor, and a gate bypass inductor, the first stabilization circuit having a resonant frequency equal to an odd mode resonant frequency. | 01-27-2011 |
20110044016 | HIGH FREQUENCY CIRCUIT HAVING MULTI-CHIP MODULE STRUCTURE - According to one embodiment, there is a high frequency circuit having a multi-chip module structure, including a semiconductor substrate set formed with discrete transistors connected in series, a first dielectric substrate set formed with capacitors, and a second dielectric substrate set formed with strip lines. | 02-24-2011 |
20110181350 | HIGH FREQUENCY SEMICONDUCTOR DEVICE - According to one embodiment, a high frequency semiconductor device is provided, which includes: a distribution/input matching circuit board that mounts thereon a distribution/input matching circuit and an input transmission line pattern; an input capacitor board that is arranged adjacent to the distribution/input matching circuit board, and mounts a plurality of input capacitor cells thereon; a semiconductor board that is arranged adjacent to the input capacitor board, and mounts a plurality of field effect transistor cells thereon; an output capacitor board that is arranged adjacent to the semiconductor board, and mounts a plurality of output capacitor cells thereon; and a synthesis/output matching circuit board that is arranged adjacent to the output capacitor board, and mounts thereon an output transmission line pattern and a synthesis/output matching circuit, wherein the number of active field effect transistor cells is changed by connecting and disconnecting a plurality of field effect transistor cells to one another in response to a desired output power value, whereby a total gate electrode length is substantially changed, and an output power value is adjusted. | 07-28-2011 |
20110298552 | SEMICONDUCTOR DEVICE - According to one embodiment, there is a semiconductor device including a first active element, a second active element connected in parallel with the first active element, and a first stabilization circuit connected between a gate of the first active element and a gate of the second active element and configured with a parallel circuit of a gate bypass resistor, a gate bypass capacitor, and a gate bypass inductor, the first stabilization circuit having a resonant frequency equal to an odd mode resonant frequency. | 12-08-2011 |
20110312170 | SEMICONDUCTOR DEVICE AND FABRICATION MEHTOD OF THE SEMICONDUCTOR DEVICE - A semiconductor device and a fabrication method of the semiconductor device, the semiconductor device including: a gate electrode, a source electrode, and a drain electrode which are placed on a first surface of a substrate, and have a plurality of fingers; a gate terminal electrode, a source terminal electrode, and the drain terminal electrode which governed and formed a plurality of fingers for every the gate electrode, the source electrode, and the drain electrode; an active area placed on an underneath part of the gate electrode, the source electrode, and the drain electrode, on the substrate between the gate electrode and source electrode, and on the substrate between the gate electrode and the drain electrode; a sealing layer which is placed on the active area, the gate electrode, the source electrode, and the drain electrode through a cavity part, and performs a hermetic seal of the active area, the gate electrode, the source electrode, and the drain electrode. Accordingly, the semiconductor element itself can have air-tightness, it is not necessary to cover the gate electrode surface with a damp-proof protective film, gate capacitance of the semiconductor element is reduced, and high frequency characteristics and gain of the semiconductor element improve. | 12-22-2011 |
20120032190 | PACKAGE AND FABRICATION METHOD OF THE SAME - According to one embodiment, provided are a package utilized for a high frequency semiconductor device and a fabrication method for such the package, the package including: a conductive base plate including a CTE control layer composed of compound material, and a heat conduction layer disposed on the CTE control layer and composed of Cu. | 02-09-2012 |
20120126246 | PACKAGE AND HIGH FREQUENCY TERMINAL STRUCTURE FOR THE SAME - According to one embodiment, provided is a package and high frequency terminal structure for the same including: a conductive base plate; a semiconductor device disposed on the conductive base plate; a metal wall disposed on the conductive base plate to house the semiconductor device; a through-hole disposed in input and output units of the metal wall; a lower layer feed through inserted into the through-hole and disposed on the conductive base plate; and an upper layer feed through disposed on the lower layer feed through, and adhered to a sidewall of the metal wall. The lower layer feed through is surrounded by the metal wall. | 05-24-2012 |
20120138954 | SEMICONDUCTOR DEVICE - According to one embodiment, provided is a semiconductor device includes: a high frequency semiconductor chip; an input matching circuit disposed at the input side of the high frequency semiconductor chip; an output matching circuit disposed at the output side of the high frequency semiconductor chip; a high frequency input terminal connected to the input matching circuit; a high frequency output terminal connected to the output matching circuit, and a smoothing capacitor terminal connected to the high frequency semiconductor chip. The high frequency semiconductor chip, the input matching circuit and the output matching circuit are housed by one package. | 06-07-2012 |
20120199847 | SEMICONDUCTOR DEVICE - A semiconductor device according to one embodiment includes: a unit FET cell(s) having multi-fingers composed of parallel connection of a unit finger; a designated gate bus line(s) configured to connect gate fingers of the unit FET cell having multi-fingers in parallel; and a gate extracting line(s) configured to be connected to the designated gate bus line, wherein a connecting point between the gate extracting line and the designated gate bus line is shifted from a center in the unit FET cell having multi-fingers, and thereby the numbers of the gate fingers connected to one side of the connecting point is more than the number of the gate fingers connected to another side of the connecting point. | 08-09-2012 |
20120218040 | CLASS-AB POWER AMPLIFIER - According to an embodiment, a class-AB power amplifier includes an amplifying element whose power supply voltage is expressed as Vdc and whose maximum current is expressed as Imax, a conduction angle θo of the amplifying element being more than π(rad) and less than 2·πr(rad), and load impedance of a fundamental wave being expressed as Z | 08-30-2012 |
20120218045 | CLASS-C POWER AMPLIFIER - According to one embodiment, a class-C power amplifier includes an amplifying element whose power supply voltage is expressed as Vdc and whose maximum current is expressed as Imax, a conduction angle θo of the amplifying element being less than π(rad), and load impedance of a fundamental wave being expressed as Z | 08-30-2012 |
20120218046 | CLASS-AB POWER AMPLIFIER - A class-AB power amplifier according to the present embodiment includes an amplifying element whose power supply voltage is expressed as Vdc and whose maximum current is expressed as Imax, a conduction angle θo of the amplifying element being more than π(rad) and less than 2·π(rad), and load impedance of a fundamental wave being expressed as Z | 08-30-2012 |
20120234592 | PACKAGE AND HIGH FREQUENCY TERMINAL STRUCTURE FOR THE SAME - A package includes: a metal wall disposed on a conductive base plate; a through-hole disposed in input/output portions of the metal wall; a lower layer feed through disposed on the conductive base plate; a wiring pattern disposed on the lower layer feed through; an upper layer feed through disposed on a part of the lower layer feed through and a part of the wiring pattern; and a terminal disposed on the wiring pattern, wherein a width of a part of the lower layer feed through and a width of the upper layer feed through are wider than a width of the through-hole, the lower layer feed through is adhered to a side surface of the metal wall, the upper layer feed through is adhered to the side surface of metal wall, and an air layer is formed between the wiring pattern and an internal wall of the through-hole. | 09-20-2012 |
20120268211 | POWER AMPLIFIER - According to an embodiment, a power amplifier includes: an MMIC substrate; a high frequency probe pad disposed on the MMIC substrate; and a metal plate disposed on the MMIC substrate so as to adjoin to the high frequency probe pad, and connected to an MMIC external circuit via a bonding wire. | 10-25-2012 |
20120273799 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD FOR THE SAME - According to an embodiment, a semiconductor device includes: a conductive base plate; a semiconductor chip bonded on the conductive base plate, a first adhesive agent disposed on a central part of a bonded surface between the semiconductor chip and the conductive base plate; and a second adhesive agent disposed on a peripheral part of the central part of the bonded surface between the semiconductor chip and the conductive base plate. A coefficient of thermal conductivity of the first adhesive agent is relatively higher than that of the second adhesive agent, and a bonding strength of the second adhesive agent is relatively higher than that of the first adhesive agent. | 11-01-2012 |