Patent application number | Description | Published |
20080231254 | SPECTRUM ANALYZER, SPECTRUM ANALYSIS METHOD AND RECORDING MEDIUM - A spectrum analyzer that measures a signal component for every frequency of an input signal includes a local signal generating section generating a local signal having a designated frequency, a multiplying section outputting a synthesized signal obtained by multiplying the local signal with the input signal, a band-pass filter through which a signal component having a prescribed frequency band of the synthesized signal is passed, an A-D conversion section outputting a digital output signal obtained by sampling and digitalizing the passed signal component, a spectrum generation section that passes a signal component within a measured frequency range of the input signal through the band-pass filter and generates a first frequency spectrum based on the digital output signal acquired from the signal component passed through the band-pass filter, and an elimination section generating a frequency spectrum free of noise based on the first frequency spectrum generated by the spectrum generation section. | 09-25-2008 |
20090306917 | SAMPLING APPARATUS AND SAMPLING METHOD - Provided is a sampling apparatus that samples a signal under measurement, including a sample processing section that outputs sample data obtained by sampling the signal under measurement with a sampling timing at non-uniform intervals obtained by thinning a reference clock, a storage section that stores the sample data, and a waveform generating section that generates a waveform of the signal under measurement based on the sample data read from the storage section. The sample processing section includes a sampler that samples the signal under measurement in synchronization with the reference clock and a data thinning section that thins the sample data output by the sampler and outputs this thinned data as sample data with the sampling timing at non-uniform intervals. | 12-10-2009 |
20090306919 | SAMPLING APPARATUS, SAMPLING METHOD AND RECORDING MEDIUM - Provided is a sampling apparatus that samples a signal under measurement, including a sampling section that samples the signal under measurement with a plurality of sampling phases at non-uniform intervals for each sampling repetition cycle; and an inverting section that cancels out a replica that is not an observation target, from among the replicas in a sampling band of the signal under measurement and the replicas in the sampling band of a frequency component of the signal under measurement, by inverting signs of values of the signal under measurement sampled with at least one sampling phase from among the plurality of sampling phases. | 12-10-2009 |
20090306936 | SAMPLING APPARATUS, SAMPLING METHOD AND RECORDING MEDIUM - Provided is a sampling apparatus that samples a signal under measurement, including a clock control section that generates a plurality of sampling clocks at a plurality of sampling phases at determined non-uniform intervals, so as to cancel out replicas in a sampling band that are not observation targets, from among the replicas of the signal under measurement and the replicas of the negative frequency component of the signal under measurement, in each sampling repetition cycle; and a sampling section that samples the signal under measurement with each of the plurality of sampling clocks. | 12-10-2009 |
Patent application number | Description | Published |
20090315183 | LAYER-STACKED WIRING AND SEMICONDUCTOR DEVICE USING THE SAME - A layer-stacked wiring made up of a microcrystalline silicon thin film and a metal thin film is provided which is capable of suppressing an excessive silicide formation reaction between the microcrystalline silicon thin film and metal thin film, thereby preventing peeling of the thin film. In a polycrystalline silicon TFT (Thin Film Transistor) using the layer-stacked wiring, the microcrystalline silicon thin film is so configured that its crystal grains each having a length of the microcrystalline silicon thin film in a direction of a film thickness being 60% or more of a film thickness of the microcrystalline silicon thin film amount to 15% or less of total number of crystal grains or that its crystal grains each having a length of the microcrystalline silicon thin film in a direction of a film thickness being 50% or less of a film thickness of the microcrystalline silicon thin film amount to 85% or more of the total number of crystal grains making up the microcrystalline silicon thin film. | 12-24-2009 |
20090322757 | Generation of pattern data with no overlapping or excessive distance between adjacent dot patterns - A device is disclosed for generating pattern data for unevenness that is randomly arranged on the surface of the reflective substrate of a reflective liquid crystal display device. The number of coordinates, a basic pitch, a movable range, and a dot diameter are entered from a data entry unit. An array generation unit regularly arranges base coordinates in two dimensions in accordance with the basic pitch. Coordinate displacement unit randomly displaces within the movable range at a portion of the basic coordinates to generate a multiplicity of displaced coordinates. Pattern generation unit arranges dot patterns with the dot diameter entered at each of the displaced coordinates generated to generate pattern data. | 12-31-2009 |
20100066964 | LIQUID CRYSTAL DISPLAY AND METHOD OF MANUFACTURING THE SAME AND METHOD OF DRIVING THE SAME - A liquid crystal display having a wide viewing angle and easily manufactured. The liquid crystal display comprises an upper substrate and a lower substrate, and a liquid crystal material disposed between the upper substrate and the lower substrate. The liquid crystal display has a conductive protrusion disposed on the surface of the upper substrate opposing to the lower substrate. The conductive protrusion is disposed over a scanning electrode line or a signal electrode line and has the same potential as that of the upper electrode. As another structure, each of pixel electrodes on the lower substrate has a smaller area than that of a common electrode on the upper substrate and is covered by the common electrode, and each of the pixel electrodes comprises an electrode portion having approximately symmetrical shape. | 03-18-2010 |
20100190276 | METHOD AND APPARATUS FOR IRRADIATING LASER - A laser irradiation process includes: scanning a substrate with laser having a predetermined lasing frequency at different irradiation intensities to form a plurality of first irradiation areas corresponding to the irradiation intensities; illuminating the first irradiation areas to reflected light receive from the first irradiation areas; determining microcrystallization intensity based on the received reflected light; and determining irradiation intensity based on the thus determined microcrystallization intensity. The laser irradiation process uses the irradiation intensity for irradiating a polycrystalline film in a product semiconductor device. | 07-29-2010 |
20110053354 | METHOD OF MANUFACTURING LAYER-STACKED WIRING - A layer-stacked wiring made up of a microcrystalline silicon thin film and a metal thin film is provided which is capable of suppressing an excessive silicide formation reaction between the microcrystalline silicon thin film and metal thin film, thereby preventing peeling of the thin film. In a polycrystalline silicon TFT (Thin Film Transistor) using the layer-stacked wiring, the microcrystalline silicon thin film is so configured that its crystal grains each having a length of the microcrystalline silicon thin film in a direction of a film thickness being 60% or more of a film thickness of the microcrystalline silicon thin film amount to 15% or less of total number of crystal grains or that its crystal grains each having a length of the microcrystalline silicon thin film in a direction of a film thickness being 50% or less of a film thickness of the microcrystalline silicon thin film amount to 85% or more of the total number of crystal grains making up the microcrystalline silicon thin film. | 03-03-2011 |
Patent application number | Description | Published |
20140285156 | Battery-State Monitoring System - A battery-state monitoring system for precisely and efficiently estimating the state and service life of each of a plurality of storage batteries while suppressing variations in voltage between the batteries in a large-scale power-supply system that is provided with the storage batteries charged with power generated by utilizing natural energy is provided. The system includes a power supply control device that detects a current in each storage battery, an end device that measures temperature, voltage, and internal resistance of each battery, the internal resistance being measured by using at least two or more kinds of frequencies, and a prime monitoring device that acquires measurement data from the end device corresponding to each battery and issues an instruction related to an operation to the power supply control device and the end device. The prime monitoring device estimates degradation of each battery based on one or more of temperature, voltage, internal resistance. | 09-25-2014 |
20140306667 | Battery-State Monitoring System - A battery-state monitoring system capable of precisely and efficiently estimating the state and service life of a plurality of storage batteries charged with power generated by utilizing natural energy and constantly connected to an equipment is provided. The system includes a power supply control device that detects a current in each battery, an end device that measures temperature, voltage, and internal resistance of each battery, the internal resistance being measured by using two or more kinds of frequencies, and a prime monitoring device that acquires measurement data from the end device corresponding to each battery and issues an instruction related to an operation to the power supply control device and the end device. The prime monitoring device estimates degradation of each battery based on at least one of temperature, voltage, and internal resistance. | 10-16-2014 |
20140312915 | Battery-State Monitoring System - A battery-state monitoring system capable of efficiently estimating the state and service life of each storage battery at high precision by automatically measuring or acquiring various parameters of a plurality of storage batteries constantly connected to an equipment is provided. The system monitors a state of each of a plurality of batteries connected in series and constituting an assembled battery incorporated in an equipment includes a power supply control device that detects a current flowing through each battery; and an end device that measures a temperature, a voltage, and internal resistance of each battery, the internal resistance being measured by using at least two or more kinds of frequencies, and degradation of each battery is estimated based on one or more temperature, voltage, and internal resistance. | 10-23-2014 |
Patent application number | Description | Published |
20090172309 | Apparatus and method for controlling queue - An apparatus includes a queue element which stores a plurality of memory access requests to be issued to a memory device, the memory access requests including a store request and a load request, and a controller which changes an order of the store and load requests so that the order includes a string of the store requests and a string of the load requests. | 07-02-2009 |
20110216860 | COMMUNICATION METHOD - A communication method is provided to reduce an overhead of inter-processor synchronization for a communication phase in collective communication and to speed up the collective communication. Each of processors in a parallel computer start a previous process before a collective communication phase in which communications are performed at a same time among the processors through a inter-processor network. Each processor executes a synchronization command in advance at a time when a portion of the previous process for a predetermined time t is left. The inter-processor synchronization control section transmits a synchronization completion notice to each processor, if a synchronization condition is met. For the period, each processor executes the previous process in parallel. Then, the plurality of processors enter the collective communication phase. | 09-08-2011 |
20110283041 | CACHE MEMORY AND CONTROL METHOD THEREOF - A cache memory comprises a data array that stores a cashed block; a first address array that stores an address of the cached block; a second address array that stores an address of a first block to be removed from the data array when a cache miss occurs; and a control unit that transmits to a processor the first block stored in the data array as a cache hit block, when the address stored in the second address array results in a cache hit during a period before a second block which has caused the cache miss is read from a memory and written into the data array. | 11-17-2011 |
20120047349 | DATA TRANSFER SYSTEM - A data transfer system includes: a plurality of processors; and a plurality of data transfer units that executes a data transfer from one processor to other processor via a plurality of input ports and a plurality of output ports. The data transfer unit includes: an arbitration unit that executes arbitration of conflicting data sent to a same next destination; and a strength information notification unit that sends strength information indicating a number of conflicts of the arbitrated conflicting data to the next destination. The arbitration unit decides a selection ratio, which is a ratio of selecting each of the input ports and receiving the conflicting data from the selected input port, according to a ratio between the input ports in relation to magnitude of the number of conflicts indicated by the strength information received from each of the input ports. | 02-23-2012 |
20120102271 | CACHE MEMORY SYSTEM AND CACHE MEMORY CONTROL METHOD - The number of ways of address arrays ( | 04-26-2012 |