Patent application number | Description | Published |
20110006998 | PATTERNING OF THIN FILM CONDUCTIVE AND PASSIVATION LAYERS - Simplified patterning of conductive layers and passivation layers of a thin film is disclosed. In some embodiments, the patterning can include depositing a conductive layer onto a thin film substrate, depositing a passivation layer onto the conductive layer, applying a removable mask including a desired pattern to the passivation layer, patterning the passivation layer to have the desired pattern, using the patterned passivation layer as a mask for the conductive layer, and patterning the conductive layer to have the desired pattern. In other embodiments, the patterning can include depositing a conductive layer onto a thin film substrate, depositing a passivation layer onto the conductive layer, depositing a protective layer onto the passivation layer, applying a removable mask including a desired pattern to the protective layer, patterning the protective layer to have the desired pattern, using the patterned protective layer as a mask for the passivation and conductive layers, and patterning the passivation and conductive layers to have the desired pattern. An exemplary device utilizing the thin film so patterned can include a touch sensor panel. | 01-13-2011 |
20110043383 | PATTERNING OF THIN FILM LAYERS - Simplified patterning of layers of a thin film is disclosed. In some embodiments, the patterning can include patterning a first conductive layer using a patterned dielectric layer as a mask and patterning a second conductive layer using a patterned passivation layer as another mask. In other embodiments, the patterning can include patterning a first conductive layer using a removable photosensitive layer as a mask, patterning a black mask layer using a removable photo mask, and patterning a second conductive layer using a patterned passivation layer as another mask. In still other embodiments, the patterning can include patterning a first conductive layer using a patterned black mask layer as a mask and patterning a second conductive layer using a patterned passivation layer as another mask. An exemplary device utilizing the thin film so patterned can include a touch sensor panel. | 02-24-2011 |
20130068505 | PERFORATED MOTHER SHEET FOR PARTIAL EDGE CHEMICAL STRENGTHENING - Methods for chemically strengthening the edges of glass sheets are provided. Voids can be formed in a mother sheet. The edges of these voids may correspond to a portion of the new edges that would normally be created during separation and free shaping of the mother sheet. The mother sheet can then be immersed in a chemical strengthener. The edges of the voids can be chemically strengthened in addition to the front and back sides of the mother sheet. After thin film processing and separation, each of the resulting individual sheets has been chemically strengthened on both sides and on a portion of its edges. | 03-21-2013 |
20130100039 | OPAQUE THIN FILM PASSIVATION - A touch sensitive device that includes a touch sensor having an opaque passivation layer is disclosed. The opaque passivation layer can be made from an organic or inorganic material, such as acrylic. The opaque passivation layer can be positioned in the touch sensitive device between the cover material of the device and conductive traces located on the touch sensor to hide the conductive traces from the user's view and protect the conductive traces from corrosion. Processes for making the touch sensitive devices that include a touch sensor having an opaque passivation layer are also disclosed. | 04-25-2013 |
20130120283 | TOUCH SENSOR PANEL HAVING AN INDEX MATCHING PASSIVATION LAYER - Touch sensor panels typically include a plurality of layers that can be stacked on top of each other. When the touch sensor panel is used in a bright environment, incident light can hit the interfaces between those layers of the stackup having mismatched refractive indices and can reflect off those interfaces. The light reflected from those interfaces can give rise to the appearance of fringes on the touch sensor panel, which can be visually distracting. In order to reduce the appearance of these fringes, embodiments of the disclosure are directed to the addition of an index matching passivation layer between a conductive layer of traces and an adhesive layer in the touch sensor panel stackup. | 05-16-2013 |
20130194759 | TOUCH SENSOR WITH INTEGRATED SIGNAL BUS EXTENSIONS - A touch sensor may be formed from a flexible substrate such as a sheet of polymer. The flexible substrate may have a main rectangular portion and a protruding portion. Capacitive touch sensor electrodes may be formed on the upper and lower surfaces of the flexible substrate. Signal lines may be coupled to the touch sensor electrodes. The ends of the signal lines may extend onto the protruding portion. Signal lines may be formed on upper and lower surfaces of the flexible substrate. The signal lines may be coupled to circuitry on a printed circuit using a connector that receives the end of the protruding portion. Ground structures on the protruding portion may be configured to overlap the signal lines or may be laterally interposed between upper surface signal lines and lower surface signal lines. | 08-01-2013 |
20130228442 | PARTIAL LASER ABLATION SENSOR PROCESS - Processes for fabricating compact touch sensors for touch sensitive devices are disclosed. A process can include providing a touch sensor structure having a substrate, a first layer disposed on the substrate, and a second layer disposed on the first layer. The second layer can have an ablation fluence value that is lower than an ablation fluence value of the first layer. The process can include patterning the second layer with a laser emitting energy having a fluence value greater than or equal to the ablation fluence value of the second layer and less than the ablation fluence value of the first layer. The process can further include etching at least a portion of the first layer that was exposed during the patterning of the second layer. At least a portion of the second layer can then be removed by etching or laser ablation. | 09-05-2013 |
20140049500 | Display With Bent Inactive Edge Regions - An electronic device may be provided with a display having substrate layers such as a glass color filter layer substrate and a glass thin-film-transistor layer substrate. Display layers such as first and second layers of polymer, a liquid crystal layer interposed between the layers of polymer, color filter elements, and thin-film-transistor circuitry may be formed between the color filter layer substrate and the thin-film-transistor layer substrate. Flexible inactive portions of the display layers may protrude outward from between the color filter layer substrate and the thin-film-transistor substrate. Touch sensor circuitry may be formed from a flexible polymer substrate. The touch sensor circuitry may include conductive touch sensor lines and capacitive electrodes. Each conductive line may be coupled to only a single end of a respective one of the capacitive electrodes. | 02-20-2014 |
20140065321 | PULL-BACK DESIGN TO MITIGATE PLASTIC SENSOR CRACKS - The described embodiments relate generally to the singulation of circuits and more particularly to a method of cutting of a polymer substrate that is overlaid with a conductive element and a passivation layer. In one embodiment, the passivation layer is applied selectively to the polymer substrate in an area covering the conductive element and extending at least a first distance past an outer edge of the conductive element. Then, a cutting operation is performed along a cutting path located a second distance from an outer edge of the passivation layer. The second distance is a minimum distance between the edge of the passivation layer and the cutting path that prevents a load applied at the second distance from causing a stress crack in the passivation layer. | 03-06-2014 |
20140069244 | ALLEVIATING EFFECTS OF PLASTIC FILM DISTORTION IN TOUCH SENSORS - Systems and processes for die-cutting stretched base films are disclosed. In some examples, the systems can include fixed or adjustable die-cut heads that are offset from one another based on an amount of distortion of the base film. Systems and processes for reducing the amount of distortion or shrinking of base films are also disclosed. In some examples, the processes can include pre-shrinking the base film by exposing the film to elevated temperatures sufficient to shrink the film. The pre-shrinking can be performed on the base film material alone, or can be applied during subsequent annealing stages. The pre-shrinking can be used alone or in combination with the offset die-cutters. | 03-13-2014 |
20140069568 | REDUCED CONTACT ROLL-TO-ROLL PROCESSING - Processes for reducing physical contact to sheets of base film in roll-to-roll processing of touch sensors are disclosed. In one example, the process includes the use of rollers having rings circumferentially extending away from the roller and operable to contact the sheets of base film. The rings can be configured to contact portions of the sheet of base film away from touch sensor areas of the base film. The rings can further be configured to prevent the sheets of base film from contacting a shaft of the rollers. In another example, a reduced strength vacuum seal can be formed between a photo mask and the sheet of base film to reduce the amount of force applied to a passivation layer of the sheet of base film. | 03-13-2014 |
20140069785 | CORROSION MITIGATION FOR METAL TRACES - Processes for manufacturing touch sensors with one or more guard traces to reduce the effect of moisture damage are provided. One example process can include forming one or more guard traces between an edge of the touch sensor and the metal traces that route the drive and sense lines to bond pads. The one or more guard traces can be uncoupled from the drive lines and sense lines to protect the inner metal traces from moisture damage. In some examples, ends of the one or more guard traces can be coupled to ground by copper. In other examples, ends of the one or more guard traces can be coupled to ground by indium tin oxide or the one or more guard traces can be coupled to ground by a strip of indium tin oxide. In yet other examples, the guard trace can be floating (e.g., not coupled to ground). | 03-13-2014 |
20140070824 | SHORTING STRUCTURE IN PLASTIC ROLL-TO-ROLL PROCESS - Roll-to-roll processes for manufacturing touch sensors on a plastic base film are provided. The touch sensors can be deposited on the base film using various patterning techniques. One or more shorting bars can also be patterned onto the base film to couple together traces, such as drive lines, sense lines, conductive traces, and the like, of the touch sensor to prevent a potential difference from forming between traces due to static buildup during the manufacturing process. After the touch sensor is fully formed on the base film, the touch sensor can be removed from the base film using lithography or a physical cutting process. The removal process can separate the touch sensor from the one or more shorting bars, thereby uncoupling the traces of the touch sensor. | 03-13-2014 |
20140175049 | PRE-PATTERNED FILM-BASED RESIST - Roll-to-roll processes for manufacturing touch sensors using a sheet of patterned photoresist film are disclosed. The photoresist film can include a sheet of photoresist material, such as DFR, that has been patterned by removing portions of the photoresist film using a die or laser cutting technique. In some examples, the photoresist film can be patterned such that the patterned photoresist film can be laminated to a base film and used as an etching mask or a photoresist layer in a roll-to-roll manufacturing process. In this way, the patterned photoresist film can be used in place of conventional photoresist films in roll-to-roll processes, thereby obviating the need for subsequent exposure and development operations that would otherwise be performed when using conventional photoresist films. As a result, the chance that a defect is introduced into the touch sensors is reduced by reducing the number of operations performed in the roll-to-roll process. | 06-26-2014 |
20140347574 | METHOD OF PLASTIC TOUCH SENSOR PROCESS - Methods of fabrication of a touch sensor panel using laser ablation are provided. The fabricated touch sensor panel can have touch sensors disposed on a surface of a substrate. A fabrication method can include depositing a first conductive layer onto a substrate in a touch sensor region and a border region, depositing a second conductive layer onto the first conductive layer in the border region, and ablating the second conductive layer at removal locations in the border region to define border traces for providing off-panel connections to touch sensors in the touch sensor region. This fabrication method can advantageously provide touch sensors in a fabrication process with high throughput using low cost material and equipment. | 11-27-2014 |
20150077383 | MULTIPLE BRIDGES SINGLE SIDED TOUCH SENSOR - A touch sensor panel can include a plurality of drive lines crossing a plurality of sense lines, forming an array. The plurality of drives lines and the plurality of sense lines can be formed by interconnecting sections of at least one conductive material with a plurality of bridges. The geometry and size of one or more of the plurality of bridges and the arrangement of the sections can be altered to reduce the overall resistance of a section, improve optical uniformity, and/or increase conductance. Additionally, the sensitivity to and differentiation between touch, hover, or proximity can be enhanced based on the number of bridges and the number of hot spots. | 03-19-2015 |
20150077646 | Touch Sensitive Display With Graded Index Layer - An electronic device may have a touch screen display or other input-output device that includes transparent conductive electrodes. The transparent conductive electrodes may be formed from a material that has a relatively high index of refraction such as indium tin oxide. Surrounding layers of the touch screen display such as a touch sensor substrate and an underlying display layer may have lower index of refraction values. To prevent abrupt index-of-refraction discontinuities that lead to unwanted reflections and visible artifacts on the display, the transparent conductive electrodes may be embedded within a dielectric layer. The dielectric layer may have a graded index of refraction. The graded index of refraction may be varied continuously or in a stepwise fashion by adjusting the composition of materials that are incorporated into the dielectric layer as a function of position within the layer. | 03-19-2015 |
20150116255 | DOUBLE SIDED TOUCH SENSOR ON TRANSPARENT SUBSTRATE - Compact touch sensors for touch sensitive devices and processes for forming the touch sensors are disclosed. The touch sensor structure can include a substrate, one or more underlying layers disposed on the substrate, one or more blocking layers disposed on the substrate or on one or more underlying layers, and one or more patterned layers disposed on the underlying layers or blocking layers. The one or more blocking layers can be configured to block underlying layers from exposure to certain wavelengths of light or from penetration of a laser beam that can cause damage. Additionally, the one or more underlying layers can be multi-functional, including the ability to block one or more light sources. | 04-30-2015 |
20150212609 | LIGHT BLOCK FOR TRANSPARENT TOUCH SENSORS - A touch sensor panel including one or more conductive sections disposed in an outer area of a touch sensor panel is disclosed. The touch sensor panel stackup can include a substrate, one or more underlying layers, one or more patterned transparent conductive layers, and one or more conductive sections. In some examples, the stackup can include one or more passivation layers. The one or more underlying layers, patterned transparent conductive layers, one or more conductive sections, and passivation layers can be deposited on the same side of the substrate, on different sides of the substrate, or on different substrates. The one or more conductive sections can block unwanted light from penetrating to one or more layers of the touch sensor stackup and preventing changes to the properties of the one or more layers of the stackup. | 07-30-2015 |
20150212614 | INTEGRATED POLARIZER AND CONDUCTIVE MATERIAL - A polarizer integrated with conductive material and a process for forming a polarizer integrated with conductive material are disclosed. A polarizer can be integrated with conductive material to form a portion of a touch sensor panel. In one example, a layer of conductive film forming either the row or column traces can be patterned on a surface of a substrate in the polarizer. In another example, the layer of conductive film can be patterned on a viewing angle compensation film of the polarizer. One or more of the polarizer's polarizing layer, protective substrates or viewing angle compensation film can act as a dielectric between the conductive material forming the rows and column traces in the stack-up. As a result, the clear polymer spacer acting as a dielectric in touch panels can be removed, reducing the thickness of the touch screen stack-up. | 07-30-2015 |
20150220183 | TOUCH SENSITIVE MODULE WITH INTEGRATED SENSOR AND ARTWORK - A touch sensor panel including artwork formed on the touch sensor panel is disclosed. The touch sensor panel stackup can include a substrate, one or more underlying layers, one or more patterned transparent conductive layers, a passivation layer, artwork, and an adhesive layer. The artwork on the touch sensor panel can be formed by aligning to the touch sensor pattern or alignment marks. In some examples, the artwork can be formed on a discrete touch sensor panel, and the discrete touch sensor panel can be bonded to a cover glass or cover material. In some examples, the touch sensor panel can be a Dual-sided Indium Tin Oxide (DITO) stackup. In some examples, the drive lines and the sense lines of the touch sensor panel can be formed on separate substrates, and the substrates can be bonded together using an adhesive. | 08-06-2015 |
20150316689 | TOUCH SENSOR PANEL HAVING AN INDEX MATCHING PASSIVATION LAYER - Touch sensor panels typically include a plurality of layers that can be stacked on top of each other. When the touch sensor panel is used in a bright environment, incident light can hit the interfaces between those layers of the stackup having mismatched refractive indices and can reflect off those interfaces. The light reflected from those interfaces can give rise to the appearance of fringes on the touch sensor panel, which can be visually distracting. In order to reduce the appearance of these fringes, embodiments of the disclosure are directed to the addition of an index matching passivation layer between a conductive layer of traces and an adhesive layer in the touch sensor panel stackup. | 11-05-2015 |
20150317013 | TOUCH SENSOR WITH INTEGRATED SIGNAL BUS EXTENSIONS - A touch sensor may be formed from a flexible substrate such as a sheet of polymer. The flexible substrate may have a main rectangular portion and a protruding portion. Capacitive touch sensor electrodes may be formed on the upper and lower surfaces of the flexible substrate. Signal lines may be coupled to the touch sensor electrodes. The ends of the signal lines may extend onto the protruding portion. Signal lines may be formed on upper and lower surfaces of the flexible substrate. The signal lines may be coupled to circuitry on a printed circuit using a connector that receives the end of the protruding portion. Ground structures on the protruding portion may be configured to overlap the signal lines or may be laterally interposed between upper surface signal lines and lower surface signal lines. | 11-05-2015 |
20150345007 | COMBINATION VAPOR DEPOSITION CHAMBER - This application relates to a combination vapor deposition process chamber. In, some embodiments, a combination vapor deposition process chamber can be used to apply an optical coating to a substrate such as glass, as well as an anti-smudge coating to the same substrate. The combination vapor deposition process chamber can include a sputter target, reactive gas and plasma source, and an anti-smudge coating source. Both sputter deposition and evaporation deposition can be performed with the combination vapor deposition process chamber without exposing the substrate to open air and contaminants between deposition processes. In some embodiments, the combination vapor deposition process chamber uses multiple sub-process chambers connected by a low pressure passageway for transferring substrates between deposition processes. | 12-03-2015 |
20160068948 | DEFECT REDUCTION IN META-MODE SPUTTER COATINGS - Sputter deposition systems and methods for depositing film coatings on one or more substrates are disclosed. The systems and methods are used to prevent or reduce an amount of defects within a deposited film. The methods involve removing defect-related particles that are formed during a deposition process from certain regions of the sputter deposition system and preventing the defect-related particles from detrimentally affecting the quality of the deposited film. In particular embodiments, methods involve creating a flow of gas from a deposition region to a particle collection region the sputter deposition system such that the defect-related particles are entrained within the flow of gas and away from the deposition region. In particular embodiments, the sputter deposition system is a meta-mode sputter deposition system. | 03-10-2016 |
20160085342 | CORROSION MITIGATION FOR METAL TRACES - Processes for manufacturing touch sensors with one or more guard traces to reduce the effect of moisture damage are provided. One example process can include forming one or more guard traces between an edge of the touch sensor and the metal traces that route the drive and sense lines to bond pads. The one or more guard traces can be uncoupled from the drive lines and sense lines to protect the inner metal traces from moisture damage. In some examples, ends of the one or more guard traces can be coupled to ground by copper. In other examples, ends of the one or more guard traces can be coupled to ground by indium tin oxide or the one or more guard traces can be coupled to ground by a strip of indium tin oxide. In yet other examples, the guard trace can be floating (e.g., not coupled to ground). | 03-24-2016 |
20160117009 | OPAQUE THIN FILM PASSIVATION - A touch sensitive device that includes a touch sensor having an opaque passivation layer is disclosed. The opaque passivation layer can be made from an organic or inorganic material, such as acrylic. The opaque passivation layer can be positioned in the touch sensitive device between the cover material of the device and conductive traces located on the touch sensor to hide the conductive traces from the user's view and protect the conductive traces from corrosion. Processes for making the touch sensitive devices that include a touch sensor having an opaque passivation layer are also disclosed. | 04-28-2016 |
Patent application number | Description | Published |
20090133254 | Components with posts and pads - A packaged microelectronic element includes connection component incorporating a dielectric layer ( | 05-28-2009 |
20100001410 | FLIP CHIP OVERMOLD PACKAGE - An integrated circuit (IC) package having a packaging substrate, an IC disposed onto the packaging substrate, and a rigid support member attached to the substrate layer through an adhesive spacer is provided. The packaging substrate includes multiple decoupling capacitors positioned thereon around the IC. A heat sink is placed over the IC. The rigid support member provides enhanced structural support for the IC packaging and there is ample space between a bottom surface of the rigid support member and the packaging substrate to allow the placement of the decoupling capacitors underneath the rigid support member. | 01-07-2010 |
20100193970 | MICRO PIN GRID ARRAY WITH PIN MOTION ISOLATION - A microelectronic package includes a microelectronic element having faces and contacts, a flexible substrate overlying and spaced from a first face of the microelectronic element, and a plurality of conductive terminals exposed at a surface of the flexible substrate. The conductive terminals are electrically interconnected with the microelectronic element and the flexible substrate includes a gap extending at least partially around at least one of the conductive terminals. In certain embodiments, the package includes a support layer, such as a compliant layer, disposed between the first face of the microelectronic element and the flexible substrate. In other embodiments, the support layer includes at least one opening that is at least partially aligned with one of the conductive terminals. | 08-05-2010 |
20100232129 | MICROELECTRONIC PACKAGES AND METHODS THEREFOR - A method of making a microelectronic assembly includes providing a microelectronic package having a substrate, a microelectronic element overlying the substrate and at least two conductive elements projecting from a surface of the substrate, the at least two conductive elements having surfaces remote from the surface of the substrate. The method includes compressing the at least two conductive elements so that the remote surfaces thereof lie in a common plane, and after the compressing step, providing an encapsulant material around the at least two conductive elements for supporting the microelectronic package and so that the remote surfaces of the at least two conductive elements remain accessible at an exterior surface of the encapsulant material. | 09-16-2010 |
20100258956 | MICROELECTRONIC PACKAGES AND METHODS THEREFOR - A microelectronic package includes a microelectronic element having faces and contacts, the microelectronic element having an outer perimeter, and a substrate overlying and spaced from a first face of the microelectronic element, whereby an outer region of the substrate extends beyond the outer perimeter of the microelectronic element. The microelectronic package includes a plurality of etched conductive posts exposed at a surface of the substrate and being electrically interconnected with the microelectronic element, whereby at least one of the etched conductive posts is disposed in the outer region of the substrate. The package includes an encapsulating mold material in contact with the microelectronic element and overlying the outer region of the substrate, the encapsulating mold material extending outside of the etched conductive posts for defining an outermost edge of the microelectronic package. | 10-14-2010 |
20110165733 | MICROELECTRONIC PACKAGES AND METHODS THEREFOR - A method of making a microelectronic assembly can include molding a dielectric material around at least two conductive elements which project above a height of a substrate having a microelectronic element mounted thereon, so that remote surfaces of the conductive elements remain accessible and exposed within openings extending from an exterior surface of the molded dielectric material. The remote surfaces can be disposed at heights from said surface of said substrate which are lower or higher than a height of the exterior surface of the molded dielectric material from the substrate surface. The conductive elements can be arranged to simultaneously carry first and second different electric potentials: e.g., power, ground or signal potentials. | 07-07-2011 |
20110204476 | Electronic Package with Fluid Flow Barriers - The present invention is directed to a method and electronic computer package that is formed by placing an integrated circuit, having a plurality of bonding pads with solder bumps deposited thereon, in contact with the substrate so that one of the plurality of solder bumps is in superimposition with respect to one of the contacts and one of the plurality of bonding pads, with a volume being defined between region of the substrate in superimposition with the integrated circuit. A portion of the volume is filled with a quantity of underfill. A fluid flow bather is formed on the substrate and defines a perimeter of the volume, defining a flow restricted region. The fluid flow barrier has dimensions sufficient to control the quantity of underfill egressing from the flow restricted region. | 08-25-2011 |
20110260320 | METHOD OF MAKING A CONNECTION COMPONENT WITH POSTS AND PADS - A packaged microelectronic element includes connection component incorporating a dielectric layer ( | 10-27-2011 |
20110269272 | MICROELECTRONIC PACKAGES AND METHODS THEREFOR - A microelectronic package includes a microelectronic element having faces and contacts, the microelectronic element having an outer perimeter, and a substrate overlying and spaced from a first face of the microelectronic element, whereby an outer region of the substrate extends beyond the outer perimeter of the microelectronic element. The microelectronic package includes a plurality of etched conductive posts exposed at a surface of the substrate and being electrically interconnected with the microelectronic element, whereby at least one of the etched conductive posts is disposed in the outer region of the substrate. The package includes an encapsulating mold material in contact with the microelectronic element and overlying the outer region of the substrate, the encapsulating mold material extending outside of the etched conductive posts for defining an outermost edge of the microelectronic package. | 11-03-2011 |
20120126407 | WAFER LEVEL CHIP PACKAGE AND A METHOD OF FABRICATING THEREOF - Wafer level chip packages including risers having sloped sidewalls and methods of fabricating such chip packages are disclosed. The inventive wafer level chip packages may advantageously be used in various microelectronic assemblies. | 05-24-2012 |
20120155055 | SEMICONDUCTOR CHIP ASSEMBLY AND METHOD FOR MAKING SAME - A microelectronic assembly may include a substrate including a rigid dielectric layer having electrically conductive elements, a microelectronic element having a plurality of contacts exposed at a face thereof, and conductive vias extending through a compliant dielectric layer overlying the rigid dielectric layer. The vias electrically connect the substrate contacts respectively to the conductive elements, and the substrate contacts are joined respectively to the contacts of the microelectronic element. The vias, compliant layer and substrate contacts are adapted to appreciably relieve stress at the substrate contacts associated with differential thermal contact and expansion of the assembly. | 06-21-2012 |
20120268899 | REINFORCED FAN-OUT WAFER-LEVEL PACKAGE - A microelectronic package includes a microelectronic element including a first surface having contacts thereon, a second surface remote therefrom, and edge surfaces extending between the first and second surfaces. A reinforcing layer adheres to the at least one edge surface and extends in a direction away therefrom, the reinforcing layer not extending along the first surface of the microelectronic element. A conductive redistribution layer including a plurality of conductive elements extends from the contacts along the first surface and along a surface of the reinforcing layer beyond the at least one edge surface. An encapsulant overlies at least the reinforcing layer. The microelectronic element has a first coefficient of thermal expansion, the encapsulant has a second coefficient of thermal expansion, and the reinforcing layer has a third coefficient of thermal expansion that is between the first and second coefficients of thermal expansion. | 10-25-2012 |
20120280386 | PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE - A microelectronic assembly includes a substrate having a first surface and a second surface remote from the first surface. A microelectronic element overlies the first surface and first electrically conductive elements are exposed at one of the first surface and the second surface. Some of the first conductive elements are electrically connected to the microelectronic element. Wire bonds have bases joined to the conductive elements and end surfaces remote from the substrate and the bases, each wire bond defining an edge surface extending between the base and the end surface. An encapsulation layer extends from the first surface and fills spaces between the wire bonds such that the wire bonds are separated by the encapsulation layer. Unencapsulated portions of the wire bonds are defined by at least portions of the end surfaces of the wire bonds that are uncovered by the encapsulation layer. | 11-08-2012 |
20130203216 | PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE - A method of making a microelectronic package includes forming a dielectric encapsulation layer on an in-process unit having a substrate having a first surface and a second surface remote therefrom. A microelectronic element is mounted to the first surface of the substrate, and a plurality of conductive elements exposed at the first surface, at least some of which are electrically connected to the microelectronic element. Wire bonds have bases joined to the conductive elements and end surfaces remote from the bases and define an edge surface extending away between the base and the end surface. The encapsulation layer is formed to at least partially cover the first surface and portions of the wire bonds with unencapsulated portions of the wire bonds being defined by at least one of the end surface or a portion of the edge surface that is uncovered thereby. | 08-08-2013 |
20140145329 | FINE PITCH MICROCONTACTS AND METHOD FOR FORMING THEREOF - A method includes applying a final etch-resistant material to an in-process substrate so that the final etch-resistant material at least partially covers first microcontact portions integral with the substrate and projecting upwardly from a surface of the substrate, and etching the surface of the substrate so as to leave second microcontact portions below the first microcontact portions and integral therewith, the final etch-resistant material at least partially protecting the first microcontact portions from etching during the further etching step. A microelectronic unit includes a substrate, and a plurality of microcontacts projecting in a vertical direction from the substrate, each microcontact including a base region adjacent the substrate and a tip region remote from the substrate, each microcontact having a horizontal dimension which is a first function of vertical location in the base region and which is a second function of vertical location in the tip region. | 05-29-2014 |
20140213021 | MICROELECTRONIC PACKAGES AND METHODS THEREFOR - A method of making a microelectronic assembly can include molding a dielectric material around at least two conductive elements which project above a height of a substrate having a microelectronic element mounted thereon, so that remote surfaces of the conductive elements remain accessible and exposed within openings extending from an exterior surface of the molded dielectric material. The remote surfaces can be disposed at heights from said surface of said substrate which are lower or higher than a height of the exterior surface of the molded dielectric material from the substrate surface. The conductive elements can be arranged to simultaneously carry first and second different electric potentials: e.g., power, ground or signal potentials. | 07-31-2014 |
20150091118 | PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE - A method of making a microelectronic package includes forming a dielectric encapsulation layer on an in-process unit having a substrate having a first surface and a second surface remote therefrom. A microelectronic element is mounted to the first surface of the substrate, and a plurality of conductive elements exposed at the first surface, at least some of which are electrically connected to the microelectronic element. Wire bonds have bases joined to the conductive elements and end surfaces remote from the bases and define an edge surface extending away between the base and the end surface. The encapsulation layer is formed to at least partially cover the first surface and portions of the wire bonds with unencapsulated portions of the wire bonds being defined by at least one of the end surface or a portion of the edge surface that is uncovered thereby. | 04-02-2015 |
20160005711 | SEMICONDUCTOR CHIP ASSEMBLY AND METHOD FOR MAKING SAME - A microelectronic assembly may include a substrate including a rigid dielectric layer having electrically conductive elements, a microelectronic element having a plurality of contacts exposed at a face thereof, and conductive vias extending through a compliant dielectric layer overlying the rigid dielectric layer. The vias electrically connect the substrate contacts respectively to the conductive elements, and the substrate contacts are joined respectively to the contacts of the microelectronic element. The vias, compliant layer and substrate contacts are adapted to appreciably relieve stress at the substrate contacts associated with differential thermal contact and expansion of the assembly. | 01-07-2016 |
20160056058 | MICROELECTRONIC PACKAGES AND METHODS THEREFOR - A method of making a microelectronic assembly can include molding a dielectric material around at least two conductive elements which project above a height of a substrate having a microelectronic element mounted thereon, so that remote surfaces of the conductive elements remain accessible and exposed within openings extending from an exterior surface of the molded dielectric material. The remote surfaces can be disposed at heights from said surface of said substrate which are lower or higher than a height of the exterior surface of the molded dielectric material from the substrate surface. The conductive elements can be arranged to simultaneously carry first and second different electric potentials: e.g., power, ground or signal potentials. | 02-25-2016 |