June-Hee
June-Hee Lee, Seoul KR
Patent application number | Description | Published |
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20080315188 | Apparatus and method for depositing thin film - In a thin film depositing apparatus, a first reaction gas, a second reaction gas, and a non-volatile gas are supplied to a reaction chamber in order to form a protective layer, in which an organic layer and an inorganic layer are alternately stacked, on a process substrate. The first reaction gas is supplied to the reaction chamber only while the inorganic layer is formed on the process substrate, and the second reaction gas and the non-volatile gas are supplied to the reaction chamber through while the inorganic and organic layers are formed on the process substrate. Thus, the discontinuous surfaces may be prevented from being formed between the organic layer and the inorganic layer, thereby preventing the peeling of the organic and inorganic layers and increasing light transmittance. | 12-25-2008 |
20140374840 | SEMICONDUCTOR DEVICES USING MOS TRANSISTORS WITH NONUNIFORM GATE ELECTRODE STRUCTURES AND METHODS OF FABRICATING THE SAME - A semiconductor device includes a substrate and first and second gate electrodes on the substrate. The first gate electrode includes a first gate insulation film having a bottom portion on the substrate and sidewall portions extending from the bottom portion and away from the substrate defining a first trench having a first width and a first functional film filling the first trench. The second gate electrode includes a second gate insulation film having a bottom portion on the substrate and sidewall portions extending from the bottom portion defining a second trench having a second width different from the first width, a second functional film conforming to the second gate insulation film in the second trench and defining a third trench, and a metal region in the third trench. The first width may be less than the second width. | 12-25-2014 |
June-Hee Lee, Hwaseong-Si KR
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20120329262 | METHODS FOR MANUFACTURING SEMICONDUCTOR DEVICES USING ETCH STOP DIELECTRIC LAYERS AND RELATED DEVICES - A method for manufacturing a semiconductor may include providing a substrate having first and second regions defined therein, forming an interlayer dielectric layer including first and second trenches formed in the first and second regions, respectively, and conformally forming a gate dielectric layer along a top surface of the interlayer dielectric layer, side and bottom surfaces of the first trench and side, and bottom surfaces of the second trench. An etch stop dielectric layer may be formed on the gate dielectric layer, a first metal layer may be formed to fill the first and second trenches, and the first metal layer in the first region may be removed using the etch stop dielectric layer as an etch stopper. | 12-27-2012 |
20140203335 | Semiconductor Devices and Methods for Fabricating the Same - A semiconductor device includes an insulating film on a substrate and including a trench, a gate insulating film in the trench, a DIT (Density of Interface Trap) improvement film on the gate insulating film to improve a DIT of the substrate, and a first conductivity type work function adjustment film on the DIT improvement film. Related methods of forming semiconductor devices are also disclosed. | 07-24-2014 |
20140246726 | METHODS FOR MANUFACTURING SEMICONDUCTOR DEVICES USING ETCH STOP DIELECTRIC LAYERS AND RELATED DEVICES - A method for manufacturing a semiconductor may include providing a substrate having first and second regions defined therein, forming an interlayer dielectric layer including first and second trenches formed in the first and second regions, respectively, and conformally forming a gate dielectric layer along a top surface of the interlayer dielectric layer, side and bottom surfaces of the first trench and side, and bottom surfaces of the second trench. An etch stop dielectric layer may be formed on the gate dielectric layer, a first metal layer may be formed to fill the first and second trenches, and the first metal layer in the first region may be removed using the etch stop dielectric layer as an etch stopper. | 09-04-2014 |
20150252470 | METHOD FOR OPERATING SEMICONDUCTOR MANUFACTURING EQUIPMENT - A method for operating semiconductor manufacturing equipment is provided. The method includes forming a conductive thin film on an inner side surface of a reaction chamber and on a substrate in the reaction chamber, the conductive thin film including a first conductive material, and forming a particle preventive layer on the inner side surface of the reaction chamber in which the conductive thin film is formed. | 09-10-2015 |
June-Hee Lee, Suwon-Si KR
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20130155265 | IMAGE PICKUP APPARATUS, METHOD OF PERFORMING IMAGE COMPENSATION, AND COMPUTER READABLE RECORDING MEDIUM - An image pickup apparatus includes an image pickup unit to continuously pick up a plurality of images having mutual displacement using an image pickup device, a storage unit to store a position of a defect area of the image pickup device, and an image compensation unit to compensate for the defect area in one of the plurality of picked images using the other picked image. | 06-20-2013 |
June-Hee Lee, Yongin-Si KR
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20160041578 | CLOCK SWITCH DEVICE AND SYSTEM-ON-CHIP HAVING THE SAME - A clock switch device includes a controller and a switching circuit. The controller sets a clock switch period using a control signal when a logic level of a mode signal is changed. The switching circuit receives a first clock signal, a second clock signal and an auxiliary clock signal. The switching circuit, based on the control signal, outputs one clock signal between the first clock signal and the second clock signal as a glitch free clock signal before the clock switch period, stops outputting the one clock signal and outputs the auxiliary clock signal as the glitch free clock signal during the clock switch period, and stops outputting the auxiliary clock signal and outputs another clock signal between the first clock signal and the second clock signal as the glitch free clock signal after the clock switch period. | 02-11-2016 |
June-Hee Lim, Seoul KR
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20090152647 | FIELD-EFFECT TRANSISTOR INCLUDING LOCALIZED HALO ION REGIONS, AND SEMICONDUCTOR MEMORY, MEMORY CARD, AND SYSTEM INCLUDING THE SAME - A field-effect transistor including localized halo ion regions that can optimize HEIP characteristics and GIDL characteristics. The field-effect transistor includes a substrate, an active region, a gate structure, and halo ion regions. The active region includes source/drain regions and a channel region formed at a partial region in the substrate. The gate structure electrically contacts the active region. The halo ion regions are locally formed adjacent to both end portions of the source/drain regions in the substrate. | 06-18-2009 |