Patent application number | Description | Published |
20080278125 | APPARATUS FOR OPTIMIZING DIODE CONDUCTION TIME DURING A DEADTIME INTERVAL - Deadtime optimization techniques and circuits are provided which implement closed loop feedback to reduce a duration of a deadtime interval by reducing a diode conduction time (DCT) to an optimized or minimized value. Information regarding DCT is fed back to continuously adjust the relative delay between a first driver path which drives a first transistor and a second driver path which drives a second transistor. For instance, information regarding DCT can be measured and stored, and then used to generate a control signal which continuously adjusts (e.g., increases or decreases) a variable delay associated with a delay element in one of the driver paths of one of the transistors. The delay is adjusted to a value which drives the DCT towards an optimum value. By continuously changing the relative delay between the first driver path and the second driver path, the DCT can be driven to an optimum value | 11-13-2008 |
20090079404 | SINGLE-INDUCTOR MULTIPLE-OUTPUT DC/DC CONVERTER METHOD - A method of configuring a DC/DC converter having a plurality of outputs for providing a regulated voltage to each output electrically coupled to an error amplifier of a plurality of error amplifiers and an inductor includes configuring a plurality of controllable switches coupled to the plurality of error amplifiers to operate using a plurality of duty cycles according to D | 03-26-2009 |
20090157929 | DATA ARBITRATION ON A BUS TO DETERMINE AN EXTREME VALUE - A system includes a master device and a plurality of slave devices. The master device initiates a bus transaction having an arbitration data field for processing by a subset of the slave devices. Each slave device of the subset arbitrates a corresponding data value for the arbitration data field via the multiple-access bus such that an extreme data value of the data values of the slave devices of the subset is transmitted via the multiple-access bus for the arbitration data field. The slave device can arbitrate its data value by providing the data value for serial transmission via a data line of the multiple-access bus and monitoring the data line. In response to determining that a bit value of the data value being provided does not match the state of the data line, the slave device terminates provision of the data value, thereby ceasing arbitration of its data value. | 06-18-2009 |
20090251117 | POWER CONVERTER WITH IMPROVED EFFICIENCY - A power converter ( | 10-08-2009 |
20100079126 | DUAL-LOOP DC-TO-DC CONVERTER APPARATUS - A dual loop DC-to-DC converter is provided that includes a first control loop that maintains a DC output voltage (V | 04-01-2010 |
20100102852 | CIRCUITS AND METHODS FOR BUFFERING AND COMMUNICATING DATA SIGNALS - Method and apparatus are provided for buffering a data signal to a low voltage logic device. A circuit for buffering the data signal to the low voltage logic device includes an output buffer and an N-type transistor. The output buffer has an input and an output, where the input is configured to receive the data signal. The output buffer is configured to produce an output signal based on the data signal, and the output signal has a maximum potential. The N-type transistor has a source coupled to the output, a drain configured to couple to the low voltage logic device, and a gate configured to receive a bias potential, where the bias potential is greater than the maximum potential. | 04-29-2010 |
20100164551 | SAMPLE-AND-HOLD (S/H) CIRCUIT - A sample-and-hold circuit ( | 07-01-2010 |
20100271078 | CIRCUITRY IN A DRIVER CIRCUIT - A driver circuit includes a first and a second voltage rail, a first pre-driver circuit, a power transistor, comparison circuitry which indicates when a voltage level of the first voltage rails is above or below a reference voltage level, a level shift circuit coupled between the first voltage rail and the second voltage rail which provides a level shifted output, a tapered buffer circuit coupled to the first voltage rail and to a first circuit node, wherein the tapered buffer circuit receives the level shifted output and provides a buffered output to a control electrode of the first pre-driver transistor, and a rail voltage adjusting circuit coupled between the first circuit node and the second voltage rail, which, in response to the comparison circuitry indicating that the voltage level of the first voltage rail is above the reference voltage level, adjusts a voltage level of the second voltage rail. | 10-28-2010 |
20110183636 | RADIO FREQUENCY TRANSMITTER HAVING AN AMPLIFIER WITH POWER SUPPLY MODULATION - A circuit including a carrier amplifier having an input, an output, a first transistor coupled to a first power supply voltage terminal for receiving a modulated power supply voltage, and a second transistor coupled to a second power supply voltage terminal for receiving a fixed power supply voltage is provided. The circuit further includes a peaking amplifier having an input coupled to the input of the carrier amplifier and an output coupled to the output of the carrier amplifier. | 07-28-2011 |
20110210772 | DELTA PHI GENERATOR WITH START-UP CIRCUIT - A circuit comprises a delta phi generator, a startup circuit, and a level detector. The delta phi generator has a desirable operating state for developing a delta phi voltage at an output node in response to an input voltage, and an undesirable operating state. The startup circuit is coupled to the delta phi generator. The startup circuit ensures that the delta phi generator does not operate in the undesirable operating state. The level detector comprises a comparator with an offset. The comparator has a first input coupled to the output node, a second input coupled to a reference voltage, and an output coupled to the startup circuit. The level detector detects the delta phi voltage, and in response, disables the startup circuit. | 09-01-2011 |
20110221413 | DC TO DC CONVERTER HAVING SWITCH CONTROL AND METHOD OF OPERATION - In a D.C. to D.C. converter, an input voltage is received via an inductor at an input terminal and stored onto a capacitor of an integrator. A first switch is coupled between the input terminal and a reference terminal such as ground and thereby fluxes the inductor. The input voltage stored on the capacitor falls at a rate determined by the integrator circuit and an initial value of the input voltage. After a time duration, the first switch becomes nonconductive. Current flows from the inductor through a diode to an output terminal until a second switch across the diode is made conductive. Stored voltage on the capacitor of the integrator increases in response to the second switch being conductive. The stored voltage on the capacitor is continuously compared with a reference voltage. The second switch is made nonconductive when the stored voltage on the capacitor exceeds the reference voltage. | 09-15-2011 |
20110221414 | DC to DC CONVERTER HAVING ABILITY OF SWITCHING BETWEEN CONTINUOUS AND DISCONTINUOUS MODES AND METHOD OF OPERATION - A DC to DC converter has first and second transistor coupled at a first node and coupled between first and second power supply terminals. An inductor has a first terminal coupled to the first node and a second terminal coupled to an output terminal for receiving a variable load. Transistor drive circuitry controls conduction of the first and second transistor in a non-overlapping conduction operation. A duty cycle controller controls a duty cycle for the first transistor and the second transistor. Control circuitry determines a mode of operation by monitoring cycles of operation and detecting a predetermined pattern of cycles in which inductor current becomes negative. A first mode of operation permits both the first transistor and the second transistor to alternately conduct and a second mode of operation does not permit the second transistor to conduct during each cycle when the inductor current is reduced to substantially zero. | 09-15-2011 |
20110279126 | Electrostatic occupant detection system - An electrostatic occupant detection system includes an electrostatic sensor and an electronic control unit. The electronic control unit is switchable between an occupant determination state in which the electronic control unit outputs a sine wave having a constant amplitude and a diagnosis state in which the electronic control unit maintains a voltage of the electrostatic sensor at a constant level. The electronic control unit gradually changes at least one of an amplitude and a frequency of the sine wave either when the electronic control unit switches from the occupant determination state to the diagnosis state and/or when the electronic control unit switches from the diagnosis state to the occupant determination state. | 11-17-2011 |
20110309812 | SWITCHING REGULATOR WITH INPUT CURRENT LIMITING CAPABILITIES - A switching regulator includes a capacitor, a charge control circuit, a discharge detector, a switch circuit, and a feedback circuit. The charge control circuit charges and discharges the capacitor. The discharge detector has an input coupled to the capacitor to detect when the capacitor has discharged to a predetermined level to indicate an over-current condition. The switch circuit is coupled to receive an input voltage. The switch circuit is made conductive and non conductive by a switching signal for supplying an output voltage at a regulated voltage level. The duty cycle of the switching signal is reduced in response to an indication of an over-current condition. The feedback circuit is for controlling a discharge rate of the capacitor. | 12-22-2011 |
20120007558 | Battery Cell Equalizer System - A method of operating a battery system includes a plurality of battery cells coupled in series. The plurality of cells includes at least three battery cells coupled in series. The method includes determining a cell with the greatest charge excess of the plurality of battery cells. The method further includes determining a cell with the greatest charge deficit of the plurality of battery cells. The method further includes discharging the cell with the greatest charge excess to charge, with a voltage converter, the cell with the greatest charge deficit. | 01-12-2012 |
20130328554 | VRS INTERFACE WITH 1/T ARMING FUNCTION - A variable reluctance sensor system for processing a variable reluctance sensor signal including an arming comparator and an arming circuit. The arming comparator compares the variable reluctance sensor signal with an arming threshold which decreases proportional to 1/t from a predetermined maximum level and asserts an armed signal when the variable reluctance sensor signal reaches the arming threshold. The arming threshold may be decreased based on a scaling factor multiplied by 1/t to ensure detection of each pulse of the variable reluctance sensor signal. The arming threshold may decrease to a predetermined minimum level sufficiently low to intersect the variable reluctance sensor signal and sufficiently high relative to an expected noise level. The arming threshold is reset in response to a timing event, such as zero crossing of the variable reluctance sensor signal. | 12-12-2013 |
20130335054 | Synchronous Rectifier Timer for Discontinuous Mode DC/DC Converter - A DC-DC converter ( | 12-19-2013 |
20140035561 | VARIABLE RELUCTANCE SENSOR INTERFACE WITH INTEGRATION BASED ARMING THRESHOLD - An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor including an integrator, an arming comparator and a detect circuit. The integrator includes an input for receiving the variable reluctance sensor signal and an output providing an integrated signal indicative of total flux change of the variable reluctance sensor. The arming comparator compares the integrated signal with a predetermined arming threshold and provides an armed signal indicative thereof. The detect circuit provides a reset signal after the armed signal is provided to reset the integrator. A corresponding method of processing the variable reluctance sensor signal is also described. | 02-06-2014 |
20140055112 | LOW DROPOUT VOLTAGE REGULATOR WITH A FLOATING VOLTAGE REFERENCE - An embodiment of a voltage regulator includes a pass device, a feedback circuit, and an operational amplifier (opamp). A first current conducting terminal of the opamp is coupled to an input voltage node, and a second current conducting terminal of the opamp is coupled to a regulated voltage node. The feedback circuit is coupled between the regulated voltage node and the feedback node, and the feedback circuit is a floating voltage reference configured to produce a feedback signal. The opamp has an input coupled to a feedback node, and an output coupled to a control terminal of the pass device. The opamp provides a signal to the control terminal based on the feedback signal from the feedback node. The control signal causes a current through the pass device to vary to maintain a voltage at the regulated voltage node at a target regulated voltage. | 02-27-2014 |
20140266019 | WIRELESS CHARGING SYSTEMS, DEVICES, AND METHODS - A wireless charging system includes a power transmitting device and a power receiving device. In the transmitting device, a transmitting coil converts a drive signal from a drive signal circuit into an alternating magnetic field. In the receiving device, a receiving coil produces an alternating waveform from the magnetic field, and a rectifier rectifies the alternating waveform to deliver power having a rectified voltage. A modulation circuit causes a loading circuit to be coupled to and uncoupled from the receiving coil at a pre-determined modulation rate when, for example, the rectified voltage is greater than a threshold voltage. Back in the transmitting device, a modulation detector circuit detects modulation of the load impedance, and when the load impedance is modulating at the pre-determined modulation rate, causes the drive signal circuit to adjust a characteristic of the drive signal, resulting in an adjustment in an intensity of the magnetic field. | 09-18-2014 |
20140266385 | DUAL SUPPLY LEVEL SHIFTER CIRCUITS - A dual supply level shifter circuit includes a switching circuit and a set of level shifter circuits coupled to the switching circuit. The switching circuit includes a first set of coupled transistors, wherein the supply switching circuit is coupled to a first supply source that is configured to provide a first power supply voltage and is coupled to a second supply source that is configured to provide a second power supply voltage. The set of level shifter circuits includes a second set of coupled transistors, wherein the set of level shifter circuits is configured to receive a voltage input signal at an input node from a first circuit and to supply to an output node of the dual supply level shifter circuit an output signal having a value that is a highest voltage value between the first power supply voltage and the second power supply voltage. | 09-18-2014 |