Patent application number | Description | Published |
20110309232 | HIGH DYNAMIC RANGE IMAGING SYSTEMS - An imaging system may include an imager with pixels and with reset lines that can be selectively deactivated and floated. When the reset lines are deactivated and floated, the reset lines may be connected to floating diffusion nodes in the pixels to increase the capacitance of the floating diffusion nodes. The reset lines may have parasitic capacitances that are used to supplement the capacitances of the floating diffusion nodes, when the reset lines are connected to the floating diffusion nodes. The imager may be used to capture high dynamic range images by simultaneously capturing a first image with a long integration time and a second image with a short integration time. The first and second images may be combined into a high dynamic range image. | 12-22-2011 |
20130056800 | Image Sensor With Reduced Noise By Blocking Nitridation Using Photoresist - An image sensor is described in which the imaging pixels have reduced noise by blocking nitridation in selected areas. In one example, a method includes forming a first and second gate oxide layer over a substrate, forming a layer of photoresist over the first gate oxide layer, applying nitridation to the photoresist and the second gate oxide layer such that the first gate oxide layer is protected from the nitridation by the photoresist, and forming a polysilicon gate over the first and second gate oxide layers. | 03-07-2013 |
20130099296 | TRANSISTOR WITH SELF-ALIGNED CHANNEL WIDTH - A device includes a transistor including a source and a drain disposed in a substrate and a gate disposed above the substrate. The gate includes a first longitudinal member disposed above the source and the drain and running substantially parallel to a channel of the transistor. The first longitudinal member is disposed over a first junction isolation area. The gate also includes a second longitudinal member disposed above the source and the drain and running substantially parallel to the channel of the transistor. The second longitudinal member is disposed over a second junction isolation region. The gate also includes a cross member running substantially perpendicular to the channel of the transistor and connecting the first longitudinal member to the second longitudinal member. The cross member is disposed above and between the source and the drain. | 04-25-2013 |
20130256510 | IMAGING DEVICE WITH FLOATING DIFFUSION SWITCH - Embodiments of the invention describe utilizing dual floating diffusion switches to enhance the dynamic range of pixels having multiple photosensitive elements. The insertion of dual floating diffusion switches between floating diffusion nodes of said photosensitive elements allows the conversion gain to be controlled and selected for each photosensitive element of a pixel. Furthermore, in embodiments utilizing a photosensitive element for high conversion gains, the value of high conversion gain for the respective photosensitive element maybe increased due to the separation between floating diffusion nodes, enabling high sensitivity for low-light conditions. | 10-03-2013 |
20130265472 | METHOD, APPARATUS AND SYSTEM FOR REDUCING PIXEL CELL NOISE - Circuitry to reduce signal noise characteristics in an image sensor. In an embodiment, a bit trace line segment is located between neighboring respective segments of a source follower power trace and an additional trace which is to remain at a first voltage level during a pixel cell readout time period. In another embodiment, for each such trace segment, a smallest separation between the trace segment and the respective neighboring other one of such trace segments is substantially equal to or less than some maximum length to provide for parasitic capacitance between the bit line trace and one or more other traces. | 10-10-2013 |
20140027827 | GROUND CONTACT STRUCTURE FOR A LOW DARK CURRENT CMOS PIXEL CELL - Pixel array structures to provide a ground contact for a CMOS pixel cell. In an embodiment, an active area of a pixel cell includes a photodiode disposed in a first portion of an active area, where a second portion of the active area extends from a side of the first portion. The second portion includes a doped region to provide a ground contact for the active area. In another embodiment, the pixel cell includes a transistor to transfer the charge from the photodiode, where a gate of the transistor is adjacent to the second portion and overlaps the side of the first portion. | 01-30-2014 |
20140063304 | IMAGE SENSOR WITH FIXED POTENTIAL OUTPUT TRANSISTOR - An image sensor pixel includes a photosensitive region and pixel circuitry. The photosensitive region accumulates an image charge in response to light incident upon the image sensor. The pixel circuitry includes a transfer-storage transistor, a charge-storage area, an output transistor, and a floating diffusion region. The transfer-storage transistor is coupled between the photosensitive region and the charge-storage area. The output transistor has a channel coupled between the charge-storage area and the floating diffusion region and has a gate tied to a fixed voltage potential. The transfer-storage transistor causes the image charge to transfer from the photosensitive region to the charge-storage area and to transfer from the charge-storage area to the floating diffusion region. | 03-06-2014 |
20150076330 | Dual VPIN HDR Image Sensor Pexel - A CMOS photodiode device for use in a dual-sensitivity imaging pixel contains at least two areas of differential doping. Transistors are provided in electrical contact with these areas to govern operation of signals emanating from the photodiode on two channels, each associated with a different sensitivity to light. A plurality of such photodiodes may be incorporate into a shared arrangement forming a single pixel, in order to enhance the signals. | 03-19-2015 |