Patent application number | Description | Published |
20100105169 | SEMICONDUCTOR CHIP HAVING VIA ELECTRODES AND STACKED SEMICONDUCTOR CHIPS INTERCONNECTED BY THE VIA ELECTRODES - A semiconductor device includes a semiconductor substrate and a via electrode. The via electrode has a first portion on the substrate and extends towards the substrate and has a plurality of spikes that extends from the first portion into the substrate, each of the spikes being spaced apart form one another. | 04-29-2010 |
20120077314 | METHOD OF FABRICATING SEMICONDUCTOR STACK PACKAGE - Methods of fabricating a semiconductor stack package having a high capacity, a small volume and reliability. According to the method of fabricating a semiconductor stack package, a first semiconductor substrate including a plurality of first semiconductor chips is attached to a chip protection film. The chip protection film is expanded such that the plurality of the first semiconductor chips are spaced apart from each other. A plurality of second semiconductor chips are attached to the plurality of the first semiconductor chips, respectively. A molding layer is formed between the plurality of the first semiconductor chips and between the plurality of the second semiconductor chips. The molding layer and the chip protection film are sawed to separate the semiconductor stack package comprising the first semiconductor chip and the second semiconductor chip into a unit. | 03-29-2012 |
20120100668 | METHOD OF MANUFACTURING A FLIP CHIP PACKAGE AND APPARATUS TO ATTACH A SEMICONDUCTOR CHIP USED IN THE METHOD - A method and apparatus to manufacture a flip chip package includes dotting a flux on a first preliminary bump of a package substrate, attaching a preliminary bump of a first semiconductor chip to the first preliminary bump of the package substrate via the flux, dotting a flux on a second preliminary bump of the package substrate, and attaching a preliminary bump of a second semiconductor chip to the second preliminary bump of the package substrate via the flux. Accordingly, an evaporation of the flux on the preliminary bump of the package substrate may be suppressed. | 04-26-2012 |
20120282735 | METHOD OF MANUFACTURING CHIP-STACKED SEMICONDUCTOR PACKAGE - A method of manufacturing a chip-stacked semiconductor package, the method including preparing a base wafer including a plurality of first chips each having a through-silicon via (TSV); bonding the base wafer including the plurality of first chips to a supporting carrier; preparing a plurality of second chips; forming stacked chips by bonding the plurality of second chips to the plurality of first chips; sealing the stacked chips with a sealing portion; and separating the stacked chips from each other. | 11-08-2012 |
20120299194 | SEMICONDUCTOR CHIP HAVING VIA ELECTRODES AND STACKED SEMICONDUCTOR CHIPS INTERCONNECTED BY THE VIA ELECTRODES - A semiconductor device includes a semiconductor substrate and a via electrode. The via electrode has a first portion on the substrate and extends towards the substrate and has a plurality of spikes that extends from the first portion into the substrate, each of the spikes being spaced apart form one another. | 11-29-2012 |
20120313332 | APPARATUS OF MANUFACTURING SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING SEMICONDUCTOR PACKAGES USING THE SAME - Apparatuses of manufacturing semiconductor packages are provided. An apparatus includes a chuck having a body, a porous plate disposed on the body, and a buffer pad disposed on the plate to provide a place on which a plurality of chips are loaded. The buffer pad has elasticity greater than the plate. The apparatus also includes a vacuum part supplying vacuum to the chuck so that the plurality of chips are sucked onto the buffer pad. Methods of manufacturing semiconductor packages using the apparatus are also provided. | 12-13-2012 |
20130149817 | FABRICATING METHODS OF SEMICONDUCTOR DEVICES AND PICK-UP APPARATUSES OF SEMICONDUCTOR DEVICES THEREIN - A fabricating method of a semiconductor device may include forming a semiconductor die on a supporting wafer, and picking up the die from the wafer by attaching to the die a transfer unit, the transfer unit including a head unit configured to enable twisting movement, and performing the twisting movement. A fabricating method of a semiconductor device may include forming a first semiconductor device on a supporting wafer; and picking up the first semiconductor device from the wafer, moving the first semiconductor device onto a second semiconductor device, and bonding the first semiconductor device to the second semiconductor device while maintaining the first semiconductor device oriented so that a surface faces upwardly. A fabricating method of a semiconductor device may include forming a first semiconductor device on a supporting wafer, attaching to the first semiconductor device a transfer unit configured to enable twisting movement, and performing the twisting movement. | 06-13-2013 |
20140196280 | METHOD OF MANUFACTURING A FLIP CHIP PACKAGE AND APPARATUS TO ATTACH A SEMICONDUCTOR CHIP USED IN THE METHOD - A method and apparatus to manufacture a flip chip package includes dotting a flux on a first preliminary bump of a package substrate, attaching a preliminary bump of a first semiconductor chip to the first preliminary bump of the package substrate via the flux, dotting a flux on a second preliminary bump of the package substrate, and attaching a preliminary bump of a second semiconductor chip to the second preliminary bump of the package substrate via the flux. Accordingly, an evaporation of the flux on the preliminary bump of the package substrate may be suppressed. | 07-17-2014 |
Patent application number | Description | Published |
20110115281 | BRAKE CONTROL APPARATUS OF HYBRID VEHICLE, AND METHOD THEREOF - A braking control method of a braking control apparatus for a hybrid vehicle, may include accumulating a brake fluid amount bypassed to a reservoir tank during regenerative braking cooperation control performed by a brake demand, finishing the regenerative braking cooperation control when the accumulated brake fluid amount surpasses a predetermined value, and resetting the accumulated brake fluid amount when a brake pedal is released and a predetermined time elapses. | 05-19-2011 |
20140116193 | BRAKE PEDAL SIMULATOR FOR VEHICLE - A brake pedal simulator apparatus for a vehicle for implementing a change in a foot effort applied to a brake pedal for each stroke, may include a pedal arm including one end hinge-connected to one side of a frame and the other end in which a pad may be mounted, a link unit including a plurality of links mutually connected between the frame and the pedal arm, and an elastic member elastically supporting the link unit and configured to form reaction force by elastic force in the pedal arm according to the each stroke by the foot effort applied to the pedal arm. | 05-01-2014 |
20140117602 | PEDAL SIMULATOR HAVING MULTI-STAGE SERIES SPRING - A pedal simulator using a multi-stage series spring includes a cylinder into which an operation rod connected to a brake pedal is inserted; a piston installed in the cylinder to receive a force of the operation rod; a plurality of springs installed between the cylinder and the piston to resiliently support the piston in the cylinder and disposed to overlap each other from an inner side to an outer side; and a plurality of spring seats disposed in the cylinder to overlap each other from an inner side to an outer side and configured to support the springs while being interposed between the springs, wherein the springs are installed between the piston, the spring seats, and the cylinder such that the plurality of springs are connected to each other in a multi-stage series structure. | 05-01-2014 |
20150321649 | METHOD FOR CONTROLLING BRAKING FORCE OF BRAKE ACCORDING TO VELOCITY - A method for controlling braking force of brake may include step of controlling braking force for each vehicle speed period to make braking force different in accordance with vehicle speed period by increasing an early hydraulic pressure of brake system for obtaining braking force in low-speed period to be lower than in middle-speed period, by increasing hydraulic pressure in middle-speed period to be higher than in low-speed period but to be lower than in high-speed period, and by increasing hydraulic pressure in high-speed period to be higher than in middle-speed period, and step of controlling braking force for each vehicle speed which sets correction coefficient α that is function of vehicle speed while braking to make braking force different for each vehicle speed, and brakes vehicle with braking force according to current vehicle speed determined using set correction coefficient α, wherein braking force is controlled by one of steps. | 11-12-2015 |
20160137181 | HYBRID ELECTRO-MECHANICAL BRAKE AND SYSTEM HAVING THE SAME - A hybrid electro-mechanical brake (EMB) includes an actuator mounted at one side of a housing and generating a motor clamping force. A primary piston is connected to a spindle, which rotates by a motor clamping force of the actuator, to linearly move when the spindle rotates. A secondary piston linearly moves and is mounted between the housing and the primary piston to form a hydraulic chamber between the second piston and the primary piston. The hybrid EMB system generates a brake force by using the motor clamping force of the actuator and a hydraulic pressure in a hydraulic chamber. The actuator actuates to move the primary piston toward a front end of the secondary piston to increase a pressure in the hydraulic chamber, which is sealed, so that the brake force transferred to the secondary piston increases. | 05-19-2016 |
Patent application number | Description | Published |
20150102319 | ORGANIC LIGHT EMITTING DIODE DISPLAY - An organic light emitting diode display is provided that may include a first substrate, a plurality of electrodes on the first substrate and spaced apart from each other, a pixel defining layer on the plurality of electrodes, spacers on the pixel defining layer, and a second substrate on the spacers. The pixel defining layer includes a plurality of openings spaced apart from each other and respectively open to the plurality of electrodes. The spacers on the pixel defining layer are at crossing points of a plurality of virtual lines, the spacers crossing spaces between adjacent openings of the plurality of openings. | 04-16-2015 |
20150125666 | DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - A display device and method of manufacturing the same are disclosed. In one aspect, the display device includes a substrate including a display area and a non-display area surrounding the display area. The display device also includes a first insulating layer formed in the non-display area, a first metal layer formed over the first insulating layer, and a second insulating layer formed over the first metal layer. A plurality of openings are formed in each of the first and second insulating layers and the first metal layer. The display device further includes a sealing member formed over the second insulating layer. The sealing member includes a plurality of coupling portions filling the openings and a groove is formed in a side wall of each of openings. | 05-07-2015 |
20150179708 | SELF-EMISSIVE DISPLAY AND MANUFACTURING METHOD THEREOF - A self-emissive display and manufacturing method thereof are disclosed. In one aspect, the device includes a substrate, a first electrode formed over the substrate, and a pixel defining layer (PDL) formed above at least an end portion of the first electrode, wherein the PDL defines a light emission area and a non-emission area. A light-emitting layer is formed over the first electrode in the light emission area and a second electrode is formed over the light-emitting layer. A protrusion is formed in the PDL in an area over the end portion of the first electrode. | 06-25-2015 |
20150303403 | DISPLAY DEVICE - A display device is disclosed. In one aspect, the device includes a first substrate in which an image displaying area and a non-displaying area are formed, a second substrate facing the first substrate, a first electrode formed over the first substrate, an emission layer formed over the first electrode and a second electrode formed over the emission layer. The device further includes a sealing member interposed between the non-displaying area of the first substrate and the second substrate, a reinforcement member interposed between the non-displaying area of the first substrate and the second substrate, the reinforcement member being adjacent to the sealing member and at least one spacer formed adjacent to the reinforcement member. | 10-22-2015 |
Patent application number | Description | Published |
20080318406 | SPLIT GATE TYPE NONVOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME - In a split gate type nonvolatile memory device and a method of fabricating the same. A supplementary layer pattern is disposed on a source region of a semiconductor substrate. Since the source region is vertically extended by virtue of the presence of the supplementary layer pattern, it is therefore possible to increase an area of a region where a floating gate overlaps the source region and the supplementary layer pattern. Accordingly, the capacitance of a capacitor formed between the source and the floating gate increases so that it is possible for the nonvolatile memory device to perform program/erase operations at a low voltage level. | 12-25-2008 |
20090141562 | NON-VOLATILE MEMORY DEVICE, METHODS OF FABRICATING AND OPERATING THE SAME - A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through the tunnel insulation layer. The select gate electrode is insulated from the control gate electrode. According to the non-volatile memory device, a select gate electrode and a control gate electrode are formed on a floating gate, and thus a voltage is applied to the respective gate electrodes to write and erase data. | 06-04-2009 |
20100289071 | NON-VOLATILE MEMORY DEVICE, METHODS OF FABRICATING AND OPERATING THE SAME - A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through the tunnel insulation layer. The select gate electrode is insulated from the control gate electrode. According to the non-volatile memory device, a select gate electrode and a control gate electrode are formed on a floating gate, and thus a voltage is applied to the respective gate electrodes to write and erase data. | 11-18-2010 |
Patent application number | Description | Published |
20100066723 | DISPLAY APPARATUS AND METHOD OF DRIVING THE SAME - A display apparatus includes a timing controller, a column driver, a row driver and a display unit. The timing controller outputs a first column clock embedded into image data during an active period, and outputs a second column clock embedded into blank data during a blank period. The column driver detects the first column clock and the image data and converts the image data into a first analog signal using the first column clock, and detects the second column clock and the blank data and converts the blank data into a second analog signal using the second column clock. The first column clock has a voltage level greater than a voltage level of the image data. The second column clock is embedded into the blank data and has a voltage level substantially the same as the voltage level of the image data. | 03-18-2010 |
20100110097 | DRIVING DEVICE OF A LIGHT SOURCE MODULE, LIGHT SOURCE MODULE HAVING THE DRIVING DEVICE, DRIVING METHOD OF THE LIGHT SOURCE MODULE, AND DISPLAY DEVICE HAVING THE DRIVING DEVICE - A light source module includes a plurality of light-emitting blocks. A local-dimming driver drives the light-emitting blocks based on a received clock signal (first reference clock) and received dimming levels. The clock signal is input to a liquid crystal display panel and is also input to the local-dimming driver but is delayed within the local-dimming driver by fixed propagation delay. A delay modeling part performs modeling of the fixed propagation delay amount. The clock signal input to the local-dimming driver is first phase-compensated (delayed) by a phase compensation amount to synchronize the driving signals output by the local-dimming driver with the clock signal. The sum of the modeled propagation delay amount and the phase compensation amount is equal to an integral multiple of the period of the clock signal. The driving signal of the light-emitting blocks are synchronized and in phase with the clock signal. | 05-06-2010 |
20100277490 | IMAGE DRIVING APPARATUS AND DISPLAY APPARATUS INCLUDING THE SAME - A wireless and multi-channel re-transmitting link is provided between an image displaying part that is housed in a first housing and an image data processing part that is housed in a segregated second housing. The wireless link allows the image displaying part to be more easily moved around and to be made lighter and slimmer in profile because at least some image data processing can be carried out in the second housing and yet cumbersome cables are not needed for linking the pre-processed image data from the second housing to the first housing. In one embodiment, the data bandwidth. that is to he transmitted through the wireless link is first reduced; for example the frame refresh rate of image frames conveyed through each of the wireless channels is made less than the frame refresh rate of the original image signal. In one embodiment, the reduced number of frames per unit time are further frequency wise and temporally wise spaced apart from one another by alternatingly sending them through different wireless channels at different times. Thus if a burst of noise strikes one of the plural re-transmission channels, the likelihood that it will corrupt a frame is reduced. | 11-04-2010 |
20110115724 | DISPLAY APPARATUS - A display apparatus includes a display panel, a plurality of sensors, a read-out circuit, and a control circuit. The display panel includes a plurality of pixels receiving a data signal having a polarity reversed with respect to a common voltage to display an image. The sensors sense light to output sensing signals. The sensors may be integrated into the display panel. The read-out circuit is charged with the sensing signals generating charged signals in response to a sampling signal generated during a period in which the common voltage has a predetermined reference voltage level. The control circuit calculates a position on the display panel from the charged signals received signals from the read-out circuit. | 05-19-2011 |
20120099023 | DISPLAY DEVICE AND SYSTEM FOR WIRELESSLY TRANSMITTING/RECEIVING IMAGE SIGNALS - A display device and a system for wirelessly transmitting/receiving an image signal are provided. The display device includes: a display panel that displays an image; an upper housing that is disposed on a front surface of the display panel and has an open window defining a display area; a lower housing that is disposed on a rear surface of the display panel and has a hole formed in a portion of an area corresponding to the display area; and a wireless communication module that is disposed on a rear surface of the lower housing and transmits or receives a wireless signal through the hole. | 04-26-2012 |
20120127159 | METHOD OF DRIVING DISPLAY PANEL AND DISPLAY APPARATUS FOR PERFORMING THE SAME - A method of driving a display panel includes identifying a dimension of input data, where the input data is one of two-dimensional input data and three-dimensional input data, and generating first distributed data and second distributed data based on the dimension of the input data by at least one of copying the input data and dividing the input data into front data and back data. | 05-24-2012 |
20120206504 | COMPENSATION TABLE GENERATING SYSTEM, DISPLAY APPARATUS HAVING BRIGHTNESS COMPENSATION TABLE, AND METHOD OF GENERATING COMPENSATION TABLE - A compensation table generating system includes a test signal applying part which applies a test signal corresponding to reference gray scales to a display panel, an image obtaining part which obtains a test image of each of the reference gray scales displayed on the display panel based on the test signal, a position information extractor which measures a brightness distribution of each of the reference gray scales of the display panel based on the test image of each of the reference gray scales and extracts a representative position information of an stain area, in which a stain appears, based on the brightness distribution of each of the reference gray scales, a compensation data calculator which calculates a compensation data corresponding to a position of the stain area, and a brightness compensation table which stores the representative position information and the compensation data. | 08-16-2012 |
20140198134 | METHOD OF DISPLAYING AN IMAGE, DISPLAY APPARATUS PERFORMING THE SAME, METHOD AND APPARATUS OF CALCULATING A CORRECTION VALUE APPLIED TO THE SAME - A method of displaying an image on a display panel having a plurality of pixels arranged as rows and columns includes calculating a row correction value corresponding to a pixel position of a received data based on an average luminance of pixels in a pixel row of a sample-grayscale image, calculating a column correction value corresponding to the pixel position of the received data based on an average luminance of pixels in a pixel column of the sample-grayscale image, generating correction data for the received data using a row correction value and a column correction value corresponding to a pixel position of the received data, and converting the correction data to a data voltage to provide a data line of the display panel with the data voltage. | 07-17-2014 |
20150206276 | DISPLAY DEVICE AND INTEGRATED CIRCUIT CHIP - A display device is disclosed. The display device includes: a plurality of pixels; a memory storing a lookup table including compensation values for pixels at specific locations of the display. The lookup table also stores compensation values obtained by a bilinear compensation method. The display also includes a data compensator calculating the compensation values corresponding to a location where an image signal is displayed using the compensation values and substitution values stored in the lookup table. The substitution values are obtained by bit-shifting the compensation values acquired by bilinear compensation method. The display device avoids the need to use large and slow divider circuits used in ICs implementing bilinear compensation method. | 07-23-2015 |
Patent application number | Description | Published |
20140316760 | METHOD OF THREE-DIMENSIONAL OPTOELECTRICAL SIMULATION OF IMAGE SENSOR - A three-dimensional optoelectrical simulation includes generating a process simulation result including a doping profile of a silicon substrate of image sensor, a structure simulation result with respect to a back end of line structure, and a merged result generated by merging a process simulation result and a structure simulation result, selectively extending the merged result to an extended result by using a process simulation result or a structure simulation result, generating a segmented result for each pixel based on a merged result or an extended result, an optical crosstalk simulation result of image sensor based on a structure simulation result and an optical mesh, and a final simulation result including an electrical crosstalk simulation result of the image sensor based on a segmented result for each pixel and an optical crosstalk simulation result. | 10-23-2014 |
20150102394 | ELECTROSTATIC DISCHARGE PROTECTION DEVICE - An electrostatic discharge (ESD) protection device includes a substrate including a plurality of active fins and a plurality of grooves. The ESD protection device includes an insulation layer on the active fins and the grooves, and a gate electrode on the active fins. The ESD protection device includes a first impurity region adjacent to a first side of the gate electrode, and a second impurity region adjacent to a second side of the gate electrode. The second side of the gate electrode may be arranged opposite to the first side. The ESD protection device includes an electrode pattern of a capacitor overlapping the first impurity region, a resistor overlapping the second impurity region, and a connection structure electrically connecting the electrode pattern, the gate electrode, and the resistor to each other. | 04-16-2015 |
20160141388 | METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING MASKS HAVING VARYING WIDTHS - In a method, a dummy gate layer structure and a mask layer are formed on a substrate. The mask layer is patterned to form masks. Spacers are formed on sidewalls of the mask. A dummy gate mask is formed between the spacers. The dummy gate layer structure is patterned using the dummy gate mask to form dummy gate structures. The dummy gate structure is replaced with a gate structure. When the mask is formed, an initial layout of masks extending in a first direction is designed. An offset bias in a second direction is provided for a specific region of the initial layout to design a final layout having a width in the second direction varying along the first direction. The mask layer is patterned according to the final layout to form the masks having a width varying along the first direction. | 05-19-2016 |
20160141413 | SEMICONDUCTOR DEVICES - Semiconductor devices include a channel layer on a substrate, the channel layer including a material having a lattice constant different from a lattice constant of the substrate, a first gate electrode on the channel layer, a first source region of a first conductivity type at a first side of the first gate electrode, a first body region of a second conductivity type under the first source region and contacting the first source region, a first drain region of the first conductivity type disposed at a second side of the first gate electrode, a first drift region of the first conductivity type under the first drain region and contacting the first drain region, and a first stud region in the channel layer and the first drift region. The first stud region has an impurity concentration higher than an impurity concentration of the first drift region. | 05-19-2016 |
Patent application number | Description | Published |
20120098072 | Semiconductor Devices Having Lightly Doped Channel Impurity Regions - Semiconductor devices are provided including a gate across an active region of a substrate; a source region and a drain region in the active region on either side of the gate and spaced apart from each other; a main channel impurity region in the active region between the source and drain regions and having a first channel impurity concentration; and a lightly doped channel impurity region in the active region adjacent to the drain region. The lightly doped channel impurity region has the same conductivity type as the main channel impurity region and a second channel impurity concentration, lower than the first channel impurity concentration. The lightly doped channel impurity region and the main channel impurity region contain a first element. The lightly doped channel impurity region also contains a second element, which is a different Group element from the first element. | 04-26-2012 |
20120142160 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING DEUTERIUM ANNEALING - A method of fabricating a semiconductor device is disclosed, the method generally including the steps of: forming a gate dielectric layer on a semiconductor substrate;forming a gate electrode on the gate dielectric layer;forming an etch stop layer on the gate electrode;forming a capacitor on the semiconductor substrate adjacent to the gate electrode;after forming the capacitor, forming a contact hole passing through the etch stop layer on the gate electrode;and, diffusing deuterium into the gate dielectric layer through the contact hole. | 06-07-2012 |
20130037888 | SEMICONDUCTOR DEVICE - A semiconductor device includes an active region defined by a device isolation layer and including first and second sections or regions, a gate electrode extending in a first direction across the active region over a channel between the first region and the second region and including at least one first gate tab protruding in a second direction toward the first region, and first and second contact plugs. The first gate tab covers and extends along a boundary between the active region and the device isolation layer. The first contact plug is disposed over the first region, the second contact plug is disposed over the second region, and the second contact plug has an effective width, as measured in the first direction, greater than that of the first contact plug. | 02-14-2013 |
20130248980 | CAPACITORLESS MEMORY DEVICE - According to an example embodiment of inventive concepts, a capacitorless memory device includes a capacitorless memory cell that includes a bit line on a substrate; a read transistor, and a write transistor. The read transistor may include first to third impurity layers stacked in a vertical direction on the bit line. The first and third layers may be a first conductive type, and the second impurity layer may be a second conductive type that differs from the first conductive type. The write transistor may include a source layer, a body layer, and a drain layer stacked in the vertical direction on the substrate, and a gate line that is adjacent to a side surface of the body layer. The gate line may be spaced apart from the side surface of the body layer. The source layer may be adjacent to a side surface of the second impurity layer. | 09-26-2013 |
20140117460 | SEMICONDUCTOR DEVICE - A semiconductor device includes an active region defined by a device isolation layer and including first and second sections or regions, a gate electrode extending in a first direction across the active region over a channel between the first region and the second region and including at least one first gate tab protruding in a second direction toward the first region, and first and second contact plugs. The first gate tab covers and extends along a boundary between the active region and the device isolation layer. The first contact plug is disposed over the first region, the second contact plug is disposed over the second region, and the second contact plug has an effective width, as measured in the first direction, greater than that of the first contact plug. | 05-01-2014 |
20140264568 | SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING THE SAME - In a method of manufacturing a semiconductor device, a trench is formed by removing an upper portion of a substrate. A gate insulation layer pattern is formed on an inner wall of the trench. A gate electrode is formed on the gate insulation layer pattern. The gate electrode fills a lower portion of the trench. A capping layer is formed on the gate electrode and the gate insulation layer pattern. The capping layer is partially oxidized to form a first capping layer pattern and a second capping layer pattern. The first capping layer pattern is not oxidized, and the second capping layer pattern is oxidized. A third capping layer pattern is formed on the second capping layer pattern, the third capping layer pattern filling an upper portion of the trench. | 09-18-2014 |
Patent application number | Description | Published |
20090015165 | Plasma generating apparatus - A plasma generating apparatus having superior plasma generation efficiency that uses a single reaction chamber. The plasma generating apparatus includes a RF generator for providing a RF power, an antenna for generating an electromagnetic field upon receiving the RF power, a reaction chamber for exciting/ionizing a reaction gas via the electromagnetic field, and generating a plasma, and a plasma channel for absorbing the RF power, and allowing a current signal to be induced to the plasma. | 01-15-2009 |
20100065215 | Plasma generating apparatus - A plasma generating apparatus including a plurality of plasma source modules. Each plasma source module includes a ferrite core having high magnetic permeability and a plasma channel through which plasma may pass. The plasma generating apparatus may effectively generate and uniformly distribute large-area and high-density plasma without a dielectric window. | 03-18-2010 |
20120006351 | Methods Of Cleaning And Plasma Processing Apparatus For Manufacturing Semiconductors - A cleaning method for cleaning a semiconductor manufacturing apparatus may include generating plasma from a cleaning gas. The semiconductor manufacturing apparatus may be cleaned with the plasma. A positive direct-current voltage may be applied to an ESC of the semiconductor manufacturing apparatus during a cleaning of the semiconductor manufacturing apparatus. A negative direct-current voltage may be applied to the ESC during the cleaning of the semiconductor manufacturing apparatus. Also, a wall of the process chamber may be cleaned by applying the positive direct-current voltage to the ESC. | 01-12-2012 |
20120007503 | Plasma Generating Apparatus - At least two antenna coils are electrically connected in parallel to each other to generate uniform high density plasma, and capacitors are installed between the respective antenna coils and a ground to minimize an antenna voltage, thereby minimizing the effect of capacitive plasma coupling due to the antenna voltage. | 01-12-2012 |
20120118876 | FLIP CHIP BONDING APPARATUS AND MANUFACTURING METHOD THEREOF - According to example embodiments, a flip chip bonding apparatus includes a metal chamber, a stage in the metal chamber, and a planar antenna in the chamber. The stage may be configured to receive a circuit board having flip chips arranged thereon. The antenna may be configured to bond the flip chips to the circuit board by inductively heating the flip chips on the circuit board. | 05-17-2012 |
20130139380 | CHIP BONDING APPARATUS AND CHIP BONDING METHOD USING THE SAME - A chip bonding apparatus configured to bond chips to a circuit board using induction heating generated by an AC magnetic field may be provided. In particular, the chip bonding apparatus includes at least one stage unit configured to support a circuit board on which a chip is placed, a rotating unit configured to rotatively move the at least one stage unit at a desired angle, and a bonding unit including an induction heating antenna configured to perform induction heating such the chip is bonded to the circuit board. | 06-06-2013 |
20130141720 | PLASMA DIAGNOSTIC APPARATUS AND METHOD - A plasma diagnostic apparatus includes a vacuum chamber unit having at least one electrode and having plasma generated inside. A bias power unit is disposed inside the vacuum chamber unit to apply a radio frequency voltage to an electrode that supports a wafer. A spectrum unit decomposes light emitted from inside the plasma according to wavelengths. A light detection unit detects the light decomposed according to wavelengths. A control unit controls a turn-on and turn-off process of the light detection unit according to a waveform of the radio frequency voltage. | 06-06-2013 |
20130160950 | PLASMA PROCESSING APPARATUS - A plasma processing apparatus capable of adjusting a processing rate (e.g., etching or deposition rate) of a sample locally by adjusting a plasma density may be provided. For example, the plasma processing apparatus may include a processing chamber, an antenna coil inside the processing chamber to generate magnetic field, and a magnetic field blocking member configured to block the magnetic field generated at the antenna coil such that an intensity of the magnetic field is controlled by adjusting a gap distance between the magnetic field blocking member and the antenna coil. According to the plasma processing apparatus, an asymmetric etching of the sample can be minimized. | 06-27-2013 |
20140193978 | METHOD OF PLASMA PROCESSING AND APPARATUSES USING THE METHOD - A method of operating a plasma processing device includes outputting a first RF power having a first frequency and a first duty ratio, and outputting a second RF power having a second frequency higher than the first frequency and a second duty ratio smaller than the first duty ratio. The outputting of the first RF power and the outputting of the second RF power are synchronized with each other. | 07-10-2014 |
20140273484 | INDUCTIVELY COUPLED PLASMA PROCESSING APPARATUS AND PLASMA PROCESSING METHOD USING THE SAME - An inductively coupled plasma processing apparatus includes a chamber configured to provide a space for processing a substrate and including a window formed in an upper portion thereof, a substrate stage configured to support the substrate within the chamber and including a lower electrode, the lower electrode configured to receive a first radio frequency signal, an upper electrode arranged on the upper portion of the chamber with the window interposed between the upper electrode and the space for processing the substrate, the upper electrode configured to receive a second radio frequency signal, a conductive shield member arranged within the chamber and configured to cover the window, and a shield power supply configured to apply a shield signal to the shield member in synchronization with the second radio frequency signal. | 09-18-2014 |
20150155178 | METHOD OF PROCESSING A SUBSTRATE AND APPARATUS FOR PERFORMING THE SAME - In a method of processing a substrate, a first plasma may be generated from a first reaction gas. A second plasma may be generated from a second reaction gas. The first plasma and the second plasma may be individually applied to the substrate. Thus, each of the at least two remote plasma sources may generate at least two plasmas under different process recipes, which may be optimized for processing the substrate. As a result, the substrate processed using the optimal plasmas may have a desired shape. | 06-04-2015 |
Patent application number | Description | Published |
20110304849 | DEVICE FOR CALIBRATING OPTICAL SCANNER, METHOD OF MANUFACTURING THE DEVICE, AND METHOD OF CALIBRATING OPTICAL SCANNER USING THE DEVICE - A device for calibrating an optical scanner includes a substrate; and a pattern disposed on the substrate, the pattern comprising a photoresist. | 12-15-2011 |
20120078527 | KIT AND METHOD FOR PREDICTING SENSITIVITY OF GASTRIC CANCER PATIENT TO ANTI-CANCER AGENT - A kit and method for predicting the sensitivity of gastric cancer patient to an anti-cancer agent are disclosed. | 03-29-2012 |
20120325664 | NANOSENSOR AND METHOD OF MANUFACTURING THE SAME - A nanosensor comprising a substrate having a hole; a first insulating layer disposed on the substrate and having a first nanopore at a location corresponding to the hole in the substrate; first and second electrodes disposed on the first insulating layer, wherein the first and second electrodes are spaced apart from each other with the first nanopore positioned therebetween; a first electrode pad disposed on at least a portion of the first electrode; a second electrode pad disposed on at least a portion of the second electrode; and a protective layer disposed on at least a portion of the first and second electrode pads; as well as a method for manufacturing same. | 12-27-2012 |
20130161192 | APPARATUS AND METHOD FOR LINEARLY TRANSLOCATING NUCLEIC ACID MOLECULE THROUGH AN APERTURE - An apparatus and method for linearly translocating nucleic acid molecules through an aperture at a reduced rate. | 06-27-2013 |
20130161194 | NANOPORE DEVICE, METHOD OF FABRICATING THE SAME, AND DNA DETECTION APPARATUS INCLUDING THE SAME - A nanopore device including a nanopore formed by penetrating a thin layer, a nanochannel formed at an entrance of the nanopore, and a filler in the nanochannel, as well as a method of fabricating the nanopore device and an apparatus including the nanopore device. | 06-27-2013 |
20130264206 | BIOMOLECULE DETECTION APPARATUS INCLUDING PLURALITY OF ELECTRODES - A biomolecule detection apparatus comprising a nanopore device having a front surface and rear surface and including a nanopore having a nano-sized diameter; a reservoir disposed adjacent to a rear surface of the nanopore device; and a power supply unit comprising a first electrode disposed in a front of the nanopore device; a second electrode disposed inside the reservoir; and a third electrode disposed adjacent the nanopore and between the first electrode and the second electrode; as well as a method of using the biomolecule detection apparatus to detect a biomolecule in a sample. | 10-10-2013 |
20130265031 | NANOGAP SENSOR AND METHOD OF MANUFACTURING THE SAME - A nanogap sensor includes a first layer in which a micropore is formed; a graphene sheet disposed on the first layer and including a nanoelectrode region in which a nanogap is formed, the nanogap aligned with the micropore; a first electrode formed on the grapheme sheet; and a second electrode formed on the graphene sheet, wherein the first electrode and the second electrode are connected to respective ends of the nanoelectrode region. | 10-10-2013 |
20130334047 | DEVICE FOR DETERMINING A MONOMER MOLECULE SEQUENCE OF A POLYMER COMPRISING DIFFERENT ELECTRODES AND USE THEREOF - Provided is a device for determining a monomer molecule sequence of a polymer including different electrodes, and a method of efficiently determining a monomer molecule sequence of a polymer. | 12-19-2013 |
20140008225 | METHOD OF DETERMINING OR ESTIMATING NUCLEOTIDE SEQUENCE OF NUCLEIC ACID - A method of determining or estimating a nucleotide sequence of a nucleic acid by using a device with a nanopore. | 01-09-2014 |
20140021047 | METHOD FOR ANALYZING BIOMOLECULES USING ASYMMETRIC ELECTROLYTE CONCENTRATION - A method and system for analyzing biomolecules using a high concentration electrolytic solution and a low concentration electrolytic solution. | 01-23-2014 |
20140045270 | DEVICE HAVING NANOPORE WITH THIOL-CONTAINING MATERIAL ATTACHED TO GOLD LAYER AND METHOD OF ANALYZING NUCLEIC ACID USING THE DEVICE - Provided is a device with a nanopore that has a thiol-containing material bound to a gold layer, methods of producing the devices, and methods of analyzing nucleic acid using the devices. | 02-13-2014 |
20140061590 | GRAPHENE DEVICE AND METHOD OF MANUFACTURING THE SAME - The method of manufacturing a graphene device includes forming an insulating material layer on a substrate, forming first and second metal pads on the insulating material layer spaced apart from each other, forming a graphene layer having a portion defined as an active area between the first and second metal pads on the insulating material layer, forming third and fourth metal pads on the graphene layer spaced apart from each other with the active area therebetween, the third and fourth metal pads extending above the first metal pad and the second metal pad, respectively, forming a first protection layer to cover all the first and second metal pads, the graphene layer, and the third and fourth metal pads, and etching an entire surface of the first protection layer until only a residual layer made of a material for forming the first protection layer remains on the active area. | 03-06-2014 |
20140062454 | NANOSENSORS INCLUDING GRAPHENE AND METHODS OF MANUFACTURING THE SAME - Nanosensors including graphene and methods of manufacturing the same. A nanosensor includes a first insulating layer in which a first nanopore is formed; a graphene layer that is disposed on the first insulating layer and having a second nanopore or a nanogap formed therein adjacent to the first nanopore; and a marker element that is disposed adjacent to the graphene layer and identifies a position of the graphene layer. | 03-06-2014 |
20140202866 | NANOSENSOR AND METHOD OF MANUFACTURING SAME - A nanosensor may include a substrate that has a hole formed therein, a first insulating layer that is disposed on the substrate and has a nanopore formed therein, first and second electrodes that are disposed on the first insulating layer and are spaced apart from each other, first and second electrode pads that are disposed on the first and second electrodes, respectively, and a protective layer disposed on the first and second electrode pads. A method of manufacturing a nanosensor may include forming a first insulating layer, graphene, and a metal layer on a substrate, patterning the metal layer and the graphene, forming a protective layer on a portion of the graphene and the metal layer, exposing a portion of the graphene by removing a portion of the protective layer, forming a hole in the substrate, and forming a nanopore in the first insulating layer and the graphene to be connected to the hole. | 07-24-2014 |
20140302439 | METHOD OF MANUFACTURING GRAPHENE, CARBON NANOTUBES, FULLERENE, GRAPHITE OR A COMBINATION THEREOF HAVING A POSITION SPECIFICALLY REGULATED RESISTANCE - Provided are a method of manufacturing graphene, carbon nanotubes, fullerene, graphite, or a combination thereof having a regulated resistance, and a material manufactured using the method. | 10-09-2014 |
20150069329 | NANOPORE DEVICE INCLUDING GRAPHENE NANOPORE AND METHOD OF MANUFACTURING THE SAME - Provided are a nanopore device with resolution improved by graphene nanopores, and a method of manufacturing the same. The nanopore device includes: a first insulating layer; a graphene layer disposed on the first insulating layer and having a nanopore formed at a center portion of the graphene layer; and first and second electrode layers disposed respectively at both sides of the nanopore on a top surface of the graphene layer, wherein a center region of the first insulating layer is removed such that the center portion of the graphene layer is exposed to the outside. | 03-12-2015 |
Patent application number | Description | Published |
20110001939 | OPTICAL SYSTEM - An optical system is provided which includes an illumination system with a light source, a lens member which guides light from the light source, and a mirror member; an image unit on which an image is formed and on which light from the illumination system is incident; a projection system which magnifies and projects the image formed on the image unit; and a blocking unit which is mounted to the mirror member of the illumination system and partially blocks light from the light source that is directed to the mirror member. | 01-06-2011 |
20120300180 | IMAGE PROJECTION APPARATUS PROVIDED WITH NO RELAY LENS - An image projection apparatus is provided, which includes an illumination unit which generates illumination light, a first prism which receives the illumination light from the illumination unit and performs total reflection of the illumination light, a reflection mirror which receives the illumination light from the first prism and reflects the illumination light, an image forming unit which forms an image from the illumination light that is reflected from the reflection mirror, and a second prism which performs total reflection of the image that is formed by the image forming unit toward a screen. | 11-29-2012 |
20130050814 | PROJECTION SCREEN AND PROJECTION SYSTEM HAVING THE SAME - A projection screen is provided, which includes a reflective layer having plural reflective patterns which are spaced apart from one another and each of which includes an image reflective surface having an inclination angle against a horizontal direction so as to guide an image light toward a front of the screen, and plural external light absorption layers absorbing external lights incident to the screen. | 02-28-2013 |
20140036359 | SCREEN FOR FRONT PROJECTION APPARATUS AND FABRICATION METHOD THEREOF - A screen for a Fresnel type front projection apparatus is provided. The screen includes a reflective layer including a plurality of reflective protrusions which project toward a front of the screen; each of the plurality of reflective protrusions including a reflective surface which forwardly reflects an image light projected from a projector; and an absorbing surface which absorbs an external light. The reflective surface includes a first region on an inner side thereof on which a reflective coating is not formed and a second region on an outer side thereof on which the reflective coating is formed. | 02-06-2014 |
20150261079 | LIGHT ABSORBING FILM, REFLECTION-TYPE SCREEN FOR FRONT PROJECTION DISPLAY DEVICE HAVING THE SAME, AND METHOD FOR MANUFACTURING LIGHT ABSORBING FILM - A method for manufacturing a light-absorbing film is provided, where the light-absorbing film absorbs external light incident on a reflection surface of a reflection-type screen. The method includes forming a dye layer by spreading dye, including a light absorbing material, on a surface of a first transparent film, laminating a second transparent film on the dye layer, forming a cylindrical film roll by winding the first and second transparent films, laminated on the dye layer, around a core, and forming a film member by slicing the film roll along a direction that is inclined with respect to a radial direction of the film roll. | 09-17-2015 |
20150261384 | TOUCH RECOGNITION DEVICE AND DISPLAY APPARATUS USING THE SAME - Provided is a touch recognition device and a display apparatus using the same. The touch recognition device includes: an image screen configured to display an image; a light source configured to emit light toward the image screen; a camera provided in the rear of the image screen and configured to detect at least one of infrared reflected and input from an object approaching or contacting the image screen; and a diffusion transmitter provided between the image screen and the camera, configured to diffuse the emitted light in response to the light source emitting the light, and configured to transmit the infrared in response to the light source emitting no light. | 09-17-2015 |
Patent application number | Description | Published |
20140149905 | ELECTRONIC DEVICE AND PAGE NAVIGATION METHOD THEREOF - An electronic device and a page navigation method thereof for facilitating navigation among pages are provided. The method disclosure includes displaying a first page, detecting a touch gesture requesting navigation to a second page on a screen displaying the first page, displaying the second page overlapped with the first page upon detection of the touch gesture, changing a transparency of at least one of the first and second pages according to a distance between a current touch point and an initial touch point of the touch gesture, and displaying, when the touch gesture is released, one of the first and second pages. | 05-29-2014 |
20140298355 | APP OPERATING METHOD AND DEVICE AND APP OUTPUT DEVICE SUPPORTING THE SAME - An Application (APP) operating method, an APP operating device, and an APP output device for supporting the APP operating method are provided. The APP operating method includes connecting an APP operating device and an APP output device, transmitting, by the APP operating device, APP data corresponding to a plurality of APPs being executed in the APP operating device to the APP output device, and outputting, by the APP output device, a plurality of APP areas respectively corresponding to the APP data. | 10-02-2014 |
20140307896 | METHOD FOR CONTROLLING AUDIO OUTPUT AND DEVICE SUPPORTING THE SAME - A method for controlling an audio output and a device supporting the same are provided. The method includes connecting an application operating device to an application output device through at least one communication channel, and transmitting audio information of at least one of a plurality of applications operating based on the at least one communication channel from the application operating device to the application output device. | 10-16-2014 |
20150089442 | METHOD FOR CONTROLLING WINDOW AND ELECTRONIC DEVICE FOR SUPPORTING THE SAME - A method for controlling a window displayed in a screen area of an electronic device is provided. The method includes executing the window, configuring a reference point of the window according to a predetermined reference, receiving a request for changing a property of the window, in response to receiving the request for changing the property of the window, changing the property of the window on the basis of the reference point, and reconfiguring the reference point of the property-changed window. | 03-26-2015 |
20150333951 | CONTENT PLAYBACK METHOD AND ELECTRONIC DEVICE IMPLEMENTING THE SAME - A method for managing a playback of contents in an electronic device is provided. The method includes recognizing a major section of the contents, obtaining at least one of setup information related a network speed, data remaining amount and playback, and playback time of the contents, and deciding a playback policy of the contents based on at least one of the recognized major section and the obtained information. | 11-19-2015 |
20150339036 | METHOD FOR ORGANIZING HOME SCREEN AND ELECTRONIC DEVICE IMPLEMENTING THE SAME - An electronic device and a method for constructing a home screen thereof are provided. the method includes recognizing an editing gesture input with regard to a selected application icon, activating an editing mode in response to the editing gesture input, displaying an application list corresponding to the selected application icon in the editing mode, recognizing a selection of at least one of graphical components including widgets and icons, arranged in the displayed application list, and displaying the at least one selected graphical component on at least one page of the home screen. | 11-26-2015 |
20150347847 | IMAGE PROCESSING METHOD AND ELECTRONIC DEVICE IMPLEMENTING THE SAME - An image processing method and an electronic device implementing the method are provided. The method includes the electronic device sequentially receiving an image captured by a camera and determining whether a frame of the received image satisfies a predetermined condition. If the predetermined condition is satisfied, the electronic device recognizes an object in the frame. Then the electronic device tracks the object in the frame through tracking data created based on a feature extracted from the recognized object. | 12-03-2015 |
20160041727 | METHOD AND APPARATUS FOR DISPLAYING SCREEN IN ELECTRONIC DEVICES - A method for displaying images so that a lower graphical user interface (GUI) object and an upper GUI object do not overlap each other in a specific area in a screen of an electronic device is provided. The displaying method includes detecting a non-overlapping area in a lower GUI object, determining whether upper GUI objects are displayed to overlap the non-overlapping area, and if the upper GUI objects are displayed to overlap the non-overlapping area at least in part, changing a display configuration of at least one of the GUI objects. | 02-11-2016 |
20160085424 | METHOD AND APPARATUS FOR INPUTTING OBJECT IN ELECTRONIC DEVICE - An electronic device and a method of inputting an object are provided. The electronic device includes interpreting an object input through an application, enlarging and displaying at least some data in accordance with a result of the analysis of the object, and displaying a new object on an enlarged area. | 03-24-2016 |
Patent application number | Description | Published |
20110246931 | APPARATUS AND METHOD FOR WRITING MESSAGE IN MOBILE TERMINAL - A method and an apparatus for writing a message in a mobile terminal are provided. A method and an apparatus for simplifying movement between slides (pages) by changing the form of a slide into a collapse form when making messages that use a plurality of slides (pages) in a mobile terminal are provided. The apparatus includes a slide compressor and a message manager. The slide compressor converts an expanded slide including a message input field into a collapse slide. The message manager controls the slide compressor, and processes to output the slide converted by the slide compressor. | 10-06-2011 |
20110302525 | METHOD AND APPARATUS FOR DISPLAYING MESSAGE LIST IN MOBILE TERMINAL - A chat window type message list display method and a mobile terminal employing the method for displaying messages communicated with a messaging counterpart are provided. A message list display method for a mobile terminal according to the present invention includes loading, when a contact item that represents a messaging counterpart is selected, a predefined number of messages communicated most recently with the messaging counterpart among a plurality of messages communicated with the messaging counterpart, arranging the most recently communicated messages in descending order of communicated times in a direction from bottom to top of a screen, displaying a scroll bar region and a scroll bar situated at bottom end of the scroll bar region, and shrinking, while the rest of the plurality of the messages communicated with the messaging counterpart are loaded, the scroll bar downward in length according to a number of the messages loaded. | 12-08-2011 |
20120309423 | APPARATUS AND METHOD FOR OBTAINING LOCATION INFORMATION OF AN ACCESSORY DEVICE IN A WIRELESS COMMUNICATION SYSTEM - Obtaining location information of an accessory location device having no location estimation function, through a short-range communication function includes determining whether a message transmission period arrives, and when the message transmission period arrives, transmitting a message including at least one of an indicator indicating that location information transmission is requested to a first device, identification information of an accessory location device, and identification information of the first device. | 12-06-2012 |
20130024768 | APPARATUS AND METHOD FOR PROVIDING SUMMARY INFORMATION IN ELECTRONIC BOOK SERVICE SYSTEM - An apparatus and a method for generating and providing summary information for an Electronic (E)-book depending on a user characteristic are provided. The method includes determining a number of levels of the summary information and a user characteristic for each level of the summary information; generating at least one summary information dataset corresponding to each level of the summary information; and combining the at least one summary information dataset with corresponding E-book data. | 01-24-2013 |
20130169689 | METHOD AND APPARATUS FOR DISPLAYING DIGITAL MAP IN CLIENT - A method and apparatus for displaying a digital map in a client is provided. The method includes determining a part to be magnified and displayed on the digital map, displaying a magnified map image corresponding to the determined part, receiving information about the magnified map image from a server, and displaying the information received from the server on the magnified map image. | 07-04-2013 |
20140195951 | METHOD FOR MANAGING SCHEDULE AND ELECTRONIC DEVICE THEREOF - A method for controlling an electronic device is provided. The method includes detecting a first schedule and a second schedule, detecting at least one task, detecting at least one location corresponding to the task within a threshold distance of a location associated with the first schedule and a location associated with the second schedule, calculating an estimated time to travel from the location associated with the first schedule to the location associated with the second schedule using the at least one detected location, comparing the calculated estimated time with a time difference between a completion time of the first schedule and a start time of the second schedule, and outputting information about the at least one detected location when the calculated estimated time is smaller than the time difference. | 07-10-2014 |
20140215364 | METHOD AND ELECTRONIC DEVICE FOR CONFIGURING SCREEN - A device and method for configuring a screen of an electronic device are provided. The method of configuring the screen of the electronic device includes determining an area for displaying a first object, displaying a first area for displaying the first object, moving at least one second object to a remaining area if there is at least one second object on the first area, the remaining area being an area other than the first area, and displaying the first object on the first area after moving the at least one second object to the remaining area. | 07-31-2014 |
20140237412 | METHOD AND ELECTRONIC DEVICE FOR DISPLAYING VIRTUAL KEYPAD - A method and an electronic device for controlling a virtual keypad are provided. The method for displaying the virtual keypad of the electronic device includes detecting execution of an application allowing text input, detecting at least one touch subject within a threshold distance of a touch screen, and when detecting at least one touch subject within the threshold distance of the touch screen, displaying a virtual keypad. | 08-21-2014 |
20140267115 | METHOD FOR CONTROLLING DISPLAY FUNCTION AND AN ELECTRONIC DEVICE THEREOF - A method and apparatus for zooming in/out and displaying display information in an electronic device are provided. The method includes detecting an angle according to a touch movement and zooming in/out display information based on the angle according to the touch movement. | 09-18-2014 |
20140306905 | METHOD FOR ADJUSTING DISPLAY AREA AND ELECTRONIC DEVICE THEREOF - A method for adjusting a display area and an electronic device are provided. The method may include, detecting a gesture for setting an inactive area in an active area of a display, identifying a size and a location of an inactive area to set, and designating part of the active area as the inactive area based on the identified size and location of the virtual inactive area. | 10-16-2014 |
20140329509 | METHOD FOR CONTROLLING STATUS INFORMATION AND AN ELECTRONIC DEVICE THEREOF - An apparatus and a method for controlling status information in an electronic device are provided. The method for controlling the status information in the electronic device includes checking status information of other electronic device using a signal received from the other electronic device, determining control information corresponding to the status information, and displaying the control information. | 11-06-2014 |
20140380194 | CONTENTS SHARING SERVICE - A method and device for sharing content on an electronic device are provided. The electronic device includes a display and a processor. The processor is configured to display content on the display, display input of at least one of an image and text to the display, at least one of the image and the text being overlapped with at least a portion of the content, and transmit information representing the input along with information representing the content. | 12-25-2014 |
20150018012 | METHOD OF PROVIDING LOCATION BASED SERVICE AND ELECTRONIC DEVICE THEREOF - A method and an apparatus for providing a location based service in an electronic device are provided. The method includes classifying location information of the electronic device having a similar characteristic into a category and mapping an operation of the electronic device according to the category. | 01-15-2015 |
20150243150 | NOTIFICATION METHOD AND ELECTRONIC DEVICE - An operation method and a device related to emergency situations are provided. A method for controlling an electronic device includes determining a designated situation, based on at least one piece of information obtained from outside the electronic device and information obtained from at least one sensor of the electronic device, determining features corresponding to the designated situation, and controlling the electronic device, based on at least one of the features and user status information. | 08-27-2015 |
20150244665 | APPARATUS AND METHOD FOR TRANSMITTING MESSAGE - A method for transmitting a message to at least one device by an electronic device is provided. The method includes determining status information of at least one device connected with the electronic device, generating a message, based on the status information of the at least one device, and transmitting the message to the at least one device. | 08-27-2015 |
20150310769 | METHOD AND APPARATUS FOR DISPLAYING DIGITAL MAP IN CLIENT - A method and apparatus for displaying a digital map in a client is provided. The method includes determining a part to be magnified and displayed on the digital map, displaying a magnified map image corresponding to the determined part, receiving information about the magnified map image from a server, and displaying the information received from the server on the magnified map image. | 10-29-2015 |
20160077711 | METHOD AND ELECTRONIC DEVICE FOR PROVIDING INFORMATION - According to an embodiment of the present disclosure, a method for providing information by an electronic device comprises recognizing at least one object from an image displayed on a screen of the electronic device, displaying at least one primary information item associated with the recognized object, and when at least one of the at least one primary information item is selected, displaying a secondary information item associated with the selected primary information item on the screen. Other various embodiments are also provided herein. | 03-17-2016 |
20160112839 | DEVICE SEARCHING METHOD AND ELECTRONIC DEVICE SUPPORTING THE SAME - An electronic device is provided. The electronic device includes a first communication module configured to support a first communication method, a second communication module configured to support a second communication method, a memory configured to store data used for operations of the first communication module and the second communication module, and a processor electrically connected to the first communication module, the second communication module, and the memory. | 04-21-2016 |
Patent application number | Description | Published |
20140185389 | MEMORY SYSTEMS INCLUDING AN INPUT/OUTPUT BUFFER CIRCUIT - Memory systems are provided. A memory system may include a plurality of nonvolatile memories and a memory controller configured to control the plurality of nonvolatile memories. Moreover, the memory system may include an input/output buffer circuit connected between the memory controller and the plurality of nonvolatile memories. A data channel may be connected between the memory controller and the input/output buffer circuit, and first and second internal data channels may be connected between the input/output buffer circuit and respective first and second groups of the plurality of nonvolatile memories. The input/output buffer circuit may be configured to connect the data channel to one of the first and second internal data channels. | 07-03-2014 |
20150294977 | NONVOLATILE MEMORY DEVICE - A nonvolatile memory device includes a memory cell array including a plurality of cell strings each having a plurality of memory cells stacked in a direction perpendicular to a substrate, and a peripheral circuit region including a plurality of transistors electrically connected to the memory cell array through a plurality of conductive lines. Each of the transistors includes a gate electrode crossing an active region of the substrate in a first direction and source and drain regions in the active region at the opposite sides of the gate electrode. In at least one of the transistors, the number of source contact plugs connected to the source region is different from the number of drain contact plugs connected to the drain region. | 10-15-2015 |
20150364173 | STORAGE DEVICE INCLUDING NONVOLATILE MEMORY AND MEMORY CONTROLLER AND OPERATING METHOD OF RETIMING CIRCUIT INTERFACING COMMUNICATION BETWEEN NONVOLATILE MEMORY AND MEMORY CONTROLLER - A storage device includes a nonvolatile memory, and a memory controller adapted to control the nonvolatile memory and to transmit a first timing signal to the nonvolatile memory at a read operation. The nonvolatile memory includes a nonvolatile memory device adapted to output read data and a second timing signal in response to the first timing signal, and a retiming circuit adapted to detect a locking delay according to the first timing signal, to produce a third timing signal from the second timing signal using the detected locking delay, to retime the read data by latching the read data in synchronization with the third timing signal and to output the third timing signal and the retimed read data to the memory controller. | 12-17-2015 |
20150378885 | SOLID STATE DRIVING INCLUDING NONVOLATILE MEMORY, RANDOM ACCESS MEMORY AND MEMORY CONTROLLER - A solid state drive includes a nonvolatile memory, a random access memory, and a memory controller. The nonvolatile memory contains a plurality of nonvolatile memories chips and a buffer chip. The memory controller is formed of an internal bus, a host interface, a memory interface, a buffer control circuit, and a processor. | 12-31-2015 |
20160117110 | MEMORY SYSTEMS INCLUDING AN INPUT/OUTPUT BUFFER CIRCUIT - Memory systems are provided. A memory system may include a plurality of nonvolatile memories and a memory controller configured to control the plurality of nonvolatile memories. Moreover, the memory system may include an input/output buffer circuit connected between the memory controller and the plurality of nonvolatile memories. A data channel may be connected between the memory controller and the input/output buffer circuit, and first and second internal data channels may be connected between the input/output buffer circuit and respective first and second groups of the plurality of nonvolatile memories. The input/output buffer circuit may be configured to connect the data channel to one of the first and second internal data channels. | 04-28-2016 |
Patent application number | Description | Published |
20090168549 | Data output buffer circuit and semiconductor memory device includig the same - The example embodiments provide a data output buffer circuit which includes a pre-driver configured to adjust a slew rate of an input signal, a main driver configured to output signal supplied from the pre-driver, and a ZQ calibration circuit configured to control the pre-driver so as to decrease the slew rate when an operation voltage increases, and increase the slew rate when the operation voltage is decreased. | 07-02-2009 |
20110205832 | ON-DIE TERMINATION CIRCUIT, MEMORY DEVICE, MEMORY MODULE, AND METHOD OF OPERATING AND TRAINING AN ON-DIE TERMINATION - An on-die termination (ODT) circuit of a memory device comprising: a memory device having a memory core having a memory cell array; a data input/output pin connected to the memory core through a data buffer; and an on-die termination (ODT) circuit, comprising: a termination circuit configured to provide a termination impedance at the input/output data pin, the termination circuit having a switching device that selectively connects a termination impedance to the input/output data pin based on the presence of an asynchronous control signal (ACS), wherein the ACS is generated based on the presence of a memory WRITE command. The memory device may further comprise a training circuit comprising: an asynchronous signal delay configured to delay the signal path of the ACS signal to the termination circuit; and a comparing unit configured to compare a phase difference between the ACS signal and a reference signal, the comparing unit comprising a phase detector and a replica delay, wherein the replica delay is configured to delay the signal path of the ACS signal to the phase detector, and the phase detector is configured to output the phase difference as training result. | 08-25-2011 |
20120250433 | MEMORY DEVICES, SYSTEMS AND METHODS EMPLOYING COMMAND/ADDRESS CALIBRATION - During a command/address calibration mode, a memory controller may transmit multiple cycles of test patterns as signals to a memory device. Each cycle of test pattern signals may be transmitted at an adjusted relative phase with respect to a clock also transmitted to the memory device. The memory device may input the test pattern signals at a timing determined by the clock, such as rising and/or falling edges of the clock. The test pattern as input by the memory device may be sent to the memory controller to determine if the test pattern was successfully transmitted to the memory device during the cycle. Multiple cycles of test pattern transmissions are evaluated to determine a relative phase of command/address signals with respect to the clock for transmission during operation of the system. | 10-04-2012 |
20130099823 | OUTPUT DRIVER, DEVICES HAVING THE SAME, AND GROUND TERMINATION - An integrated circuit comprising an output driver including an output terminal, and a receiving circuit including a termination resistor connected between the output terminal and a ground. The output driver comprising a first NMOS transistor configured to pull up a voltage of the output terminal to a pull-up voltage in response to a pull-up signal, and a second NMOS transistor configured to pull down the output terminal to a ground voltage in response to a pull-down signal. | 04-25-2013 |
20130182513 | MEMORY SYSTEM CAPABLE OF CALIBRATING OUTPUT VOLTAGE LEVEL OF SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CALIBRATING OUTPUT VOLTAGE LEVEL OF SEMICONDUCTOR MEMORY DEVICE - Provided are a semiconductor memory device and a memory system including the same, which may calibrate a level of an output voltage in consideration of channel environment and a mismatch in on-die termination (ODT) resistance of a memory controller. The memory system includes a memory controller and a semiconductor memory device. The semiconductor memory device is configured to generate a reference voltage based on driving information of the memory controller, and calibrate an output voltage level based on a reference voltage when the semiconductor memory device is electrically connected to the memory controller. | 07-18-2013 |
20130182524 | SEMICONDUCTOR MEMORY DEVICES HAVING INTERNAL CLOCK SIGNALS AND MEMORY SYSTEMS INCLUDING SUCH MEMORY DEVICES - A semiconductor memory device has a clock input buffer that is turned ‘on’ or ‘off’ in response to a first control signal. The clock input buffer is configured to buffer an external clock signal in order to output a buffered clock signal. The memory device further includes an internal clock generator that is configured to generate an internal clock signal in response to the buffered clock signal. The generation of the internal clock signal is started in response to a second control signal. | 07-18-2013 |
20130201765 | POWER MIXING CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME - A power mixing circuit capable of maintaining a stable output voltage in a deep-power- down mode is provided. The power mixing circuit includes an input buffer, a power mixing control circuit, a power mixing driver and an output buffer. The input buffer is configured to operate using a first supply voltage, and to generate a first voltage signal in response to an input signal. The power mixing control circuit is configured to generate a power mixing control signal based on a power-up signal and a deep-power-down mode signal. The power mixing driver is configured to operate using an external supply voltage and a second supply voltage, to perform power mixing on the external supply voltage and the second supply voltage, and to generate a second voltage signal. The output buffer is configured to operate using the second supply voltage, and to generate an output signal. | 08-08-2013 |
20130257534 | INPUT RECEIVER CIRCUIT HAVING SINGLE-TO-DIFFERENTIAL AMPLIFIER, AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - An input receiver circuit including a single-to-differential amplifier and a semiconductor device including the input receiver circuit are disclosed. The input receiver circuit includes a first stage amplifier unit and a second stage amplifier unit. The first stage amplifier unit amplifies a single input signal in a single-to-differential mode to generate a differential output signal, without using a reference voltage. The second stage amplifier unit amplifies the differential output signal in a differential-to-single mode to generate a single output signal. | 10-03-2013 |
20140286119 | MEMORY DEVICES, SYSTEMS AND METHODS EMPLOYING COMMAND/ADDRESS CALIBRATION - During a command/address calibration mode, a memory controller may transmit multiple cycles of test patterns as signals to a memory device. Each cycle of test pattern signals may be transmitted at an adjusted relative phase with respect to a clock also transmitted to the memory device. The memory device may input the test pattern signals at a timing determined by the clock, such as rising and/or falling edges of the clock. The test pattern as input by the memory device may be sent to the memory controller to determine if the test pattern was successfully transmitted to the memory device during the cycle. Multiple cycles of test pattern transmissions are evaluated to determine a relative phase of command/address signals with respect to the clock for transmission during operation of the system. | 09-25-2014 |
20150016202 | MEMORY DEVICES, SYSTEMS AND METHODS EMPLOYING COMMAND/ADDRESS CALIBRATION - During a command/address calibration mode, a memory controller may transmit multiple cycles of test patterns as signals to a memory device. Each cycle of test pattern signals may be transmitted at an adjusted relative phase with respect to a clock also transmitted to the memory device. The memory device may input the test pattern signals at a timing determined by the clock, such as rising and/or falling edges of the clock. The test pattern as input by the memory device may be sent to the memory controller to determine if the test pattern was successfully transmitted to the memory device during the cycle. Multiple cycles of test pattern transmissions are evaluated to determine a relative phase of command/address signals with respect to the clock for transmission during operation of the system. | 01-15-2015 |
20150262649 | MEMORY DEVICES, SYSTEMS AND METHODS EMPLOYING COMMAND/ADDRESS CALIBRATION - During a command/address calibration mode, a memory controller may transmit multiple cycles of test patterns as signals to a memory device. Each cycle of test pattern signals may be transmitted at an adjusted relative phase with respect to a clock also transmitted to the memory device. The memory device may input the test pattern signals at a timing determined by the clock, such as rising and/or falling edges of the clock. The test pattern as input by the memory device may be sent to the memory controller to determine if the test pattern was successfully transmitted to the memory device during the cycle. Multiple cycles of test pattern transmissions are evaluated to determine a relative phase of command/address signals with respect to the clock for transmission during operation of the system. | 09-17-2015 |