Patent application number | Description | Published |
20100132045 | APPARATUS AND METHOD FOR RIGHT MANAGEMENT OF DIGITAL CONTENTS - Disclosed is an apparatus for right management of digital contents includes: a digital right manager that creates a usage right of digital contents on the basis of received right information; and a contents manager that provides the digital contents in accordance with the created usage right, wherein the contents manager includes a contents packing unit that receives the usage right created from the digital right manager, and extracts and packages components of the digital contents in accordance with the usage right, and a contents providing unit that receives packaged digital contents created from the contents packaging unit and provides the digital contents to a contents using device. | 05-27-2010 |
20100142802 | APPARATUS FOR CALCULATING 3D SPATIAL COORDINATES OF DIGITAL IMAGES AND METHOD THEREOF - Provided is a digital photographing apparatus including: an image acquiring unit that acquires images by photographing a subject; a sensor information acquiring unit that acquires positional information, directional information, and posture information of the digital photographing apparatus at the time of photographing a subject; a device information acquiring unit that acquires device information of the digital photographing apparatus at the time of photographing a subject; and a spatial coordinates calculator that calculates 3D spatial coordinates for photographed images using the acquired positional information, directional information, posture information, and device information. | 06-10-2010 |
20100162411 | APPARATUS AND METHOD FOR MANAGING HYBRID CONTENTS GENERATED BY COMBINING MULTIMEDIA INFORMATION AND GEOSPATIAL INFORMATION - An apparatus for managing hybrid contents generated by combining multimedia information and geospatial information includes an input/output unit that is connected with a contents storage and a contents using device to control input/output of the hybrid contents; a structure calculating unit that generates the hybrid contents having a layer structure using an XML format by interconnecting the multimedia information having the layer structure using the XML format provided from the input/output unit and the geospatial information having the layer structure using the XML format; and a relationship establishing unit that is connected with the input/output unit or the structure calculating unit to establish and provide the relationship of the multimedia information having the layer structure, the geospatial information having the layer structure, and the hybrid contents. | 06-24-2010 |
Patent application number | Description | Published |
20130019899 | DISHWASHER AND CONTROL METHOD THEREOF - The present invention relates to a dishwasher and a control method thereof. According to one aspect, the dishwasher which washes dishes according to washing, rinsing, and drying steps comprises: a tub which is provided with a rack for accommodating dishes, and a washing nozzle for spraying washing water; a sump in which the washing water supplied to the tub is collected; a filter device which is provided to the sump, and allowing foreign substances of the washing water to be filtered; and a cleaning unit which clears away the foreign substances accumulated in the filter device. | 01-24-2013 |
20130056040 | DISH WASHER - Provided is a dish washer. The dish washer includes a tub configured to accommodate dishes, a sump configured to supply water to the tub, and a water supply device configured to supply water received from an outer source to the sump or the tub. The water supply device includes a body and a plurality of discharge parts. The body includes a water supply passage along which water supplied from an outer source flows and a water chamber in which water supplied through the water supply passage is stored. Water is discharged from the water supply passage to the water chamber through the discharge parts. | 03-07-2013 |
20140182625 | Dishwasher and Method of Controlling the Same - The present invention relates to a dishwasher that can save wash water for cleaning and a method of controlling the dishwasher. A method of controlling a dishwasher according to an exemplary embodiment of the present invention is a method of controlling a dishwasher having a circulation channel through which wash water is supplied to wash a plurality of arms by a wash pump after collecting the wash water, sprayed in to a tub from the plurality of wash arms, in a sump, and the method includes: performing a first water-supplying for supplying a predetermined amount of wash water into the dishwasher by opening a water supply valve; performing a first washing where the plurality of wash arms spray the wash water into the tub to be circulated by operating the wash pump; performing a first draining for saving recycling wash water as much as the volume of the circulation channel and draining the rest of the wash water to the outside of the dishwasher by operating the wash pump and the drain pump; and performing a second water-supplying for supplying the amount of wash water except the amount of the recycling wash water from a predetermined amount of wash water into the dishwasher by opening the water supply valve. | 07-03-2014 |
Patent application number | Description | Published |
20090086525 | Multi-layered memory devices - A multi-layered memory device is provided. The multi-layered memory device includes two or more memory units and an active circuit unit arranged between each of the two or more memory units. The active circuit includes a decoder. Each memory unit includes one or more memory layers. Each memory layer includes a memory array. | 04-02-2009 |
20090283763 | Transistors, semiconductor devices and methods of manufacturing the same - A transistor having a self-align top gate structure and methods of manufacturing the same are provided. The transistor includes an oxide semiconductor layer having a source region, a drain region, and a channel region between the source region and the drain region. The transistor further includes a gate insulating layer and a gate electrode, which are sequentially stacked on the channel region. Semiconductor devices including at least one transistor and methods of manufacturing the same are also provided. | 11-19-2009 |
20090315590 | Logic circuits, inverter devices and methods of operating the same - An inverter device includes at least a first transistor connected between a power source node and ground. The first transistor includes a first gate and a first terminal that are internally capacitive-coupled to control a boost voltage at a boost node. The first terminal is one of a first source and a first drain of the first transistor. | 12-24-2009 |
20090321738 | Display apparatus using oxide diode - Provided may be a display apparatus that uses oxide diodes having a nano rod structure, for example, nano-rod diodes formed of a ZnO group material. The display apparatus may include a substrate, a thin film transistor layer on the substrate, and a light emitting layer on the thin film transistor layer, wherein the light emitting layer may include a plug metal layer on the thin film transistor layer, a plurality of nano-rod diodes vertically formed on the plug metal layer, and a transparent electrode on the nano-rod diodes. | 12-31-2009 |
20100079169 | Inverter, method of operating the same and logic circuit comprising inverter - Provided are an inverter, a method of operating the inverter, and a logic circuit including the inverter. The inverter may include a load transistor and a driving transistor, and at least one of the load transistor and the driving transistor may have a double gate structure. A threshold voltage of the load transistor or the driving transistor may be adjusted by the double gate structure, and accordingly, the inverter may be an enhancement/depletion (E/D) mode inverter. | 04-01-2010 |
20100085821 | Operation method of non-volatile memory - Example embodiments provide a method of operating a non-volatile memory in which the non-volatile memory may only be changed from a first state to a second state and may not be changed from the second state to the first state during a programming operation. | 04-08-2010 |
20100332783 | SEMICONDUCTOR DEVICE HAVING MULTI ACCESS LEVEL AND ACCESS CONTROL METHOD THEREOF - An access control method of a semiconductor device includes providing an inputted password as an input of a hash operator; performing a hash operation in the hash operator and outputting a first hash value; controlling the hash operator so that the hash operation is repeatedly performed in the hash operator by providing the first hash value as an input of the hash operator when the first hash value and a second hash value stored in a nonvolatile memory do not coincide; and setting an access level with respect to the inner circuit according to the repetition number of times of the hash operation of the hash operator when the first and second hash values coincide. | 12-30-2010 |
20110089998 | Logic circuits, inverter devices and methods of operating the same - An inverter device includes at least a first transistor connected between a power source node and ground. The first transistor includes a first gate and a first terminal that are internally capacitive-coupled to control a boost voltage at a boost node. The first terminal is one of a first source and a first drain of the first transistor. | 04-21-2011 |
20110116297 | Multi-layered memory devices - A multi-layered memory device is provided. The multi-layered memory device includes two or more memory units and an active circuit unit arranged between each of the two or more memory units. The active circuit includes a decoder. Each memory unit includes one or more memory layers. Each memory layer includes a memory array. | 05-19-2011 |
20110116336 | Multi-layered memory devices - A multi-layered memory device is provided. The multi-layered memory device includes two or more memory units and an active circuit unit arranged between each of the two or more memory units. The active circuit includes a decoder. Each memory unit includes one or more memory layers. Each memory layer includes a memory array. | 05-19-2011 |
20110175647 | Method of operating inverter - A method of operating inverter may include providing a load transistor and a driving transistor connected to the load transistor wherein at least one of the load transistor and the driving transistor has a double gate structure, and varying a threshold voltage of the at least one of the load transistor and the driving transistor having the double gate structure. A threshold voltage of the load transistor or the driving transistor may be adjusted by the double gate structure, and accordingly, the inverter may be an enhancement/depletion (E/D) mode inverter. | 07-21-2011 |
20140219445 | Processors Including Key Management Circuits and Methods of Operating Key Management Circuits - A system on chip includes a central processing unit and a key manager coupled to the central processing unit. The key manager includes a random number generator configured to generate a key and a key memory configured to store the key and a user setting value associated with the key. | 08-07-2014 |