Hung-Jen
Hung-Jen Chang, Taipei TW
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20100247224 | INK FEEDER FOR FELT-TIP INK PEN - An ink feeder for a felt-tip ink pen and communicable with an ink reservoir defined in the ink pen includes a main body made of a rigid material to internally define a feeding bore; a plurality of micro raised portions radially inward protruded from and circumferentially spaced along an inner wall surface of the main body for clamping a felt tip of the ink pen in place; and a plurality of ink feeding clearances each being formed between two adjacent ones of the micro raised portions and communicable with the feeding bore, so that ink stored in the ink reservoir of the ink pen is fed to the felt tip via the ink feeding clearances. The rigid main body and other ink pen components can be assembled to form the ink pen in an automated manner, and the ink feeding clearances ensure smooth ink feeding without the risk of leakage. | 09-30-2010 |
Hung-Jen Chang, Taipei City TW
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20140003855 | RETRACTABLE WRITING AND ERASING PIECE AGAINST SLIDING BACK | 01-02-2014 |
20150015035 | STORAGE CHAIR - A storage chair includes a cylindrical chair body and a cover body. The cylindrical chair body has a closed end and an opening end opposite to each other, and an accommodation space is formed in the cylindrical chair body between the closed end and the opening end. The cover body removably covers the opening end of the cylindrical chair body. The accommodation space of the cylindrical chair body can be used for accommodating substances to be stored, and is covered by the cover body, which enables the chair to have functions both of seating and storage. | 01-15-2015 |
Hung-Jen Chou, New Taipei City TW
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20110244168 | MOUSE PAD - A mouse pad includes a fabric and a flat pad. The pad has an upper surface and a lower surface corresponding to each other, and an edge is along the periphery of the upper and lower surfaces. The fabric is smoothly and flatly covered on the upper surface, the lower surface, and the edge smoothly and flatly. Thus, by completely covering the upper surface, the lower surface and the edge of the pad, formation of deckle edge or falling off of the fabric to expose the product defect due to lack of durability. | 10-06-2011 |
Hung-Jen Chu, Jhongli City TW
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20100253875 | Position tuning structure and adjustable optical film device comprising the same - A position tuning structure is disclosed, which comprises a holding tube having a side hole extending through the wall of the holding tube; a nut locating in the holding tube and connecting to the side hole; a tuning element threadedly engaged in the nut; an elastic rod locating in the holding tube and pushed by the tuning element; a supporting element locating in the holding tube and pushed by the elastic rod; and an elastic element locating in the holding tube and connecting to the supporting element. Also, an adjustable optical film device comprising the above position tuning structure is disclosed. | 10-07-2010 |
Hung-Jen Hsu, New Taipei City TW
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20150070226 | WRIST-WORN COMMUNICATION DEVICE - A communication device, including a device casing, an external connection element, and a first metal element, is provided. A ground element and an antenna element are disposed in the device casing. The ground element has a first edge, a second edge, and a first connection point. The first edge and the second edge are opposite to each other. The first connection point is disposed near or at the second edge. The antenna element is disposed near the first edge. The external connection element is formed by a non-conductive material and is outside the device casing. The external connection element has a belt-like structure and is combined with the device casing to substantially form a loop structure. The first metal element is supported by the external connection element and is coupled to the first connection point of the ground element. | 03-12-2015 |
20150162659 | COMMUNICATION DEVICE AND ANTENNA ELEMENT THEREIN - A communication device including a ground element and an antenna element is provided. The antenna element is disposed adjacent to an edge of the ground element. The antenna element includes a loop metal element and a branch metal element. The loop metal element has a first end and a second end. The first end is coupled to a signal source. The second end is coupled to the ground element. The loop metal element includes a first segment and a second segment. The first segment is separated from the second segment by a gap. The first segment includes the first end, and the second segment includes the second end. The branch metal element has a third end and a fourth end. The third end is coupled through an inductive element to a connection point on the loop metal element. The fourth end is open. | 06-11-2015 |
Hung-Jen Huang, Nantou TW
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20130075316 | METHOD OF TREATING WATER POLLUTANT - A water pollutant processing method to adsorb, oxidize and activate water pollutants includes using an adsorbent with low oxidation number (zeolite), an activator (from industrial wastes, such as BF slags and BOF slags) and a persulfate to process polluted water and underground water. The method includes an integrated processing system including the persulfate, adsorbent with low oxidation number and iron-containing activator. The integrated processing system not only possesses an adsorbing capability, but also an oxidizing capability using transition metal such as iron on the surface of the activator. The system can not only accelerate removal of water pollutants, but also delay movement of the pollutants to further reduce threat of pollutant spreading to downstream. BF and BOF slags are industrial wastes and the present invention also provides a channel for reusing the wastes. | 03-28-2013 |
Hung-Jen Huang, Xizhi City TW
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20120009281 | PLANT EXTRACTS FOR TREATING SKIN DISORDERS AND ENHANCING HEALING OF WOUNDS FOR DIABETIC PATIENTS - The present invention provides a pharmaceutical composition for treating skin disorders, including enhancing the healing of wounds for diabetic patients. Specifically, this invention relates to the use of the extracts of | 01-12-2012 |
Hung-Jen Lai, Taipei City TW
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20150157473 | METHOD FOR AUTOMATICALLY ADJUSTING A DAMPING LEVEL PROVIDED BY AN ARTIFICIAL KNEE JOINT, AND THE ARTIFICIAL KNEE JOINT - An artificial knee joint is to be connected between a prosthetic thigh and a prosthetic lower leg. The artificial knee joint includes a knee joint body, a processor mounted in the knee joint body, a damping unit that is coupled to the processor and configurable to provide various damping levels, and an accelerometer coupled to the processor. The accelerometer is configured to measure acceleration subjected to the artificial knee joint, and to generate and transmit a measuring signal according to the measurement to the processor. The processor is configured to control the damping unit to provide one of the damping levels, based on the measuring signal. | 06-11-2015 |
Hung-Jen Lee, Taipei City TW
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20120194301 | CAPACITIVE COUPLER PACKAGING STRUCTURE - Embodiments of the present invention provide a capacitive coupler packaging structure including a substrate with at least one capacitor and a receiver formed thereon, wherein the at least one capacitor at least includes a first electrode layer, a second electrode layer and a capacitor dielectric layer therebetween, and the first electrode layer is electrically connected to the receiver via a solder ball. The capacitive coupler packaging structure also includes a transmitter electrically connecting to the capacitor. | 08-02-2012 |
20120313222 | CHIP PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF - An embodiment of the present invention provides a manufacturing method of a chip package structure including: providing a first substrate having a plurality of predetermined scribe lines defined thereon, wherein the predetermined scribe lines define a plurality of device regions; bonding a second substrate to the first substrate, wherein a spacing layer is disposed therebetween and has a plurality of chip support rings located in the device regions respectively and a cutting support structure located on peripheries of the chip support rings, and the spacing layer has a gap pattern separating the cutting support structure from the chip support rings; and cutting the first substrate and the second substrate to form a plurality of chip packages. Another embodiment of the present invention provides a chip package structure. | 12-13-2012 |
20120313261 | CHIP PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF - An embodiment of the present invention provides a manufacturing method of a chip package structure including: providing a first substrate having a plurality of predetermined scribe lines defining a plurality of device regions; bonding a second substrate to the first substrate, wherein a spacing layer is disposed therebetween and has a plurality of chip support rings located in the device regions respectively, a cutting support structure located on peripheries of the chip support rings, a plurality of stop rings surrounding the chip support rings respectively, wherein a gap pattern separating the stop rings from the cutting support structure and the chip support rings; and cutting the first substrate and the second substrate to form a plurality of chip packages. Another embodiment of the present invention provides a chip package structure. | 12-13-2012 |
20130207240 | CHIP PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF - An embodiment of the present invention provides a manufacturing method of a chip package structure including: providing a first substrate having a plurality of predetermined scribe lines defined thereon, wherein the predetermined scribe lines define a plurality of device regions; bonding a second substrate to the first substrate, wherein a spacing layer is disposed therebetween and has a plurality of chip support rings located in the device regions respectively and a cutting support structure located on peripheries of the chip support rings, and the spacing layer has a gap pattern separating the cutting support structure from the chip support rings; and cutting the first substrate and the second substrate to form a plurality of chip packages. Another embodiment of the present invention provides a chip package structure. | 08-15-2013 |
20140264771 | CHIP PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF - An embodiment of the present invention provides a manufacturing method of a chip package structure including: providing a first substrate having a plurality of predetermined scribe lines defined thereon, wherein the predetermined scribe lines define a plurality of device regions; bonding a second substrate to the first substrate, wherein a spacing layer is disposed therebetween and has a plurality of chip support rings located in the device regions respectively and a cutting support structure located on peripheries of the chip support rings, and the spacing layer has a gap pattern separating the cutting support structure from the chip support rings; and cutting the first substrate and the second substrate to form a plurality of chip packages. Another embodiment of the present invention provides a chip package structure. | 09-18-2014 |
Hung-Jen Lin, Yanpu Township TW
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20140002857 | DOCUMENT SCANNING METHOD AND COMPUTER PROGRAM FOR CONTROLLING SCANNING APPARATUS | 01-02-2014 |
Hung-Jen Lin, Tainan City TW
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20130075139 | Formation of Connectors without UBM - A device includes a substrate, a metal pad over the substrate, and a passivation layer having a portion over the metal pad. A post-passivation interconnect (PPI) is electrically coupled to the metal pad, wherein the PPI includes a portion over the metal pad and the passivation layer. A polymer layer is over the PPI. A solder ball is over the PPI. A compound includes a portion adjoining the solder ball and the polymer layer, wherein the compound includes flux and a polymer. | 03-28-2013 |
20130187269 | PACKAGE ASSEMBLY AND METHOD OF FORMING THE SAME - A package assembly including a semiconductor die electrically coupled to a substrate by an interconnected joint structure. The semiconductor die includes a bump overlying a semiconductor substrate, and a molding compound layer overlying the semiconductor substrate and being in physical contact with a first portion of the bump. The substrate includes a no-flow underfill layer on a conductive region. A second portion of the bump is in physical contact with the no-flow underfill layer to form the interconnected joint structure. | 07-25-2013 |
20130270705 | Semiconductor Device Packages and Methods - Semiconductor devices packages and methods are disclosed. In one embodiment, a package for a semiconductor device includes a substrate and a contact pad disposed on a first surface of the substrate. The contact pad has a first side and a second side opposite the first side. A conductive trace is coupled to the first side of the contact pad, and an extension of the conductive trace is coupled to the second side of the contact pad. A plurality of bond pads is disposed on a second surface of the substrate. | 10-17-2013 |
20140183725 | POST-PASSIVATION INTERCONNECT STRUCTURE AND METHOD OF FORMING THE SAME - A semiconductor device includes a passivation layer formed on a semiconductor substrate, a protective layer overlying the passivation layer and having an opening, an interconnect structure formed in the opening of the protective layer, a bump formed on the interconnect structure, and a molding compound layer overlying the interconnect structure and being in physical contact with a lower portion of the bump. | 07-03-2014 |
20140252558 | Methods and Apparatus for Wafer Level Packaging - A semiconductor device comprises a substrate, a bond pad above the substrate, a guard ring above the substrate, and an alignment mark above the substrate, between the bond pad and the guard ring. The device may comprise a passivation layer on the substrate, a polymer layer, a post-passivation interconnect (PPI) layer in contact with the bond pad, and a connector on the PPI layer, wherein the connector is between the bond pad and the guard ring, and the alignment mark is between the connector and the guard ring. The alignment mark may be at the PPI layer. There may be multiple alignment marks at different layers. There may be multiple alignment marks for the device around the corners or at the edges of an area surrounded by the guard ring. | 09-11-2014 |
20150179522 | Methods and Apparatus for Wafer Level Packaging - A semiconductor device includes a substrate, a bond pad above the substrate, a guard ring above the substrate, and an alignment mark above the substrate, between the bond pad and the guard ring. The device may include a passivation layer on the substrate, a polymer layer, a post-passivation interconnect (PPI) layer in contact with the bond pad, and a connector on the PPI layer, wherein the connector is between the bond pad and the guard ring, and the alignment mark is between the connector and the guard ring. The alignment mark may be at the PPI layer. There may be multiple alignment marks at different layers. There may be multiple alignment marks for the device around the corners or at the edges of an area surrounded by the guard ring. | 06-25-2015 |
20150235989 | SUBSTRATE DESIGN FOR SEMICONDUCTOR PACKAGES AND METHOD OF FORMING SAME - An embodiment device package includes first die and one or more redistribution layers (RDLs) electrically connected to the first die. The one or more RDLs extend laterally past edges of the first die. The device package further includes one or more second dies bonded to a first surface of the one or more RDLs and a connector element on the first surface of the one or more RDLs. The connector element has a vertical dimension greater than the one or more second dies. A package substrate is bonded to the one or more RDLs using the connector element, wherein the one or more second dies is disposed between the first die and the package substrate. | 08-20-2015 |
20150249066 | METHOD OF FORMING PACKAGE ASSEMBLY - A method of forming a package assembly includes forming a no-flow underfill layer on a substrate. The method further includes attaching a semiconductor die to the substrate. The semiconductor die comprises a bump and a molding compound layer in physical contact with a lower portion of the bump. An upper portion of the bump is in physical contact with the no-flow underfill layer. | 09-03-2015 |
Hung-Jen Liu, Danshuei Township TW
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20080241734 | METHOD OF PATTERN TRANSFER - Pattern transfer is achieved by forming a first patterned hard mask layer with a circuit pattern and a plurality of dummy patterns on a substrate, forming a second pattern mask layer on the substrate, exposing the circuit pattern of the first pattern mask layer, and removing a portion of the substrate exposed by the first patterned mask layer, so as to transfer the circuit pattern to the substrate. | 10-02-2008 |
Hung-Jen Liu, New Taipei City TW
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20140080305 | DOUBLE PATTERNING PROCESS - A double patterning process is described. A substrate having a first area and a second area is provided. A target layer is formed over the substrate. A patterned first photoresist layer is formed over the target layer, wherein the patterned first photoresist layer has openings and has a first thickness in the first area, and at least a portion of the patterned first photoresist layer in the second area has a second thickness less than the first thickness. A second photoresist layer is then formed covering the patterned first photoresist layer and filling in the openings. | 03-20-2014 |
20140134522 | METHOD FOR FORMING QUARTER-PITCH PATTERNS - A method for forming quarter-pitch patterns is described. Two resist layers are formed. The upper resist layer is defined into first patterns. A coating that contains or generates a reactive material making a resist material dissolvable is formed over the lower resist layer and the first patterns. The reactive material is diffused into a portion of each first pattern and portions of the lower resist layer between the first patterns to react with them. The coating is removed. A development step is performed to remove the portions of the first patterns and the portions of the lower resist layer, so that the lower resist layer is patterned into second patterns. Spacers are formed on the sidewalls of the remaining first patterns and the second patterns. The remaining first patterns are removed, and portions of the second patterns are removed using the spacers on the second patterns as a mask. | 05-15-2014 |
Hung-Jen Tsai, Taipei City TW
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20100128831 | CIRCUIT FOR DETECTING CLOCK AND APPARATUS FOR PROVIDING CLOCK - A circuit for detecting a clock has a plurality of first transmission elements, a plurality of first exclusive OR gates and a first AND gate. Each first transmission element is coupled to a last first transmission element for receiving output data, and the data received by each first transmission element is transmitted to an input terminal of a next first transmission element. In addition, the input of a first transmission element is coupled to a clock source for receiving a predetermined clock signal of which a frequency is less than a frequency of a local clock signal. Furthermore, the first and second input terminals of a k | 05-27-2010 |
Hung-Jen Wang, New Taipei City TW
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20140029078 | DEVICES AND METHODS FOR PROTECTING ELECTROMECHANICAL DEVICE ARRAYS - This disclosure provides systems, methods and apparatus for protecting electromechanical systems (EMS) devices from mechanical interference. In one aspect, an array of EMS devices may include one or more regions in which an EMS device is replaced with a spacer structure, such that the overall height of the spacer structure is greater than the height of the surrounding EMS devices. In another aspect, resilient spacer structures can be formed overlying stable portions of an EMS device array. These resilient spacer structures may be formed from a cross-linked organic material. | 01-30-2014 |
Hung-Jen Wang, Taipei County TW
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20090109362 | DISPLAY DEVICE - A display device is provided. The display device includes at least a substrate having a display region and a periphery region, a first ESD circuit and a pad disposed on the periphery region respectively. The pad has a first end near the display region and a second end near an edge of the substrate. A first connection line extended from the first end is electrically connected with a second connection line extended from the ESD circuit. | 04-30-2009 |
20090154628 | SCAN SIGNAL GENERATING CIRCUIT AND SCAN SIGNAL GENERATING METHOD THEREOF - The invention provides scan signal generating circuits and scan signal generating methods thereof. The scan signal generating circuit comprises a first, a second and a third switch and a capacitor, and generates a scan signal driving a pixel. The first switch is turned on to couple an input signal to a first node when a first clock signal is high. The second switch, controlled according to the voltage level at the first node, is turned on to couple a second clock signal that has an inverse phase of the first clock signal to an output terminal of the scan signal generating circuit when the voltage level at the first node is high. When the first clock signal is high, the third switch is turned on to couple the output terminal to a first voltage source. The first node is coupled to ground by the capacitor. | 06-18-2009 |
20100020255 | LIQUID CRYSTAL PANEL - A liquid crystal panel including a bottom substrate, a top substrate and a liquid crystal layer is provided. The bottom substrate includes a base plate, an active array structure layer, a color filter layer with plural colors and plural transparent pixel electrodes. The active array structure layer includes plural transparent bottom electrodes and plural transistor structures, at least one insulation layer, plural scan lines and plural data lines both formed on the base plate. At least one insulation layer covers the transparent bottom electrodes. The color filter layer is formed on the active array structure layer. The transparent pixel electrodes are formed on the color filter layer. Each transparent pixel electrode partially overlaps the corresponding transparent bottom electrodes so as to form plural storage capacitor structures. The top substrate is substantially parallel to the bottom substrate. The liquid crystal layer is located between the top substrate and the bottom substrate. | 01-28-2010 |
Hung-Jen Wang, Xinzhuang City TW
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20100013804 | GATE LINE DRIVING CIRCUIT OF LCD PANEL - A gate line driving circuit comprises a driving chip comprising first and second output ports, a LCD panel comprising first, second and third gate lines, a first switch and a second switch. Two terminals of the first gate line are respectively connected to the first output port and the control terminal of the first switch. Two terminals of the third gate line are respectively connected to the second output port and the control terminal of the second switch. The input terminal of the first switch electrically connects an operating voltage and the output terminal of the first switch electrically connects to the input terminal of the second switch. The output terminal of the second switch electrically connects a ground point, and one terminal of the second gate line is connected to between the output terminal of the first switch and the input terminal of the second switch. | 01-21-2010 |
Hung-Jen Wang, Longtan Township TW
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20130016037 | REDUCING OR ELIMINATING THE BLACK MASK IN AN OPTICAL STACKAANM Wang; Hung-JenAACI Longtan TownshipAACO TWAAGP Wang; Hung-Jen Longtan Township TW - A reflective subpixel array may be formed in which an absorption layer is formed on a back substrate, which may obviate the need for a black mask on a front substrate upon which the reflective subpixel array is formed. In some implementations, the black mask layer may be formed only in post areas on the front substrate. The absorption layer may absorb light that enters between subpixel rows and/or columns. The absorption layer may include at least one highly conductive layer that can form part of the signal routing for the display. Conductive spacers may be formed to connect the conductive absorption layer to a conductive layer of the subpixel array. | 01-17-2013 |
Hung-Jen Wei, Nantou County TW
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20090207382 | Projecting System - A projecting system including a light source module, a flow-conducting member, and a blower is provided. The flow-conducting member includes a hollow body, and at least one part of the light source module is disposed in the body. The body has an inlet and an outlet. The blower is adjacent to the inlet and used for blowing a flow toward the inlet along a first direction. The flow will leave the outlet along a second direction different from the first direction. Utilizing the flow-conducting method and disposition for fans/blowers according to the invention, even if plural light sources are disposed adjacent to each other, the heat generated by the light sources can be effectively dissipated. | 08-20-2009 |
Hung-Jen Wu, Taipei City TW
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20150301620 | METHOD FOR CONTROLLING CURSOR SPEED - The method includes the steps of: a) wiredly connecting a mouse to a docking station; b) connecting the docking station to a handheld computer; c) showing a cursor on the handheld computer; d) manually selecting a parameter; e) determining a numeral value by a formula with the parameter; and f) moving the cursor according to the numeral value. | 10-22-2015 |
20150301621 | METHOD FOR CONTROLLING CURSOR SPEED - The method includes the steps of: a) creating a mouse database in a docking station; b) wiredly connecting a mouse to the docking station; c) connecting the docking station to a handheld computer; d) showing a cursor on the handheld computer; e) the docking station obtaining a model name of the mouse; f) automatically selecting a parameter from the mouse database according to the model name; g) determining a numeral value by a formula with the parameter; and h) moving the cursor according to the numeral value. | 10-22-2015 |
20150301622 | METHOD FOR CONTROLLING CURSOR SPEED - The method includes the steps of: a) wiredly connecting a mouse to the docking station; b) connecting the docking station to a handheld computer; c) showing a cursor on the handheld computer; d) the handheld computer obtaining a model name of the mouse; e) searching internet for specification of the model name of the mouse; f) selecting a parameter from the internet according to the model name; g) determining a numeral value by a formula with the parameter; and h) moving the cursor according to the numeral value. | 10-22-2015 |
Hung-Jen Wu US
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20110140706 | Particle-Based Electrostatic Sensing and Detection - An apparatus and methods for electrostatic-based sensing and detection of charges and charged materials displayed on a surface. In a general embodiment, a method for electrostatically sensing charges or charged materials by comparing the electrostatic interaction between a capture surface and a reference surface. Assays to detect binding or interactions between a capture surface and a material to be detected are also described. We also describe a sensitive and label-free electrostatic readout of DNA or RNA hybridization in a microarray format and using a microfluidic device. The electrostatic properties of the hybridized particles are measured using the positions and motions of charged microspheres. This approach enables sensitive, non-destructive electrostatic imaging. Changes in surface charge density as a result of specific molecular interaction can be detected and quantified with great sensitivity, and in the presence of a complex background. | 06-16-2011 |
Hung-Jen Wu, Yilan TW
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20120005348 | Managing Shared Resources In A Multi-Computer System With Failover Support - Managing shared resources in a multi-computer system with failover support, including: reading priority detection signals from a computer inserted into the multiple-computer system, the priority detection signals representing a priority of the inserted computer; reading planar detection signals from the computer, the planar detection signals representing an insertion state of all computers currently inserted into the multiple-computer system; determining if the computer has the highest priority among all the computers inserted into the multiple-computer system in accordance with the priority detection signals and the planar detection signals; and, in response to determining that the computer has the highest priority, monitoring shared resources and outputting a specific output signal associated with the highest priority computer, the specific output signal providing an identification of the highest priority computer to other computers currently inserted into the multiple-computer system and representing control, by the highest priority computer, of the shared resources. | 01-05-2012 |
Hung-Jen Wu, College Station, TX US
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20140106469 | Nanoparticle Plasmonic Sensor for Localized Surface Plasmon Resonance - The present invention provides a sensor for detecting the binding of molecules to membrane surfaces. The sensor comprises a nanoparticle coated with a continuous layer of silica, and having a ligand attached thereto, for detection of an analyte in a solution. The nanoparticle can be further coated with a continuous membrane, such as a lipid bilayer. | 04-17-2014 |
20150260715 | RAPID DETECTION AND QUANTITATION OF PATHOGEN-SPECIFIC BIOMARKERS USING NANOPOROUS DUAL- OR MULTI-LAYER SILICA FILMS - Improved methods for detecting active tuberculosis are disclosed. A method comprises enriching at least one | 09-17-2015 |
Hung-Jen Yang, Hsinchu City TW
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20090053106 | Autonomous microfluidic apparatus - The present invention relates to an autonomous microfluidic apparatus. The autonomous microfluidic apparatus is substantially a substrate having a microchannel structure arranged thereon. As a microfluid is being filled in a loading well situated upstream of the microchannel structure, the microfluid is affected by interactions between gravity, adhesive force and surface tension and thus driven to flow downstream in the microchannel structure while filling a plurality of manifolds formed in a area situated downstream of the microchannel structure, so that accurate and autonomous quantification and separation of the microfluid using the plural manifolds, each having a specific length, can be achieved and provided for biomedical inspection and analysis. | 02-26-2009 |
20110073038 | GAS DISTRIBUTION PLATE AND APPARATUS USING THE SAME - The present invention provides a gas distribution plate for providing at least two gas flowing channel. In one embodiment, the gas distribution plate has a first flowing channel, at least a second flowing channel disposed around the first flowing channel, and a tapered opening communicating with the first and the second flowing channel. In another embodiment, the gas distribution plate has a first flowing channel passing through a first and a second surface of the gas distribution plate, a second flowing channel paralleling to the first surface and a third flowing channel disposed at the second surface and communicating with the second flowing channel. The ends of the first and the third flowing channel have a tapered opening respectively. Besides, the present further provides a gas distribution apparatus for allowing at least two separate gases to be delivered independently into a process chamber while enabling the gases to be mixed completely after entering the processing chamber. | 03-31-2011 |
20110305846 | APPARATUS AND METHOD FOR SURFACE PROCESSING - The present disclosure provides a surface processing apparatus, comprising a reaction chamber provided to form a deposition layer on a substrate, a carrying chamber connected to the reaction chamber and comprising a slot, and a plasma generator installed in the slot and providing plasma to process the substrate surface. Whereby the disclosure further provides a surface processing method, which flatten surface of a deposition layer on the substrate when the substrate is carried form the reaction chamber to the carrying chamber after the deposition process in the reaction chamber. | 12-15-2011 |