Patent application number | Description | Published |
20130075491 | Sprinkler Structure - A sprinkler structure includes a shell base, a water nozzle, a plurality of spiracles, a water conveyance element, an eccentric gear device, a drive gear device, and a fixing base. The eccentric gear device performs an eccentric movement in responding to an external force, and drives the water conveyance element to perform a reciprocating pivotal turning action. The drive gear device is disposed inside the shell base and is coupled to the eccentric gear device. The drive gear device is driven by the water current to rotate, so that the eccentric gear device drives the water conveyance element to perform the reciprocating pivotal turning action. The water nozzle is driven by the reciprocating pivotal turning action to change the angle of the water outlet surface continuously within an angle range. The fixing base is connected to the water nozzle and the shell base. | 03-28-2013 |
20130075497 | Grip Structure of Water Sprayer - A grip structure of water sprayer comprises a sprayer body, a grip body is extended downward from one end of the sprayer body, a front surface of the grip body is covered with a front grip fitting portion, a fixing structure is disposed on a back surface of the grip body, a back grip fitting portion is fitted on the back surface of the grip body. The back grip fitting portion has a fitting structure to be fitted and engaged with the fixing structure, so that the back grip fitting portion is fitted on the grip body. Accordingly, the back grip fitting portion of the present invention can be dismounted and replaced at will which is convenient for maintenance and usage. | 03-28-2013 |
Patent application number | Description | Published |
20090189183 | DUAL TRIGGERED SILICON CONTROLLED RECTIFIER - The present invention provides a dual triggered silicon controlled rectifier (DTSCR) including: a semiconductor substrate, an N-well, a P-well, a first N+ diffusion region and a first P+ diffusion region, a second N+ diffusion region and a second P+ diffusion region; a third P+ diffusion region, positioned in one side of the DTSCR and across the N-well and the P-well; a third N+ diffusion region, positioned in another side of the DTSCR and across the N-well and the P-well; a first gate, positioned above the N-well between the second and the third P+ diffusion regions, utilized as a P-type trigger node to receive a first trigger current or a first trigger voltage; and a second gate, positioned above the P-well between the first and the third N+ diffusion regions, utilized as an N-type trigger node to receive a second trigger current or a second trigger voltage. | 07-30-2009 |
20100244094 | DUAL TRIGGERED SILICON CONTROLLED RECTIFIER - A dual triggered silicon controlled rectifier (DTSCR) comprises: a semiconductor substrate; a well region, a first N+ diffusion region, a first P+ diffusion region, a second N+ diffusion region, a second P+ diffusion region, a third P+ diffusion region, positioned in one side of the DTSCR and across the well region and semiconductor substrate; a third N+ diffusion region, positioned in another side of the DTSCR and across the well region and the semiconductor substrate; a first gate, positioned above the semiconductor substrate between the first P+ diffusion region and the third P+ diffusion region, utilized as a P-type trigger node to receive a first trigger current or a first trigger voltage; and a second gate, positioned above the well region between the second N+ diffusion region and the third N+ diffusion region, utilized as an N-type trigger node to receive a second trigger current or a second trigger voltage. | 09-30-2010 |
20100244095 | DUAL TRIGGERED SILICON CONTROLLED RECTIFIER - A dual triggered silicon controlled rectifier (DTSCR) comprises: a semiconductor substrate; an N-well, a P-well, a first N+ diffusion region and a first P+ diffusion region, a second N+ diffusion region and a second P+ diffusion region, a third P+ diffusion region, positioned in one side of the DTSCR and across the N-well and the P-well; a third N+ diffusion region, positioned in another side of the DTSCR and across the N-well and the P-well; a first gate, positioned above the N-well between the second P+ diffusion region and the third P+ diffusion region, for use as a P-type trigger node to receive a first trigger current or a first trigger voltage; and a second gate, positioned above the P-well between the first N+ diffusion region and the third N+ diffusion region, for use as an N-type trigger node to receive a second trigger current or a second trigger voltage. | 09-30-2010 |
Patent application number | Description | Published |
20120103571 | HEAT DISSIPATION STRUCTURE OF ELECTRONIC DEVICE - A structure of heat dissipation of an electronic device includes at least one heat pipe and a cooler. The heat pipe has a condensation end and an evaporation end opposite to each other, and the evaporation end is disposed on a heat generating element of the electronic device. The cooler is disposed on a rack and has a chamber therein, and the chamber has an inner shell having a cooling fluid therein. When the electronic device is mounted in the rack, the condensation end of the heat pipe is inserted into the cooler and positioned into the inner shell. The evaporation end absorbs the heat energy of the heat generating element, and transfers the heat energy to the condensation end, such that the cooling fluid dissipates the heat energy of the condensation end. | 05-03-2012 |
20120106073 | DATA CENTER MODULE - A module for data center is presented, which is used for heat sinking of a heat source. The module for data center includes a first chamber, a second chamber, and a heat pipe. The heat source is positioned in the first chamber. The second chamber is adjacent to the first chamber. In addition, the heat pipe has an evaporation end positioned inside the first chamber and a condensation end positioned inside the second chamber. The heat pipe absorbs the heat energy in the first chamber with the evaporation end, transfers the heat energy to the condensation end, and eliminates the heat energy with the condensation end. | 05-03-2012 |
20130182388 | DATA CENTER MODULE - A module for data center is presented, which is used for heat sinking of a heat source. The module for data center includes a first chamber, a second chamber, and a heat pipe. The heat source is positioned in the first chamber. The second chamber is adjacent to the first chamber. In addition, the heat pipe has an evaporation end positioned inside the first chamber and a condensation end positioned inside the second chamber. The heat pipe absorbs the heat energy in the first chamber with the evaporation end, transfers the heat energy to the condensation end, and eliminates the heat energy with the condensation end. | 07-18-2013 |
Patent application number | Description | Published |
20120272060 | ELECTRONIC FILE DELIVERING SYSTEM, RELEVANT MOBILE COMMUNICATION DEVICE, AND RELEVANT COMPUTER PROGRAM PRODUCT - A mobile communication device is disclosed, having a wireless communication interface, a challenge-response module, and a decryption module. The wireless communication interface is used to receive an encrypted electronic file and a challenge value. The challenge-response module is used to generate a response value according to the challenge value and a challenge-response generating algorithm. The decryption module is used to decrypt the encrypted electronic file with the response value. The decryption module may decrypt the encrypted electronic file when the response value generated according to the challenge value and the challenge-response generating algorithm matches the one used to encrypt the electronic file. | 10-25-2012 |
20130166916 | DUAL-CHANNEL ELECTRONIC SIGNATURE SYSTEM USING IMAGE CODES AND RELATED COMPUTER PROGRAM PRODUCT - A dual-channel electronic signature system is disclosed, having a signature verification server, a signature requester device, and a hand-held device. The signature requester device calculates a characteristic value related to content of a target document, encodes the characteristic value and a destination message to generate a first graph, and outputs the first graph The hand-held device captures and decodes an image of the first graph to obtain the characteristic value, performs an electronic signature operation on the characteristic value to generate a signature data, encodes the signature data to generate a second graph, and transmits the second graph to a destination network address. If the signature data contained in the second graph passes a verification procedure of the signature verification server, the signature verification server transmits a verification graph corresponding to the second graph to the signature requester device. | 06-27-2013 |
Patent application number | Description | Published |
20100055857 | METHOD OF FORMING A POWER DEVICE - A method of forming a power device includes providing a substrate, a semiconductor layer having at least a trench and being disposed on the substrate, a gate insulating layer covering the semiconductor layer, and a conductive material disposed in the trench, performing an ion implantation process to from a body layer, performing a tilted ion implantation process to from a heavy doped region, forming a first dielectric layer overall, performing a chemical mechanical polishing process until the body layer disposed under the heavy doped region is exposed to form source regions on the opposite sides of the trench, and forming a source trace directly covering the source regions disposed on the opposite sides of the trench. | 03-04-2010 |
20100117142 | Semiconductor Device for Improving the Peak Induced Voltage in Switching Converter - A power semiconductor device includes a backside metal layer, a substrate formed on the backside metal layer, a semiconductor layer formed on the substrate, and a frontside metal layer. The semiconductor layer includes a first trench structure including a gate oxide layer formed around a first trench with poly-Si implant, a second trench structure including a gate oxide layer formed around a second trench with poly-Si implant, a p-base region formed between the first trench structure and the second trench structure, a plurality of n+ source region formed on the p-base region and between the first trench structure and the second trench structure, a dielectric layer formed on the first trench structure, the second trench structure, and the plurality of n+ source region. The frontside metal layer is formed on the semiconductor layer and filling gaps formed between the plurality of n+ source region on the p-base region. | 05-13-2010 |
20100289075 | SEMICONDUCTOR DEVICE HAVING INTEGRATED MOSFET AND SCHOTTKY DIODE AND MANUFACTURING METHOD THEREOF - A semiconductor device having integrated MOSFET and Schottky diode includes a substrate having a MOSFET region and a Schottky diode region defined thereon; a plurality of first trenches formed in the MOSFET region; and a plurality of second trenches formed in the Schottky diode region. The first trenches respectively including a first insulating layer formed over the sidewalls and bottom of the first trench and a first conductive layer filling the first trench serve as a trenched gate of the trench MOSFET. The second trenches respectively include a second insulating layer formed over the sidewalls and bottom of the second trench and a second conductive layer filling the second trench. A depth and a width of the second trenches are larger than that of the first trenches; and a thickness of the second insulating layer is larger than that of the first insulating layer. | 11-18-2010 |
20100301386 | INTEGRATED STRUCTURE OF IGBT AND DIODE AND METHOD OF FORMING THE SAME - An integrated structure of an IGBT and a diode includes a plurality of doped cathode regions, and a method of forming the same is provided. The doped cathode regions are stacked in a semiconductor substrate, overlapping and contacting with each other. As compared with other doped cathode regions, the higher a doped cathode region is disposed, the larger implantation area the doped cathode region has. The doped cathode regions and the semiconductor substrate have different conductive types, and are applied as a cathode of the diode and a collector of the IGBT. The stacked doped cathode regions can increase the thinness of the cathode, and prevent the wafer from being overly thinned and broken. | 12-02-2010 |
Patent application number | Description | Published |
20100164529 | SEMICONDUCTOR DEVICE TEST SYSTEM - A test system for semiconductor devices including a tester, a test station, a first controller, and one or more second controllers, is disclosed. The tester handles operations of the test system. The test station, coupled to the tester, receives test information from the tester via a transmission path, where the test station performs a test process to a semiconductor device under test according to the test information, and then provides a test result to the tester. The first controller, electronically connected to the test station, receives the test information. The second controllers, electronically connected to the test station, handles the test process of the test station, where each the second controller corresponds to one or more semiconductor device under test. The first controller broadcasts the test information to one or more second controllers and receives the test result from the second controllers through an infrared communication interface. | 07-01-2010 |
20100164624 | METHOD FOR REDUCING OFFSET VOLTAGE OF OPERATIONAL AMPLIFIER AND THE CIRCUIT USING THE SAME - The invention provides an operational amplifier. In one embodiment, the operational amplifier includes an input stage circuit, a feedback circuit, a fixed stage circuit, and an output stage circuit. The input stage circuit receives a positive input voltage and a negative input voltage, and amplifies the positive input voltage and the negative input voltage to output a first positive output voltage and a first negative output voltage. The feedback circuit generates a reference positive output voltage equal to the first positive output voltage according to the positive input voltage and the negative input voltage. The fixed stage circuit equally amplifies the first negative output voltage and the reference positive output voltage to generate a second positive output voltage and a second negative output voltage. The output stage circuit generates an output voltage according to a difference voltage between the second positive output voltage and a second negative voltage. | 07-01-2010 |
20100169481 | TEST SYSTEM FOR SEMICONDUCTOR DEVICES BASED ON NETWORK MONITORING - A test system for semiconductor devices based on network monitoring is disclosed. The test system includes a testing apparatus, a test system server and one or more control terminals. The test system server wirelessly receives the test request transmitted from the testing apparatus, the control terminals, the designing apparatus or the manufacturing apparatus. According to the test request, the test system sever wirelessly transmits the test information to the testing apparatus to proceed with a test process for a semiconductor device. | 07-01-2010 |
20110109253 | Motor Controlling Circuit for Multiple Control Modes - A motor driving circuit has a motor operated with a forward operation, a reverse operation, an inactivating operation, and/or a brake operation under a constant current mode, a constant voltage mode, and/or a full swing mode. The motor driving circuit also prevents usage of multiple operational amplifiers and errors brought by the usage of the multiple operational amplifiers with simple circuit designs. | 05-12-2011 |
20110260795 | METHOD FOR REDUCING OFFSET VOLTAGE OF OPERATIONAL AMPLIFIER AND THE CIRCUIT USING THE SAME - The invention provides an operational amplifier. In one embodiment, the operational amplifier includes an input stage circuit, a feedback circuit, a fixed stage circuit, and an output stage circuit. The input stage circuit receives a positive input voltage and a negative input voltage, and amplifies the positive input voltage and the negative input voltage to output a first positive output voltage and a first negative output voltage. The feedback circuit generates a reference positive output voltage equal to the first positive output voltage according to the positive input voltage and the negative input voltage. The fixed stage circuit equally amplifies the first negative output voltage and the reference positive output voltage to generate a second positive output voltage and a second negative output voltage. The output stage circuit generates an output voltage according to a difference voltage between the second positive output voltage and a second negative voltage. | 10-27-2011 |
Patent application number | Description | Published |
20120112898 | PROGRAMMABLE TIRE-CONDITION SENSOR HAVING A FLEXIBLE SHELL, ITS INSTALLATION METHOD AND A TIRE CARRYING SAME - A programmable tire-condition sensor includes a control module, which includes a circuit board carrying a battery, a power switch, a processor, a memory, a pressure sensor, a temperature sensor, an acceleration sensor, a voltage sensor, a transmission interface unit and a connection port, and a flexible shell that has a surface area greater than the circuit board, an uplifted area on the middle, an opening, a switch accommodation hole for accommodating the power switch and a connection port accommodation hole for accommodating the connection port. A vehicle tire is also disclosed having installed therein the programmable tire-condition sensor, and a method is still also disclosed for installing the programmable tire-condition sensor in a vehicle tire. | 05-10-2012 |
20120218096 | BLANK TIRE PRESSURE MONITORING DEVICE AND ITS SETUP METHOD - A blank tire pressure monitoring device includes a housing having an air valve at one end and connection terminals at an opposite end, a circuit board mounted in the housing and carrying a pressure sensor, a temperature sensor, an acceleration sensor, an analog-digital converter electrically connected with the pressure sensor, the temperature sensor and the acceleration sensor, a general purpose I/O terminal unit electrically connected with the connection terminals of the housing; an embedded microcontroller module electrically connected with the general purpose I/O terminal unit and the analog-digital converter and having built therein a flash memory, a microcontroller core and a special-function register controller, a LF receiver electrically connected to the embedded microcontroller module, and a transmitter electrically connected to the embedded microcontroller module; and a method is still also disclosed for setting up a blank tire pressure monitoring device. | 08-30-2012 |
20140361884 | TPMS Setting Tool - A TPMS setting tool includes a housing carrying a display unit and an input device on the outside and a circuit hoard and a power supply device on the inside, the power supply device and the circuit board being electrically coupled together to provide the TPMS setting tool with the necessary working power supply. The housing has a receptacle provided at one side thereof and a connection port with multiple pins mounted inside the receptacle for the connection of a TPMS, enabling the desired communication protocol and ID code to be written into the inserted TPMS. | 12-11-2014 |