Patent application number | Description | Published |
20100073972 | ON-DIE ANTI-RESONANCE STRUCTURE FOR INTEGRATED CIRCUIT - A structure and method for reducing the effects of chip-package resonance in an integrated circuit assembly is described. A series RLC circuit is employed to reduce the output impedance of the power delivery system at the resonance frequency. | 03-25-2010 |
20100132191 | Method for Forming a Circuit Board Via Structure for High Speed Signaling - One embodiment of the invention comprises an improved method for making a via structure for use in a printed circuit board (PCB). The via allows for the passage of a signal from one signal plane to another in the (PCB), and in so doing transgresses the power and ground planes between the signal plane. To minimize EM disturbance between the power and ground planes, signal loss due to signal return current, and via-to-via coupling, the via is shielded within two concentric cylinders, each coupled to one of the power and ground planes. | 06-03-2010 |
20100284134 | SUBSTRATES, SYSTEMS, AND DEVICES INCLUDING STRUCTURES FOR SUPPRESSING POWER AND GROUND PLANE NOISE, AND METHODS FOR SUPPRESSING POWER AND GROUND PLANE NOISE - Substrates having power and ground planes, such as, for example, printed circuit boards, include at least one noise suppression structure configured to suppress electrical waves propagating through at least one of a power plane and a ground plane. The at least one noise suppression structure may include a power plane extension that extends from the power plane generally toward the ground plane, and a ground plane extension that extends from the ground plane generally toward the power plane. The ground plane extension may be separated from the power plane extension by a distance that is less than the distance separating the power and ground planes. Electronic device assemblies and systems include such substrates. Methods for suppressing noise in at least one of a power plane and a ground plane include providing such noise suppression structures between power and ground planes. | 11-11-2010 |
20110277323 | Method for Forming a Circuit Board Via Structure for High Speed Signaling - One embodiment of the invention comprises an improved method for making a via structure for use in a printed circuit board (PCB). The via allows for the passage of a signal from one signal plane to another in the (PCB), and in so doing transgresses the power and ground planes between the signal plane. To minimize EM disturbance between the power and ground planes, signal loss due to signal return current, and via-to-via coupling, the via is shielded within two concentric cylinders, each coupled to one of the power and ground planes. | 11-17-2011 |
20120007669 | ON-DIE ANTI-RESONANCE STRUCTURE FOR INTEGRATED CIRCUIT - A structure and method for reducing the effects of chip-package resonance in an integrated circuit assembly is described. A series RLC circuit is employed to reduce the output impedance of the power delivery system at the resonance frequency. | 01-12-2012 |
20130326871 | METHODS FOR SUPPRESSING POWER PLANE NOISE - Substrates having power planes, such as, for example, printed circuit boards, include at least one noise suppression structure configured to suppress electrical waves propagating through at least one of a first power plane and a second power plane. The at least one noise suppression structure may include a first power plane extension that extends from the first power plane generally toward the second power plane, and a second power plane extension that extends from the second power plane generally toward the first power plane. Methods for suppressing noise in at least one of the first power plane and second power plane include providing such noise suppression structures between the power planes. | 12-12-2013 |
20130340250 | Method for Forming a Circuit Board Via Structure for High Speed Signaling - One embodiment of the invention comprises an improved method for making a via structure for use in a printed circuit board (PCB). The via allows for the passage of a signal from one signal plane to another in the PCB, and in so doing transgresses the power and ground planes between the signal plane. To minimize EM disturbance between the power and ground planes, signal loss due to signal return current, and via-to-via coupling, the via is shielded within two concentric cylinders, each coupled to one of the power and ground planes. | 12-26-2013 |