Patent application number | Description | Published |
20130326162 | SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF - A semiconductor device includes a controller configured to control a first memory device to process a request for the first memory device and a second memory device. The controller receives the request for the first memory device, determines a data damage risk of cells connected to a second signal line adjacent to a first signal line of the first memory device corresponding to a requested address by referring to information indicating a data damage risk, and stores data of the cells connected to the second signal line in the second memory device when determining that there is a data damage risk. | 12-05-2013 |
20130326163 | SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF - A semiconductor device includes a controller configured to control a first memory device to process a request for the first memory device. The controller receives the request for the first memory device, determines a data damage risk of cells connected to one or more second signal lines adjacent to a first signal line of the first memory device corresponding to a requested address by referring to information indicating a data damage risk, and restore data in one or more cells of the cells connected to the second signal line when determining that there is the data damage risk. | 12-05-2013 |
20140092693 | SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF - A semiconductor device may test a semiconductor memory device by storing a data sample that is sampled from among data requested to be written into a semiconductor memory device and by comparing the data sample with data read from the semiconductor memory device which corresponds to the data sample. | 04-03-2014 |
20140095824 | SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF - A semiconductor device comprises: a read queue configured to store one or more read requests to a semiconductor memory device; a write queue configured to store one or more write requests to the semiconductor memory device; and a dispatch block configured to determine a scheduling order of the one or more read requests and the one or more write requests and switch to the read queue or to the write queue if a request exists in a Row Hit state in the read queue or in the write queue. | 04-03-2014 |
20140095825 | SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF - An operating method of a semiconductor device may comprise determining whether a read request is pending, setting a delay interval in accordance with a density of requests if there is no read request pending; and processing a write request after the delay interval. | 04-03-2014 |
20140317468 | ENCODER, DECODER AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - A semiconductor device may include a first encoding unit configured to encode first data into an anti-drift code, and a second encoding unit configured to add parity information to the anti-drift code. | 10-23-2014 |
20150340088 | SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF - A semiconductor device may include a candidate selector configured for generating a plurality of candidate threshold value sets from a plurality of digital values corresponding to a plurality of analog signals output from a memory cell array. The semiconductor device may include a threshold value selector configured for selecting one candidate threshold value set of the plurality of candidate threshold value sets as a threshold value set. The semiconductor device may include a comparator configured for deciding logic levels of the plurality of digital values according to the selected threshold value set. | 11-26-2015 |
20150355854 | SEMICONDUCTOR MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME, AND OPERATING METHOD THEREOF - A semiconductor memory device may include a memory cell array, and a program and verify circuit configured to perform a write operation on the memory cell array by repeating a plurality of program and verify operations. When the write operation is stopped after a first program operation is performed according to a first program condition, the PNV circuit may perform a first verify operation corresponding to the first program operation according to a first target value, after the write operation has resumed. | 12-10-2015 |