Patent application number | Description | Published |
20080198425 | IMAGE FORMING APPARATUS - In an image forming apparatus, an energy converting unit receives light from an optical source and converts the light into electric power, and an electrical storage unit stores therein the electric power. The energy converting unit is arranged in such a manner that a relative position of the energy converting unit to the optical source is always constant when a reading unit is reading an image. | 08-21-2008 |
20080198641 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND LAYOUT METHOD THEREOF - A semiconductor integrated circuit device includes a memory macro and M (N is an integer more than 1) passage wirings. The memory macro includes a memory cell array comprising memory cells which are arranged in a matrix, digit line pairs connected with the memory cells and extending in a column direction, and a column peripheral circuit connected with the digit line pairs and comprising a sense amplifier circuit. The M (M is an integer more than 1) passage wirings are arranged to extend in a row direction orthogonal to the digit line pairs. The arrangement of the M passage lines above the column peripheral circuit is forbidden. | 08-21-2008 |
20080259071 | INFORMATION DISPLAY DEVICE, INFORMATION DISPLAYING METHOD, AND COMPUTER PROGRAM PRODUCT - A display control unit performs a control of displaying first image information on a display unit. An electric-power supply unit converts thermal energy generated from a body temperature of a user into electric power upon the user contacting the electric-power supply unit, and supplies the electric power to the display control unit. A determination unit determines whether the user is in contact with the electric-power supply unit. When it is determined that the user is not in contact with the electric-power supply unit, the display control unit performs a control of rewriting the first image information displayed on the display unit with second image information. | 10-23-2008 |
20080291750 | Semiconductor device that uses a plurality of source voltages - A semiconductor device includes a first memory; and a voltage adjusting portion configured to receive a first voltage, a second voltage higher than the first voltage, and a third voltage higher than the second voltage. The first memory includes: a memory cell configured to be connected to a word line and a bit line, a word-line driving circuit configured to drive the word line, and a sense amplifier configured to sense information stored in the memory cell. The voltage adjusting portion includes: a voltage modifying circuit configured to step down or boost up the third voltage at a predetermined mode to generate a fourth voltage higher than the second voltage, and supply the fourth voltage to the sense amplifier or the word-line driving circuit. | 11-27-2008 |
20080292351 | IMAGE FORMING APPARATUS AND ELECTRIC APPLIANCE - A thermoelectric conversion element converts thermal energy of a user into electric power. A holding unit holds the electric power converted by the thermoelectric conversion element, and outputs the electric power. A switching unit switches between a first mode in which electric power is supplied to all units of an image forming apparatus and a second mode in which electric power is supplied to a part of units of the image forming apparatus. When the image forming apparatus is in the second mode, the switching unit switches from the second mode to the first mode upon receiving the electric power output from the holding unit. | 11-27-2008 |
20080298150 | Semiconductor device - A semiconductor device includes a DRAM cell configured to store a data; and a sense amplifier activated in response to supply of power supply voltages and configured to sense the data stored in the DRAM cell. A power supply circuit supplies the power supply voltages to the sense amplifier. A sense amplifier dummy circuit provides a replica of a state of the sense amplifier immediately after the activation of the sense amplifier; and a power supply control circuit controls the power supply circuit based on the replica such that the power supply voltages are varied with time. | 12-04-2008 |
20090068955 | WIRELESS COMMUNICATION DEVICE AND COMMUNICATION METHOD THEREOF - A problem of the present invention is to provide a wireless communication device capable of reducing power consumption and implementing a function of reporting the intensity of a received signal to an external device as well as to provide a communication method thereof. A portable cellular phone ( | 03-12-2009 |
20090072781 | POWER SUPPLY DEVICE, SCANNER POWER SUPPLY DEVICE, AND IMAGE FORMING APPARATUS - A power supply device accumulates charges generated by a photovoltaic unit. The power supply device includes a first capacitor having a first capacitance, in which the charges generated by the photovoltaic unit are charged; a second capacitor having a second capacitance that is larger than the first capacitance; and a switching unit that switches between a first connection of connecting the photovoltaic unit to the first capacitor and a second connection of connecting the first capacitor to the second capacitor. | 03-19-2009 |
20090073744 | Semiconductor storage device - A semiconductor storage device according to one aspect of the present invention includes a DRAM cell including one transistor and one capacitor, in which one of a first voltage and a second voltage is applied to a gate of the transistor, the first voltage being a selected voltage, and the second voltage being a non-selected voltage, a voltage difference between the first voltage and the second voltage is larger than a voltage difference between a power supply voltage and a ground voltage, and one of the ground voltage and the power supply voltage which is closer to the non-selected voltage is applied to a back gate of the transistor irrespective of selection or non-selection. | 03-19-2009 |
20090073779 | Semiconductor storage device including counter noise generator and method of controlling the same - A semiconductor storage device according to one aspect of the present invention includes a reference voltage source connected to a capacitor of a cell included in a memory, a buffer circuit holding data to be written in the cell, and a counter noise generator outputting a counter noise current canceling a noise current generated by rewriting the data in the cell to the reference voltage source according to the data held in the buffer circuit. | 03-19-2009 |
20090080234 | SEMICONDUCTOR DEVICE AND DRAM CONTROLLER - According to a semiconductor device of the present invention, a differential potential between a sense amplification level and a precharge level of a sense amplifier is set to a power supply potential (VCC-GND) so as to improve resistance against degradation of hold characteristics. Further, low power consumption can be realized along with the improvement. Additionally, the precharge level is set to a power supply of GND or VCC so as to realize a stable supply of the precharge level. Further, a chip size can be reduced since a power supply circuit for precharge is not needed. | 03-26-2009 |
20090091959 | POWER SUPPLY UNIT, IMAGE FORMING APPARATUS, AND METHOD FOR CONTROLLING POWER SUPPLY - In an image forming apparatus, a monitoring unit monitors whether a returning factor required to switch an operational state of the apparatus from a power-saving mode to an operating mode is generated, an antenna unit receives external electrical wave, a power generation unit generates electricity from the received electrical wave and supplies the electricity to the monitoring unit, and a controlling unit switches the operational state of the apparatus from the power-saving mode to the operating mode when the monitoring unit detects generation of a returning factor. | 04-09-2009 |
20090122595 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit according to one aspect of the present invention may includes a plurality of driving circuits to drive a respective plurality of word lines with either a first voltage supplied from a first power supply or a second voltage supplied from a second power supply in accordance with a control signal, and a plurality of gate transistors in each of which a gate is connected to one of the plurality of word lines, and a connection state between a storage node and a bit line is changed based on the voltage provided to the word line connected to the gate. In the semiconductor integrated circuit, a gate oxide film of each of the plurality of gate transistors is thinner than a gate oxide film of each of transistors constituting the plurality of driving circuits. | 05-14-2009 |
20090122630 | SEMICONDUCTOR STORAGE DEVICE AND METHOD OF CONTROLLING THE SAME - An exemplary aspect of the present invention is a sense amplifier having a power supply voltage of 1.2 V or lower and amplifying a potential difference between a bit line pair, a first transistor supplying the power supply voltage to the sense amplifier, a second transistor supplying a low potential side voltage to the sense amplifier, and a control circuit controlling the first transistor to be a conduction state before the second transistor is set to the conduction state or at the same time when the second transistor is set to the conduction state. | 05-14-2009 |
20090244620 | IMAGE FORMING SYSTEM, METHOD AND PROGRAM OF CONTROLLING IMAGE FORMING SYSTEM, AND STORAGE MEDIUM - In order to implement and manage an optimal system in the printing business and POD market, in an image forming system which comprises a plurality of devices including at least one of an image forming device which can print data in a storage unit that can store data of a plurality of jobs including data of a first job and data of a second job which is input after the data of the first job, and a sheet processing device which can execute a sheet process for a sheet printed by the image forming device, a schedule associated with a plurality of work flows including a first work flow that includes a plurality of process steps using a plurality of devices of the image forming system required to complete the first job, and a second work flow that includes a plurality of process steps using a plurality of devices of the image forming system required to complete the second job can be set. | 10-01-2009 |
20090256611 | Semiconductor device and timing adjusting method for semiconductor device - In a semiconductor device, a delaying circuit is configured to delay an input signal based on an internal setting data to output as a timing signal. A delay determining section is configured to determine a delay state of each of a plurality of delay signals obtained by delaying the timing signal, based on the plurality of delay signals. A program section is configured to change the internal setting data based on the delay state. | 10-15-2009 |
20100034006 | SEMICONDUCTOR MEMORY DEVICE - In an exemplary aspect, the present invention provides a semiconductor memory device including sense amplifiers that drive bit lines to which memory cells are connected, and driver transistors that supply a power supply to the sense amplifiers, wherein the sense amplifiers are arranged in rows and constitutes a first sense-amplifier row in which transistors of a first conductive type are arranged and a second sense-amplifier row in which transistors of a second conductive type are arranged, and the driver transistors constitutes at least one transistor row including a first driver transistor of the first conductive type corresponding to the first sense-amplifier row and a second driver transistor of the second conductive type corresponding to the second sense-amplifier row between the first sense-amplifier row and the second sense-amplifier row. | 02-11-2010 |
20100046306 | Semiconductor storage device - It has been conventionally difficult to make circuits operate faster. The present invention is a semiconductor storage device including a reference voltage circuit that supplies a reference voltage, and first and second memory circuits, that performs a read/write operation when one of the first and second memory circuits is selected, wherein the first and second memory circuits each include a plurality of memory cells, a plurality of bit line pairs, a precharge circuit that connects a reference voltage circuit to a plurality of bit lines, a sense amplifier circuit that amplifies, when making a selection, a plurality of bit line pairs and a pull-down circuit that lowers any one of the plurality of bit line pairs below the reference voltage, the pull-down circuit of the second memory circuit lowers the bit line pair for a read/write operation period during which the first and second memory circuits are selected or non-selected and the precharge circuits of the first and second memory circuits connect a plurality of bit line pairs to the reference voltage circuit respectively during a precharge period. | 02-25-2010 |
20100066305 | CONTACTLESS BATTERY CHARGER, ELECTRONIC DEVICE, BATTERY PACK, AND CONTACTLESS CHARGING SYSTEM - To provide a contactless charging system that provides superior usability and allows for a reduction in power consumption and a safety measure, as well as to provide an electronic device, a contactless charger, and a battery pack for an electronic device which are used in the system. | 03-18-2010 |
20100090741 | DELAY CIRCUIT - A delay circuit with a delay time being more accurate and a circuit area being reduced is provided. The delay circuit includes a resistance element | 04-15-2010 |
20100091554 | SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THEREOF - A semiconductor device includes: a memory cell; a precharge circuit; a negative potential applying circuit; and a sense amplifier. The memory cell is connected to a first bit line and store data. The precharge circuit is connected to the first and second bit lines and precharges the first and second bit lines to a ground potential. The negative potential applying circuit is connected to the first bit line and applies a negative potential to the first bit line. The sense amplifier is connected to the first and second bit lines and read data based on a difference between a first potential of the first bit line and a second potential of the second bit line. An absolute value of the negative potential is smaller than the difference between the first potential and the second potential. | 04-15-2010 |
20100290300 | SEMICONDUCTOR INTEGRATED DEVICE - Provided is a semiconductor integrated device including a semiconductor memory circuit and a peripheral circuit of the semiconductor memory circuit. The peripheral circuit includes a first transistor having a first voltage as a breakdown voltage of a gate oxide film. The semiconductor memory circuit includes a pair of bit lines, one of the pair of bit lines being connected to a gate transistor of a memory cell, and a precharge circuit that includes a transistor having a breakdown voltage substantially equal to that of the first transistor, and precharges the pair of bit lines to a predetermined voltage in response to an activation signal. The activation signal of the precharge circuit is a second voltage higher than the first voltage. | 11-18-2010 |
20100302894 | WORD LINE SELECTION CIRCUIT AND ROW DECODER - A first exemplary aspect of the present invention is a word line selection circuit where address decode signals composed of a power supply voltage and a first voltage lower than a ground voltage are input, and that a word line selection signal composed of the first voltage and a second voltage higher than the power supply voltage is output not via a level shift circuit according to the address decode signals. | 12-02-2010 |
20110096596 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes: a memory cell array provided with a plurality of memory cells in a matrix; and a power supply circuit configured to supply an intermediate voltage between a power supply voltage and a ground voltage to each of the plurality of memory cells. The power supply circuit includes: a first intermediate voltage generating circuit configured to generate a first intermediate voltage between the power supply voltage and the ground voltage; a second intermediate voltage generating circuit configured to generate a second intermediate voltage between the power supply voltage and the ground voltage; a first output node to which the first intermediate voltage is supplied; a second output node to which the second intermediate voltage is supplied; and a connection control circuit provided between the first output node and the second output node. The first intermediate voltage generating circuit supplies the first intermediate voltage in response to a first control signal, and the second intermediate voltage generating circuit stops its operation in response to the first control signal. The connection control circuit connects the first output node and the second output node when the second intermediate voltage generating circuit stops its operation. | 04-28-2011 |
20110103124 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device has: memory blocks; and a local bus connected to the memory blocks. Each memory block has: switches respectively provided between bit line pairs and the local bus and each of which is turned ON in response to a selection signal; a dummy local bus; first and second control circuits. The local bus and the dummy local bus are precharged to a first potential before a read operation. In the read operation, the first control circuit outputs the selection signal to a selected switch to electrically connect a selected bit line pair and the local bus, while the second control circuit supplies a second potential lower than the first potential to the dummy local bus. The first control circuit stops outputting the selection signal when a potential of the dummy local bus is decreased to a predetermined set potential that is between the first and second potentials. | 05-05-2011 |
20110164281 | IMAGE FORMING APPARATUS - A data processing apparatus for executing predetermined printing processes to a file has: a display for displaying a plurality of boxes (folders) associated with a plurality of printing processes (for example, 2up, Duplex, Staple) which can be executed to the file; and a mouse for inputting a moving instruction to the file displayed on the display. When it is detected that the file which is moved by the moving instruction input by the mouse has passed through the plurality of boxes (folders) displayed on the display, the printing processes regarding the boxes (folders) through which the file has passed are executed to the file on the basis of the detection result. | 07-07-2011 |
20110170362 | SEMICONDUCTOR INTEGRATED CIRCUIT - Disclosed is a semiconductor integrated circuit in which the number of bus lines is reduced and current consumption during operation can be lessened. The semiconductor integrated circuit includes a circuit unit (e.g., a memory cell array plate) which is divided into a plurality of banks (bank | 07-14-2011 |
20110199120 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit capable of reducing unnecessary current consumption includes a plurality of bus drive circuits for receiving data input, a common bus coupled to the bus drive circuits, and a bus holder coupled to the common bus. One of the bus drive circuits is selected as the selected bus drive circuit. When a logical value corresponding to the data input to be output is the same as a logical value that has been held by the bus holder and output to the common bus, the selected bus drive circuit stops outputting the logical value corresponding to the data input to the common bus. With this configuration, it is possible to eliminate the unnecessary output of the selected bus drive circuit, and to reduce unnecessary current consumption compared to the conventional semiconductor integrated circuit. | 08-18-2011 |
20110222139 | ELECTROCHROMIC DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME - An electrochromic display apparatus is disclosed that includes a stacked body which includes a display electrode and an electrochromic layer that are stacked on each other; a film which includes through holes, and is disposed on one of the display electrode and the electrochromic layer of the stacked body; and an opposed substrate on which an opposed electrode that faces toward the display electrode is formed. | 09-15-2011 |
20110255360 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR CONTROLLING THE SAME - A semiconductor memory device includes a memory cell array having plural memory cells that require a refresh operation when retaining data; a read/write control unit that performs read-access or write-access of memory cell address specified for the memory cell array based on instructions from the outside; a refresh control unit that performs hidden-refresh of memory cells without control from the outside; and a schedule control unit that makes the refresh control unit perform hidden-refresh after the read/write control unit read-accesses the memory cell array, and that also makes the refresh control unit perform hidden-refresh before the read/write access control unit performs write-access. | 10-20-2011 |
20110298012 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit according to one aspect of the present invention may includes a plurality of driving circuits to drive a respective plurality of word lines with either a first voltage supplied from a first power supply or a second voltage supplied from a second power supply in accordance with a control signal, and a plurality of gate transistors in each of which a gate is connected to one of the plurality of word lines, and a connection state between a storage node and a bit line is changed based on the voltage provided to the word line connected to the gate. In the semiconductor integrated circuit, a gate oxide film of each of the plurality of gate transistors is thinner than a gate oxide film of each of transistors constituting the plurality of driving circuits. | 12-08-2011 |
20110309347 | ORGANIC ELECTROLUMINESCENCE DEVICE HAVING ANODE INCLUDING METAL OXIDE AND CONDUCTIVE POLYMER, LIGHT EMISSION APPARATUS, AND METHOD OF FABRICATING ORGANIC ELECTROLUMINESCENCE DEVICE - An organic electroluminescence device includes a cathode, a stacked structure provided on the cathode and including an organic layer that includes an organic light emitting layer, and a transparent anode provided on the stacked structure, The transparent anode includes a metal oxide and a conductive polymer. | 12-22-2011 |
20120139824 | ELECTROCHROMIC DISPLAY ELEMENT, DISPLAY DEVICE AND INFORMATION APPARATUS - A disclosed electrochromic display element includes a display substrate, a counter substrate facing the display substrate, display electrodes arranged between the display substrate and the counter substrate, electrochromic layers formed on the respective display electrodes, a plurality of drive elements arranged on the counter substrate at predetermined intervals, a plurality of pixel electrodes arranged on the drive elements, a charge retention layer formed over the pixel electrodes as a continuous layer, the charge retention layer being formed of a mixed film including a polymer and one of electric conductive microparticles and semiconductor microparticles, and an electrolyte layer sandwitched between the display substrate and the charge retention layer. | 06-07-2012 |
20120139825 | ELECTROCHROMIC DISPLAY DEVICE - An electrochromic display device includes a display substrate, a counter substrate facing the display substrate, counter electrodes arranged on the counter substrate, an electrolyte layer arranged between the display substrate and the counter electrodes, display electrodes separately arranged from one another between the display substrate and the counter electrodes, electrochromic layers to develop or reduce a color by redox reactions, the electrochromic layers being formed on the respective display electrodes arranged such that the electrochromic layers face the set of the counter electrodes, a voltage applying unit to select one of the display electrodes to connect the selected display electrode and the counter electrodes to apply a voltage between the connected display electrode and counter electrodes, a disconnecting unit to disconnect the unselected display electrodes from the counter electrodes, and an interelectrode connecting unit to connect the display electrodes. | 06-07-2012 |
20120154892 | ION CONDUCTOR AND ELECTROCHROMIC DISPLAY DEVICE - An ion conductor includes a mixture including an electrolyte including a salt including inorganic or organic pairs of negative and positive ions, and a low-molecular liquid crystal material. Further, an impedance of the ion conductor varies in accordance with an increase of a voltage applied to the ion conductor due to an orientation response of the low-molecular liquid crystal material, the impedance being determined by an AC impedance method. | 06-21-2012 |
20120226836 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit capable of reducing unnecessary current consumption includes a plurality of bus drive circuits for receiving data input, a common bus coupled to the bus drive circuits, and a bus holder coupled to the common bus. One of the bus drive circuits is selected as the selected bus drive circuit. When a logical value corresponding to the data input to be output is the same as a logical value that has been held by the bus holder and output to the common bus, the selected bus drive circuit stops outputting the logical value corresponding to the data input to the common bus. With this configuration, it is possible to eliminate the unnecessary output of the selected bus drive circuit, and to reduce unnecessary current consumption compared to the conventional semiconductor integrated circuit. | 09-06-2012 |
20120262976 | SEMICONDUCTOR STORAGE DEVICE - When plural diffusion layers are shared in order to save an area of a semiconductor integrated circuit, parasitic capacities of wirings coupled to those diffusion layers are changed. Nonetheless, a semiconductor layout balancing capacitive loads of paired wirings coupled to the diffusion layers with each other is provided. The diffusion layers coupled to the respective paired wirings are alternately arranged or staggered to balance the respective capacitive loads of the paired wirings with each other. | 10-18-2012 |
20120262978 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - Transistors formed in one identical diffusion layer and performing complementary operations are generally arranged symmetrically with respect to the diffusion layer. A semiconductor integrated device using a layout capable of partially avoiding restriction on the design of the semiconductor integrated circuit device and reducing the size and economizing the manufacturing cost is provided by breaking the stereotype idea. The size of the semiconductor integrated circuit device can be decreased further by arranging two transistors formed in one identical diffusion layer and conducting complementary operations by intentionally arranging them in an asymmetric pattern. | 10-18-2012 |
20120320696 | SEMICONDUCTOR MEMORY WITH SENSE AMPLIFIER - In an exemplary aspect, the present invention provides a semiconductor memory device including sense amplifiers that drive bit lines to which memory cells are connected, and driver transistors that supply a power supply to the sense amplifiers, wherein the sense amplifiers are arranged in rows and constitutes a first sense-amplifier row in which transistors of a first conductive type are arranged and a second sense-amplifier row in which transistors of a second conductive type are arranged, and the driver transistors constitutes at least one transistor row including a first driver transistor of the first conductive type corresponding to the first sense-amplifier row and a second driver transistor of the second conductive type corresponding to the second sense-amplifier row between the first sense-amplifier row and the second sense-amplifier row. | 12-20-2012 |
20120327732 | SEMICONDUCTOR INTEGRATED DEVICE - Provided is a semiconductor integrated device including a semiconductor memory circuit and a peripheral circuit of the semiconductor memory circuit. The peripheral circuit includes a first transistor having a first voltage as a breakdown voltage of a gate oxide film. The semiconductor memory circuit includes a pair of bit lines, one of the pair of bit lines being connected to a gate transistor of a memory cell, and a precharge circuit that includes a transistor having a breakdown voltage substantially equal to that of the first transistor, and precharges the pair of bit lines to a predetermined voltage in response to an activation signal. The activation signal of the precharge circuit is a second voltage higher than the first voltage. | 12-27-2012 |
20120327733 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device has: memory blocks; and a local bus connected to the memory blocks. Each memory block has: switches respectively provided between bit line pairs and the local bus and each of which is turned ON in response to a selection signal; a dummy local bus; first and second control circuits. The local bus and the dummy local bus are precharged to a first potential before a read operation. In the read operation, the first control circuit outputs the selection signal to a selected switch to electrically connect a selected bit line pair and the local bus, while the second control circuit supplies a second potential lower than the first potential to the dummy local bus. The first control circuit stops outputting the selection signal when a potential of the dummy local bus is decreased to a predetermined set potential that is between the first and second potentials. | 12-27-2012 |
20130057206 | CONTACTLESS BATTERY CHARGER, ELECTRONIC DEVICE, BATTERY PACK, AND CONTACTLESS CHARGING SYSTEM - A contactless charging system is made up of an electronic device and a contactless charger | 03-07-2013 |
20130141999 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit according to one aspect of the present invention may includes a plurality of driving circuits to drive a respective plurality of word lines with either a first voltage supplied from a first power supply or a second voltage supplied from a second power supply in accordance with a control signal, and a plurality of gate transistors in each of which a gate is connected to one of the plurality of word lines, and a connection state between a storage node and a bit line is changed based on the voltage provided to the word line connected to the gate. In the semiconductor integrated circuit, a gate oxide film of each of the plurality of gate transistors is thinner than a gate oxide film of each of transistors constituting the plurality of driving circuits. | 06-06-2013 |
20130250394 | ELECTROCHROMIC DISPLAY DEVICE AND A METHOD FOR MANUFACTURING AN ELECTROCHROMIC DISPLAY DEVICE - Disclosed is an electrochromic display device including a display substrate, a display electrode provided on the display substrate, a first electrochromic layer provided on the display electrode, an intermediate display electrode provided above the first electrochromic layer separately from the first electrochromic layer, a second electrochromic layer provided on and contacting the intermediate display electrode, an opposed substrate, an opposed electrode provided on the opposed substrate, and an electrolyte solution provided between a surface of the display substrate on which the display electrode is formed and a surface of the opposed substrate on which the opposed electrode is formed, wherein the intermediate display electrode contains a rod-shaped, whisker-shaped, or long-fiber-shaped electrically conductive fine particle, and at least a portion of a space in the electrically conductive fine particle is filled with a material forming the second electrochromic layer. | 09-26-2013 |
20130258439 | METHOD FOR MANUFACTURING AN ELECTROCHROMIC DISPLAY DEVICE AND AN ELECTROCHROMIC DISPLAY DEVICE - Disclosed is a method for manufacturing an electrochromic display device, including a step of applying and attaching a fine particle with a predetermined particle diameter to a display substrate, a step of film-forming a transparent electrically conductive film after the fine particle is applied thereto, a step of removing the fine particle to remove a transparent electrically conductive film attached to a surface of the fine particle and to form a display electrode having a fine through-hole at a position at which the fine particle has been attached thereto, and a step of forming an electrochromic layer on the display electrode. | 10-03-2013 |
20130258789 | SEMICONDUCTOR MEMORY AND METHOD OF OPERATING SEMICONDUCTOR MEMORY - Deterioration of holding characteristics due to fluctuations in power supply voltage VDD is prevented. During ting ending in one of memory circuits, a pair of bit lines in the other memory circuit is controlled to a dummy-bit-line voltage ranging from a ground voltage to ½×VDD. In a subsequent precharge period, a pair of bit lines in one of the memory circuits and the pair of bit lines in the other memory circuit are coupled to a reference voltage generating circuit. | 10-03-2013 |
20130279281 | SEMICONDUCTOR MEMORY INTEGRATED DEVICE HAVING A PRECHARGE CIRCUIT WITH THIN-FILM TRANSISTORS GATED BY A VOLTAGE HIGHER THAN A POWER SUPPLY VOLTAGE - Provided is a semiconductor integrated device including a semiconductor memory circuit and a peripheral circuit of the semiconductor memory circuit. The peripheral circuit includes a first transistor having a first voltage as a breakdown voltage of a gate oxide film. The semiconductor memory circuit includes a pair of bit lines, one of the pair of bit lines being connected to a gate transistor of a memory cell, and a precharge circuit that includes a transistor having a breakdown voltage substantially equal to that of the first transistor, and precharges the pair of bit lines to a predetermined voltage in response to an activation signal. The activation signal of the precharge circuit is a second voltage higher than the first voltage. | 10-24-2013 |
20130286760 | SEMICONDUCTOR MEMORY WITH SENSE AMPLIFIER - In an exemplary aspect, the present invention provides a semiconductor memory device including sense amplifiers that drive bit lines to which memory cells are connected, and driver transistors that supply a power supply to the sense amplifiers, wherein the sense amplifiers are arranged in rows and constitutes a first sense-amplifier row in which transistors of a first conductive type are arranged and a second sense-amplifier row in which transistors of a second conductive type are arranged, and the driver transistors constitutes at least one transistor row including a first driver transistor of the first conductive type corresponding to the first sense-amplifier row and a second driver transistor of the second conductive type corresponding to the second sense-amplifier row between the first sense-amplifier row and the second sense-amplifier row. | 10-31-2013 |
20130335802 | ELECTROCHROMIC DISPLAY DEVICE - An electrochromic display device includes an electrochromic display element including a display electrode, an electrochromic layer provided on the display electrode, an opposing electrode facing the display electrode, and an electrolyte layer sandwiched between the display electrode and the opposing electrode. The electrochromic display device further includes a switching element, and a electric storage element. The display electrode is connected with the opposing electrode by a power source or the electric storage element via the switching element, and when performing driving, part of electric charges, which are stored in the electrochromic display element, are applied for charging the electric storage element, or electric charges in the electric storage element that has been charged are used for driving the electrochromic display element. | 12-19-2013 |
20140029329 | WORD LINE SELECTION CIRCUIT AND ROW DECODER - A first exemplary aspect of the present invention is a word line selection circuit where address decode signals composed of a power supply voltage and a first voltage lower than a ground voltage are input, and that a word line selection signal composed of the first voltage and a second voltage higher than the power supply voltage is output not via a level shift circuit according to the address decode signals. | 01-30-2014 |
20140078569 | ELECTRO-CHROMIC DISPLAY ELEMENT, DISPLAY APPARATUS, AND DRIVING METHOD - An electro-chromic display element, and a display apparatus and a driving method using the same are provided. | 03-20-2014 |
20140119145 | SEMICONDUCTOR MEMORY INTEGRATED DEVICE HAVING A PRECHARGE CIRCUIT WITH THIN-FILM TRANSISTORS GATED BY A VOLTAGE HIGHER THAN A POWER SUPPLY VOLTAGE - Provided is a semiconductor integrated device including a semiconductor memory circuit and a peripheral circuit of the semiconductor memory circuit. The peripheral circuit includes a first transistor having a first voltage as a breakdown voltage of a gate oxide film. The semiconductor memory circuit includes a pair of bit lines, one of the pair of bit lines being connected to a gate transistor of a memory cell, and a precharge circuit that includes a transistor having a breakdown voltage substantially equal to that of the first transistor, and precharges the pair of bit lines to a predetermined voltage in response to an activation signal. The activation signal of the precharge circuit is a second voltage higher than the first voltage. | 05-01-2014 |
20140169073 | SEMICONDUCTOR INTEGRATED CIRCUIT WITH THICK GATE OXIDE WORD LINE DRIVING CIRCUIT - A semiconductor integrated circuit according to one aspect of the present invention may includes a plurality of driving circuits to drive a respective plurality of word lines with either a first voltage supplied from a first power supply or a second voltage supplied from a second power supply in accordance with a control signal, and a plurality of gate transistors in each of which a gate is connected to one of the plurality of word lines, and a connection state between a storage node and a bit line is changed based on the voltage provided to the word line connected to the gate. In the semiconductor integrated circuit, a gate oxide film of each of the plurality of gate transistors is thinner than a gate oxide film of each of transistors constituting the plurality of driving circuits. | 06-19-2014 |
20140217968 | CONTACTLESS BATTERY CHARGER, ELECTRONIC DEVICE, BATTERY PACK, AND CONTACTLESS CHARGING SYSTEM - A contactless charging system is made up of an electronic device and a contactless charger | 08-07-2014 |
20140268284 | ELECTROCHROMIC DISPLAY ELEMENT AND DISPLAY DEVICE - Disclosed is an electrochromic display element, including a display substrate, an opposed substrate that is opposed to the display substrate, an opposed electrode being formed at a display-substrate-opposed side of the opposed substrate, a first display electrode and a first electrochromic layer being laminated at an opposed-substrate-opposed side of the display substrate, a single porous film being formed between the display substrate and the opposed substrate, a second display electrode and a second electrochromic layer being laminated at a display-substrate-opposed side of the porous film, a third display electrode and a third electrochromic layer being laminated at an opposed-substrate-opposed side of the porous film, and an electrolyte being present between the display substrate and the opposed substrate. | 09-18-2014 |
20140286117 | SEMICONDUCTOR MEMORY WITH SENSE AMPLIFIER - In an exemplary aspect, the present invention provides a semiconductor memory device including sense amplifiers that drive bit lines to which memory cells are connected, and driver transistors that supply a power supply to the sense amplifiers, wherein the sense amplifiers are arranged in rows and constitutes a first sense-amplifier row in which transistors of a first conductive type are arranged and a second sense-amplifier row in which transistors of a second conductive type are arranged, and the driver transistors constitutes at least one transistor row including a first driver transistor of the first conductive type corresponding to the first sense-amplifier row and a second driver transistor of the second conductive type corresponding to the second sense-amplifier row between the first sense-amplifier row and the second sense-amplifier row. | 09-25-2014 |
20140313815 | WORD LINE SELECTION CIRCUIT AND ROW DECODER - A first exemplary aspect of the present invention is a word line selection circuit where address decode signals composed of a power supply voltage and a first voltage lower than a ground voltage are input, and that a word line selection signal composed of the first voltage and a second voltage higher than the power supply voltage is output not via a level shift circuit according to the address decode signals. | 10-23-2014 |
20140321221 | SEMICONDUCTOR INTEGRATED CIRCUIT WITH THICK GATE OXIDE WORD LINE DRIVING CIRCUIT - A semiconductor integrated circuit according to one aspect of the present invention may includes a plurality of driving circuits to drive a respective plurality of word lines with either a first voltage supplied from a first power supply or a second voltage supplied from a second power supply in accordance with a control signal, and a plurality of gate transistors in each of which a gate is connected to one of the plurality of word lines, and a connection state between a storage node and a bit line is changed based on the voltage provided to the word line connected to the gate. In the semiconductor integrated circuit, a gate oxide film of each of the plurality of gate transistors is thinner than a gate oxide film of each of transistors constituting the plurality of driving circuits. | 10-30-2014 |
20140321224 | SEMICONDUCTOR DEVICE - There is provided a semiconductor device including a first logic circuit to operate based on a first power supply and a second power supply, and a second logic circuit to operate based on the first power supply and a third power supply boosted from the second power supply. The second logic circuit includes a holding section to hold a value generated according to a first signal and a second signal operating asynchronously with respect to each other. | 10-30-2014 |