Patent application number | Description | Published |
20080215859 | Computer with high-speed context switching - A computer which performs parallel processing of a plurality of programs in a time-division fashion includes hardware resources divided into a plurality of areas, an evacuation unit which records identification information identifying a first program, and evacuates information stored in an area of said plurality of areas if the area is necessary for execution of a second program and is being used for execution of the first program, and a restoration unit which restores the evacuated information to the area based on the identification information when the second program comes to a halt or to an end. | 09-04-2008 |
20080288967 | PROCEDURE CALLING METHOD, PROCEDURE CALLING PROGRAM, AND COMPUTER PRODUCT - In a shared-memory multiprocessor having plural processors that share a shared memory, each have an address space that is respectively independent in the shared memory and are configured to be capable of inter-processor communication using a bus, a first processor makes a procedure call to a second processor by specifying an address in the address space of the second processor. In response to the procedure call, by initiating and executing the procedure located at the address specified by the first processor, the second processor initiates the procedure at a high speed. | 11-20-2008 |
20090007087 | PROGRAM ANALYZING METHOD, PROGRAM ANALYZING APPARATUS AND PROGRAM ANALYZING PROGRAM - A dependent element group which is invertibly contractible is found by using program analysis information including a plurality of dependent elements representing dependent relationships of statement and control, the statement and the control being included in a program. Next, a program dependence graph in which dependent elements are made to be contracted is generated by contracting the found dependent element group. The number of vertices and the number of edges of the program dependence graph are reduced by the contraction of the dependent elements, so that a program dependence graph with a rough granularity can be generated. As a result, a calculation amount (calculation time) necessary for optimization processing such as parallel processing of the program can be reduced. That is, by generating the contracted program dependence graph having invertibility, it is possible to realize the analysis and optimization of large-scale software in a realistic time. | 01-01-2009 |
20090019259 | MULTIPROCESSING METHOD AND MULTIPROCESSOR SYSTEM - A multiprocessing method and a multiprocessor system capable of reducing time lost due to sequential waiting when procedures (program units) having dependencies are executed in which an order of execution of a plurality of program units in a sequential execution program and dependencies of the plurality of program units are registered, the execution states of the plurality of program units are managed based on the registered dependencies, executable program units are determined, and are assigned to server processors sequentially and executed are disclosed. | 01-15-2009 |
20090024381 | Simulation device for co-verifying hardware and software - A simulation device capable of verifying coordinated operation of software and hardware faster and more accurately. The simulation device has a framework including a virtual OS and a virtual CPU to execute software under test. The virtual OS and CPU also serve as a first scheduler that manages an execution schedule for the software under test. The framework includes a communication interface for communication between the software under test and hardware models. A second scheduler manages simulation processes of the framework and the hardware model. The virtual OS and CPU release their execution right to the second scheduler according to the execution schedule of the software under test. | 01-22-2009 |
20100070739 | Multiprocessor system and control method thereof - A multiprocessor system according to an embodiment comprises a plurality of processors, an execution control unit to control processing by the plurality of processors and data transfer between the plurality of processors; and an internal data storage unit to store data dependence information indicating status of the data transfer. If control flow of processing by a processor is fixed after a preceding data transfer is registered for execution and another data transfer to a similar destination as the preceding data transfer is necessary, the execution control unit cancels the preceding data transfer based on the data dependence information. | 03-18-2010 |