Patent application number | Description | Published |
20080237565 | PHASE CHANGE MEMORY DEVICE TO PREVENT THERMAL CROSS-TALK AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device for preventing thermal cross-talk includes lower electrodes respectively formed in a plurality of phase change cell regions of a semiconductor substrate. A first insulation layer is formed on the semiconductor substrate including the lower electrodes having holes for exposing the respective lower electrodes. Heaters are formed on the surfaces of the respective holes to contact the lower electrodes. A second insulation layer is formed to fill the holes in which the heaters are formed. A mask pattern is then formed on the first and second insulation layers, including the heaters, to have openings that expose portions of the respective heaters having a constant pitch. A phase change layer is formed on the mask pattern including the exposed portions of the heaters and the first and second insulation layers and subsequently, upper electrodes are formed on the phase change layer. | 10-02-2008 |
20080277643 | PHASE CHANGE MEMORY DEVICE USING PNP-BJT FOR PREVENTING CHANGE IN PHASE CHANGE LAYER COMPOSITION AND WIDENING BIT LINE SENSING MARGIN - A phase change memory device includes a semiconductor substrate having bar-shaped active regions which extend in a first direction; base regions and emitter regions alternately formed in each active region; lower electrodes formed over the emitter regions to connect to the respective emitter regions; a phase change layer and an upper electrode stacked on each of the lower electrodes; sub bit lines formed over the upper electrodes to come into contact with the corresponding upper electrodes; word lines arranged over the sub bit lines to come into contact with the base regions; and a main bit line formed over the word line to come into contact with the sub bit lines. The phase change memory device is able to prevent a change in the composition of the phase change layer and additionally is able to widen the sensing margin of a bit line. | 11-13-2008 |
20080280411 | METHOD FOR MANUFACTURING PHASE CHANGE MEMORY DEVICE USING A PATTERNING PROCESS - A phase change memory device is made by processes including forming a first interlayer dielectric on a semiconductor substrate that has junction regions. Then etching the first interlayer dielectric and thereby defining contact holes that expose the junction regions. A conductive layer is formed on the first interlayer dielectric to fill the contact holes. Forming a hard mask layer on the conductive layer and etching the hard mask layer and the conductive layer to form contact plugs in the contact holes. Finally, forming a conductive layer pattern that is located on the contact plug and portions of the first interlayer dielectric adjacent to the contact plug and having a hard mask thereon. | 11-13-2008 |
20080280440 | METHOD FOR FORMING A PN DIODE AND METHOD OF MANUFACTURING PHASE CHANGE MEMORY DEVICE USING THE SAME - Disclosed is a method of forming a PN diode and a method of manufacturing a phase change memory device using the same. Formation of a PN diode includes forming a first conductivity type region in a surface of a semiconductor substrate. A polysilicon layer doped with second conductivity type impurities is then deposited on the semiconductor substrate formed with the first conductivity type region. Forming a plurality of second conductivity type regions by etching the polysilicon layer doped with the second conductivity type impurities completes the PN diode. Since the P-regions of a PN diode are formed through the deposition and etching of a polysilicon layer doped with second conductivity type impurities rather than an SEG process, a uniformity of resistance in the PN diode can be obtained. | 11-13-2008 |
20090039333 | PHASE CHANGE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device includes a silicon substrate having a bar-type active region and an N-type impurity region formed in a surface of the active region. A first insulation layer is formed on the silicon substrate, and the first insulation layer includes a plurality of first contact holes and second contact holes. PN diodes are formed in the first contact holes. Heat sinks are formed in the first contact holes on the PN diodes, and contact plugs fill the second contact holes. A second insulation layer having third contact holes is formed on the first insulation layer. Heaters fill the third contact holes. A stack pattern of a phase change layer and a top electrode is formed to contact the heaters. The heat sink quickly cools heat transferred from the heater to the phase change layer. | 02-12-2009 |
20090114897 | PHASE CHANGE MEMORY DEVICE CAPABLE OF INCREASING SENSING MARGIN AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device capable of increasing a sensing margin and a method for manufacturing the same. The phase change memory device includes a semiconductor substrate formed with a device isolation structure which defines active regions; first conductivity type impurity regions formed in surfaces of the active regions and having the shape of a line; a second conductivity type well formed in the semiconductor substrate at a position lower than the device isolation structure; a second conductivity type ion-implantation layer formed in the semiconductor substrate at a boundary between a lower end of the device isolation structure and the semiconductor substrate; a plurality of vertical PN diodes formed on the first conductivity type impurity regions; and phase change memory cells formed on the vertical PN diodes. | 05-07-2009 |
20090184304 | PHASE CHANGE MEMORY DEVICE HAVING PLUG-SHAPED PHASE CHANGE LAYERS AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device having plug-shaped phase change layers and a process of manufacturing the same is provided. The device and process includes forming first electrodes on a substrate. An insulation layer is then formed to cover the first electrodes. Plug-shaped phase change layers are then formed in the insulation layer to contact the first electrodes. The plug-shaped phase change layers have a straight-line or an āLā shape when viewed as a cross-section and a horseshoe or a semicircle shape when viewed from above. Finally, bit lines are formed on the insulation layer to contact the phase change layers and additionally serve as second electrodes. The device may further include heaters interposed between the first electrodes and the plug-shaped phase change layers. | 07-23-2009 |
20090200537 | PHASE CHANGE MEMORY DEVICE PREVENTING CONTACT LOSS AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device includes a silicon substrate having a phase change cell region. A plurality of phase change cell are formed in the phase change region of the silicon substrate. A contact comprising a first contact and a second contact is formed on each of the phase change cells. A plurality of bit lines are electrically connected to the contacts. A contact plug is formed on the silicon substrate in a region outside of the phase change cell region, and a word line is formed over the silicon substrate and is connected to the contact plug. | 08-13-2009 |
20090267043 | PHASE CHANGE MEMORY DEVICE RESISTANT TO STACK PATTERN COLLAPSE AND A METHOD FOR MANUFACTURING THE SAME - A phase change memory device resistant to stack pattern collapse is presented. The phase change memory device includes a silicon substrate, switching elements, heaters, stack patterns, bit lines and word lines. The silicon substrate has a plurality of active areas. The switching elements are connected to the active areas. The heaters are connected to the switching elements. The stack patterns are connected to the heaters. The bit lines are connected to the stack patterns. The word lines are connected to the active areas of the silicon substrate. | 10-29-2009 |
20090267044 | PHASE CHANGE MEMORY DEVICE HAVING A BENT HEATER AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device includes heaters which are formed in their respective memory cells and vertically positioned stack patterns having phase change layers and top electrodes which are formed to come into contact with the heaters. The heaters have horizontal cross-sectional bent shapes which can have any number of shapes such as a shape similar to that of a boomerang. The horizontal cross-sectional bent shapes of the heaters are for minimizing the contact area between the heaters and the phase change layer so that programming currents can be reduced or minimized. | 10-29-2009 |
20090267045 | PHASE CHANGE MEMORY DEVICE HAVING HEATERS AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device includes switching elements formed on a substrate that includes a cell region and a peripheral region. Heat sinks are formed on the switching elements. Heaters are formed on the heat sink and a phase change layer is formed on the heaters. | 10-29-2009 |
20090269928 | METHOD FOR MANUFACTURING PHASE CHANGE MEMORY DEVICE - A method for manufacturing a phase change memory device that prevents or minimizes adverse performance characteristics associated with inadequate overlap between top electrode contacts and top electrodes. The method prevents or minimizes unwanted chemical changes and etch losses of the phase change material when building the top electrode. The method includes forming spacers on sidewalls of remaining portions of the insulation layer and the hard masks so that subsequent etching of the conductive layer and the phase change material layer uses the spacers and the hard masks as an etch mask to form top electrodes and a phase change layer. Accordingly, the method promises to provide a way of achieving a high level of integration for the resultant phase change memory devices. | 10-29-2009 |
20090302299 | PHASE CHANGE MEMORY DEVICE HAVING A WORD LINE CONTACT AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device having a word line contact includes an N+ base layer formed in a surface of a semiconductor substrate. A word line is formed over the N+ base layer. The word line contact is formed to connect the N+ base layer to the word line. The word line contact includes a first contact plug, a barrier layer formed on the first contact plug, and a second contact plug formed on the barrier layer coaxially with the first contact plug. The barrier layer prevents unwanted etching of the first contact plug when the second contact plug is being formed. | 12-10-2009 |
20090302300 | PHASE CHANGE MEMORY DEVICE HAVING DECREASED CONTACT RESISTANCE OF HEATER AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device includes a silicon substrate having cell and peripheral regions. A first insulation layer with a plurality of holes is formed in the cell region. Recessed cell switching elements are formed in the holes. Heat sinks are formed in the holes in which the cell switching elements are formed, and the heat sinks project out of the first insulation layer. A gate is formed in the peripheral region and has a stack structure of a gate insulation layer, a first gate conductive layer, a second gate conductive layer, and a hard mask layer. A second insulation layer is formed on the surface of the silicon substrate. The second insulation layer has contact holes exposing the heat sinks. Heaters are formed in the contact holes, and stack patterns of a phase change layer and a top electrode are formed on the heaters. | 12-10-2009 |
20100001251 | PHASE CHANGE MEMORY DEVICE IN WHICH A DISTANCE BETWEEN A LOWER ELECTRODE AND A GROUND LINE IS INCREASED TO SECURE THE SENSING MARGIN OF A CELL AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device includes a semiconductor substrate having active regions and an isolation structure; gate lines extending in a direction perpendicular to the active regions; a source region and a drain region formed in a surface of each active region; a dot type lower electrode including a first contact plug formed in the drain region; second contact plugs formed in the source region and the isolation structure forming a line parallel to the gate line; a lower electrode contact formed on the lower electrode; a phase change layer and an upper electrode formed on the lower electrode contact; an upper electrode contact formed on the upper electrode; contacts for ground lines, formed between the active regions to come into contact with the second contact plugs; a bit line formed in the active region; and ground lines formed between the active regions. | 01-07-2010 |
20100090190 | PHASE CHANGE MEMORY DEVICE HAVING DIELECTRIC LAYER FOR ISOLATING CONTACT STRUCTURE FORMED BY GROWTH, SEMICONDUCTOR DEVICE HAVING THE SAME, AND METHODS FOR MANUFACTURING THE DEVICES - A phase change memory device includes a semiconductor substrate having an impurity region and an interlayer dielectric applying a tensile stress formed on the semiconductor substrate and having contact holes exposing the impurity region. Switching elements are formed in the contact holes; and sidewall spacers interposed between the switching elements and the interlayer dielectric and formed as a dielectric layer applying a compressive stress. | 04-15-2010 |
20100117046 | PHASE CHANGE MEMORY DEVICE HAVING REDUCED PROGRAMMING CURRENT AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device includes a semiconductor substrate having an active region. An insulation layer is formed on the semiconductor substrate grooves and holes are defined in the insulation layer, with the holes being defined under the grooves to expose portions of the active region. Cell switching are elements formed in the holes and lower portions of the grooves and a phase change layer formed in upper portions of the grooves over the cell switching elements and on portions of the insulation layer adjacent to the grooves such that the phase change layer has a pore structure. Top electrodes are formed on the phase change layer. | 05-13-2010 |
20100163830 | PHASE-CHANGE RANDOM ACCESS MEMORY CAPABLE OF REDUCING THERMAL BUDGET AND METHOD OF MANUFACTURING THE SAME - A phase-change random access memory (PRAM) is presented which can ensure the integrity of the electrical characteristics of driving transistors even when the PRAM is with a high temperature SEG fabrication process because the fabrication time is minimized. A method of manufacturing the PRAM includes the following steps. After preparing a semiconductor substrate having a cell area and a peripheral area, a junction area is formed in the cell area. Then, a transistor having a gate electrode with a single conductive layer is formed in the peripheral area. Subsequently, a first interlayer dielectric layer is formed at an upper portion of the semiconductor substrate, and then a contact hole is formed by etching the first interlayer dielectric layer to expose a predetermined portion of the junction area. Next, an epitaxial layer is grown in the contact hole. | 07-01-2010 |
20100163834 | CONTACT STRUCTURE, METHOD OF MANUFACTURING THE SAME, PHASE CHANGEABLE MEMORY DEVICE HAVING THE SAME, AND METHOD OF MANUFACTURING PHASE CHANGEABLE MEMORY DEVICE - A contact structure, a method of manufacturing the same, a phase-changeable memory device having the same, and a method of manufacturing the phase-changeable memory device are described. The phase-changeable memory device includes: an upper electrode, a bit line, and a bit line contact unit. The upper electrode is on a semiconductor substrate having a phase-change pattern. The bit line is on the upper electrode. The bit line contact unit is interposed between the upper electrode and the bit line and electrically couples together the upper electrode to the bit line. The bit line contact unit includes a main conductive layer, a first and second barrier film. The first barrier film surrounds a bottom portion and a side portion of the main conductive layer. The second barrier film is on the main conductive layer. | 07-01-2010 |
20100227439 | PHASE CHANGE MEMORY DEVICE RESISTANT TO STACK PATTERN COLLAPSE AND A METHOD FOR MANUFACTURING THE SAME - A phase change memory device resistant to stack pattern collapse is presented. The phase change memory device includes a silicon substrate, switching elements, heaters, stack patterns, bit lines and word lines. The silicon substrate has a plurality of active areas. The switching elements are connected to the active areas. The heaters are connected to the switching elements. The stack patterns are connected to the heaters. The bit lines are connected to the stack patterns. The word lines are connected to the active areas of the silicon substrate. | 09-09-2010 |
20100227440 | PHASE CHANGE MEMORY DEVICE RESISTANT TO STACK PATTERN COLLAPSE AND A METHOD FOR MANUFACTURING THE SAME - A phase change memory device resistant to stack pattern collapse is presented. The phase change memory device includes a silicon substrate, switching elements, heaters, stack patterns, bit lines and word lines. The silicon substrate has a plurality of active areas. The switching elements are connected to the active areas. The heaters are connected to the switching elements. The stack patterns are connected to the heaters. The bit lines are connected to the stack patterns. The word lines are connected to the active areas of the silicon substrate. | 09-09-2010 |
20110059591 | PHASE CHANGE MEMORY DEVICE HAVING DIELECTRIC LAYER FOR ISOLATING CONTACT STRUCTURE FORMED BY GROWTH, SEMICONDUCTOR DEVICE HAVING THE SAME, AND METHODS FOR MANUFACTURING THE DEVICES - A phase change memory device includes a semiconductor substrate having an impurity region and an interlayer dielectric applying a tensile stress formed on the semiconductor substrate and having contact holes exposing the impurity region. Switching elements are formed in the contact holes; and sidewall spacers interposed between the switching elements and the interlayer dielectric and formed as a dielectric layer applying a compressive stress. | 03-10-2011 |
20110136316 | PHASE CHANGE MEMORY DEVICE IN WHICH A PHASE CHANGE LAYER IS STABLY FORMED AND PREVENTED FROM LIFTING AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device includes a semiconductor substrate having a plurality of phase change cell regions; a lower electrode formed in each of the phase change cell regions on the semiconductor substrate; an insulation layer formed on the semiconductor substrate to cover the lower electrode and defined with a contact hole which exposes the lower electrode; a heater formed in the contact hole; a conductive pattern formed on the insulation layer to be spaced apart from the heater; a phase change layer formed on the heater, the conductive pattern, and portions of the insulation layer between the heater and the conductive pattern; and an upper electrode formed on the phase change layer. This phase change memory device allows the phase change layer to be stably formed and prevents the phase change layer from lifting | 06-09-2011 |
20110165752 | PHASE CHANGE MEMORY DEVICE CAPABLE OF INCREASING SENSING MARGIN AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device capable of increasing a sensing margin and a method for manufacturing the same. The phase change memory device includes a semiconductor substrate formed with a device isolation structure which defines active regions; first conductivity type impurity regions formed in surfaces of the active regions and having the shape of a line; a second conductivity type well formed in the semiconductor substrate at a position lower than the device isolation structure; a second conductivity type ion-implantation layer formed in the semiconductor substrate at a boundary between a lower end of the device isolation structure and the semiconductor substrate; a plurality of vertical PN diodes formed on the first conductivity type impurity regions; and phase change memory cells formed on the vertical PN diodes. | 07-07-2011 |
20110287602 | PHASE CHANGE MEMORY DEVICE HAVING A BENT HEATER AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device includes heaters which are formed in their respective memory cells and vertically positioned stack patterns having phase change layers and top electrodes which are formed to come into contact with the heaters. The heaters have horizontal cross-sectional bent shapes which can have any number of shapes such as a shape similar to that of a boomerang. The horizontal cross-sectional bent shapes of the to heaters are for minimizing the contact area between the heaters and the phase change layer so that programming currents can be reduced or minimized. | 11-24-2011 |
20120009758 | PHASE CHANGE MEMORY DEVICE TO PREVENT THERMAL CROSS-TALK AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device for preventing thermal cross-talk includes lower electrodes respectively formed in a plurality of phase change cell regions of a semiconductor substrate. A first insulation layer is formed on the semiconductor substrate including to the lower electrodes having holes for exposing the respective lower electrodes. Heaters are formed on the surfaces of the respective holes to contact the lower electrodes. A second insulation layer is formed to fill the holes in which the heaters are formed. A mask pattern is then formed on the first and second insulation layers, including the heaters, to have openings that expose portions of the respective heaters having a constant pitch. A phase change layer is formed on the mask pattern including the exposed portions of the heaters and the first and second insulation layers and subsequently, upper electrodes are formed on the phase change layer. | 01-12-2012 |
20120077324 | PHASE CHANGE MEMORY DEVICE ACCOUNTING FOR VOLUME CHANGE OF PHASE CHANGE MATERIAL AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device includes a silicon substrate including a plurality of active regions which extend in a first direction and are arranged at regular intervals in a second direction perpendicular to the first direction. Switching elements are formed in each active region of the silicon substrate and are spaced apart from one another. Phase change patterns are formed in the second direction and have the shape of lines in such that the phase change patterns connect side surfaces of pairs of switching elements which are placed adjacent to each other in a direction diagonal to the first direction. | 03-29-2012 |