Patent application number | Description | Published |
20080225615 | PULSED RING OSCILLATOR CIRCUIT FOR STORAGE CELL READ TIMING EVALUATION - A pulsed ring oscillator circuit for storage cell read timing evaluation provides read strength information. A pulse generator is coupled to a bitline to which the storage cell to be measured is connected. The storage cell thereby forms part of the ring oscillator and the read strength of the storage cell is reflected in the frequency of oscillation. A pulse regeneration circuit is included in the ring so that the storage cell read loading does not cause the oscillation to decay. Alternatively, a counter may be used to count the number of oscillations until the oscillations decay, which also yields a measure of the read strength of the storage cell. The pulse generator may have variable output current, and the current varied to determine a change in current with the storage cell enabled and disabled that produces the same oscillation frequency. The read current is the difference between currents. | 09-18-2008 |
20090116312 | Storage Array Including a Local Clock Buffer with Programmable Timing - A storage array including a local clock buffer with programmable timing provides a mechanism for evaluating circuit timing internal to the storage array. The local clock buffer can independently adjust the pulse width of a local clock that controls the wordline and local bitline precharge pulses and the pulse width of a delayed clock that controls the global bitline precharge, evaulate and read data latching. The delay between the local clock and the delayed clock can also be adjusted. By varying the pulse widths of the local and delayed clock signal, along with the inter-clock delay, the timing margins of each cell in the array can be evaluated by reading and writing the cell with varying pulse width and clock delay. The resulting evaluation can be used to evaluate timing margin variation within a die, as well variation from die-to-die and under varying environments, e.g., voltage and temperature variation. | 05-07-2009 |
20100085823 | Optimizing Sram Performance over Extended Voltage or Process Range Using Self-Timed Calibration of Local Clock Generator - A delay circuit has a fixed delay path at a lower voltage level, a level converter, and an adjustable delay path at a higher voltage level. The fixed delay path includes an inverter chain, and the adjustable delay path includes serially-connected delay elements selectively connected to the circuit output. In an application for a local clock buffer of a static, random-access memory (SRAM), the lower voltage level is that of the local clock buffer, and the higher voltage level is that of the SRAM. These voltages may vary in response to dynamic voltage scaling, requiring re-calibration of the adjustable delay path. The adjustable delay path may be calibrated by progressively increasing the read access time of the SRAM array until a contemporaneous read operation returns the correct output, or by using a replica SRAM path to simulate variations in delay with changes in voltage supply. | 04-08-2010 |
20100102854 | CIRCULAR EDGE DETECTOR - A circular edge detector on an integrated circuit including a plurality of edge detector cells, each of the plurality of edge detector cells having an input select block operable to receive a data signal and a previous cell signal and to generate a present cell signal, and a state capture block operably connected to receive the present cell signal. The present cell signal of each of the plurality of edge detector cells is provided to a next of the plurality of edge detector cells as the previous cell signal for the next of the plurality of edge detector cells, and the present cell signal from a last edge detector cell is provided to a first edge detector cell as the previous cell signal for the first edge detector cell. | 04-29-2010 |
20110018511 | INTEGRATABLE EFFICIENT SWITCHING DOWN CONVERTER - A converter circuit and methods for operating the same. The converter circuit includes a supply voltage, a capacitor, an inductor, and four stacked switching elements. Each switching element is adjustable from a low resistance state to a high resistance state by a control signal. The inductor outputs current to a circuit load. The circuit may be operated in a first mode such that the output is adjustable between the supply voltage and half the supply voltage. Alternatively, in a second mode of operation, the output is adjustable from half the supply voltage to a ground voltage. | 01-27-2011 |
20120043982 | CRITICAL PATH MONITOR HAVING SELECTABLE OPERATING MODES AND SINGLE EDGE DETECTION - A critical path monitor having selectable data output modes provides additional information about critical path delay variation. A pulse is propagated through a synthesized path representing a critical path in a functional logic circuit and a synthesized path delay is measured by a monitoring circuit that detects the arrival of an edge of the pulse at the output of the synthesized delay. The measured delay is provided as a real-time output and a processed result of the measured delay is processed according to a data output mode selected from multiple selectable output modes, thereby providing different information describing the real-time data about critical path delay, such as a range of edge positions corresponding to a variation of the critical path delay. | 02-23-2012 |
20120124669 | Hindering Side-Channel Attacks in Integrated Circuits - A mechanism is provided for protecting a layer of functional units from side-channel attacks. A determination is made as to whether one or more subsets of functional units in a set of functional units in the layer of functional units is performing operations of a critical nature. Responsive to a determination that there is one or more subsets of functional units that are performing the operations of the critical nature, at least one concealing pattern is generated in a concealing layer in order to conceal the operations of the critical nature being performed by each of the subset of functional units. The concealing layer is electrically and physically coupled to the layer of functional units. | 05-17-2012 |
20120200285 | WIRE MANAGEMENT METHOD WITH CURRENT AND VOLTAGE SENSING - A wire management method using a wire manager including current sensing features provides input for power measurement and management systems. The wire manager may be a single wire or single bundle retaining device with a current sensor such as a hall effect sensor integrated therein, or may be a multi-wire management housing with multiple current sensing devices disposed inside for measuring the current through multiple wires. The wires may be multiple branch circuits in a power distribution panel or raceway, and the wire manager may be adapted for mounting in such a panel or raceway. Voltage sensing may also be incorporated within the sensors by providing an electrically conductive plate, wire or other element that capacitively couples to the corresponding wire. | 08-09-2012 |
20120200291 | NON-CONTACT CURRENT AND VOLTAGE SENSOR - A detachable current and voltage sensor provides an isolated and convenient device to measure current passing through a conductor such as an AC branch circuit wire, as well as providing an indication of an electrostatic potential on the wire, which can be used to indicate the phase of the voltage on the wire, and optionally a magnitude of the voltage. The device includes a housing that contains the current and voltage sensors, which may be a ferrite cylinder with a hall effect sensor disposed in a gap along the circumference to measure current, or alternative a winding provided through the cylinder along its axis and a capacitive plate or wire disposed adjacent to, or within, the ferrite cylinder to provide the indication of the voltage. | 08-09-2012 |
20120200293 | NON-CONTACT CURRENT AND VOLTAGE SENSING METHOD - A method of measurement using a detachable current and voltage sensor provides an isolated and convenient technique for to measuring current passing through a conductor such as an AC branch circuit wire, as well as providing an indication of an electrostatic potential on the wire, which can be used to indicate the phase of the voltage on the wire, and optionally a magnitude of the voltage. The device includes a housing that contains the current and voltage sensors, which may be a ferrite cylinder with a hall effect sensor disposed in a gap along the circumference to measure current, or alternative a winding provided through the cylinder along its axis and a capacitive plate or wire disposed adjacent to, or within, the ferrite cylinder to provide the indication of the voltage. | 08-09-2012 |
20120203481 | WIRE MANAGER WITH CURRENT AND VOLTAGE SENSING - A wire manager including current sensing features provides input for power measurement and management systems. The wire manager may be a single wire or single bundle retaining device with a current sensor such as a hall effect sensor integrated therein, or may be a multi-wire management housing with multiple current sensing devices disposed inside for measuring the current through multiple wires. The wires may be multiple branch circuits in a power distribution panel or raceway, and the wire manager may be adapted for mounting in such a panel or raceway. Voltage sensing may also be incorporated within the sensors by providing an electrically conductive plate, wire or other element that capacitively couples to the corresponding wire. | 08-09-2012 |
20130055185 | VERTICAL POWER BUDGETING AND SHIFTING FOR 3D INTEGRATION - A method is provided for managing power distribution on a 3D chip stack having two or more strata, a plurality of vertical power delivery structures, and multiple stack components. At least two stack components are on different strata. Operating modes are stored that respectively have different power dissipations. A respective effective power budget is determined for each of the at least two stack components based on respective ones of the operating modes targeted therefor, and power characteristics and thermal characteristics of at least some of the stack components inclusive or exclusive of the at least two stack components. The respective ones of the plurality of operating modes targeted for the at least two stack components are selectively accepted or re-allocated based on the respective effective power budget for each of the at least two stack components, power constraints, and thermal constraints. The power constraints include vertical structure electrical constraints. | 02-28-2013 |
20130076343 | NON-CONTACT CURRENT AND VOLTAGE SENSING CLAMP - A clamping current and voltage sensor provides an isolated and convenient technique for measuring current passing through a conductor such as an AC branch circuit wire, as well as providing an indication of an electrostatic potential on the wire, which can be used to indicate the phase of the voltage on the wire, and optionally a magnitude of the voltage. The device includes a body formed from two handle portions that contain the current and voltage sensors within an aperture at the distal end, which may be a ferrite cylinder with a hall effect sensor disposed in a gap along the circumference to measure current, or alternatively a winding provided through the cylinder along its axis and a capacitive plate or wire disposed adjacent to, or within, the ferrite cylinder to provide the indication of the voltage. When the handles are compressed the aperture is opened to permit insertion of a wire for measurement. | 03-28-2013 |
20130113448 | COIL INDUCTOR FOR ON-CHIP OR ON-CHIP STACK - A coil inductor and buck voltage regulator incorporating the coil inductor are provided which can be fabricated on a microelectronic element such as a semiconductor chip, or on an interconnection element such as a semiconductor, glass or ceramic interposer element. When energized, the coil inductor has magnetic flux extending in a direction parallel to first and second opposed surfaces of the microelectronic or interconnection element, and whose peak magnetic flux is disposed between the first and second surfaces. In one example, the coil inductor can be formed by first conductive lines extending along the first surface of the microelectronic or interconnection element, second conductive lines extending along the second surface of the microelectronic or interconnection element, and a plurality of conductive vias, e.g., through silicon vias, extending in direction of a thickness of the microelectronic or interconnection element. A method of making the coil inductor is also provided. | 05-09-2013 |
20130307656 | Stacked Through-Silicon Via (TSV) Transformer Structure - A distributed active transformer is provided comprising a primary and a secondary winding. The primary winding comprises a first set of conductive vias extending in a direction between a first surface and a second surface of an element, a first set of first electrically conductive lines extending along the first surface, and a first set of second electrically conductive lines extending along the second surface. The secondary winding comprises a second set of conductive vias extending in a direction between the first surface and the second surface, a second set of first electrically conductive lines extending along the first surface, and a second set of second electrically conductive lines extending along the second surface. When energized, the primary winding generates magnetic flux extending in a direction parallel to the first surface and the second surface. The secondary winding receives energy transferred by the magnetic flux generated by the primary winding. | 11-21-2013 |
20140136786 | ASYNCHRONOUS PERSISTENT STORES FOR TRANSACTIONS - A processor includes a processor core, a cache, and a tracker. The processor core is configured to execute persistent write instructions and receive notifications of completed persistent write instructions. The tracker is configured to track the completion state of a persistent write instruction. | 05-15-2014 |
20140312895 | NON-CONTACT CURRENT AND VOLTAGE SENSOR - A detachable current and voltage sensor provides an isolated and convenient device to measure current passing through a conductor such as an AC branch circuit wire, as well as providing an indication of an electrostatic potential on the wire, which can be used to indicate the phase of the voltage on the wire, and optionally a magnitude of the voltage. The device includes a housing that contains the current and voltage sensors, which may be a ferrite cylinder with a hall effect sensor disposed in a gap along the circumference to measure current, or alternative a winding provided through the cylinder along its axis and a capacitive plate or wire disposed adjacent to, or within, the ferrite cylinder to provide the indication of the voltage. | 10-23-2014 |