Patent application number | Description | Published |
20080292325 | HIGH IMMUNITY CLOCK REGENERATION OVER OPTICALLY ISOLATED CHANNEL - An optically isolated circuit device includes a first opto-isolator circuit that is driven by a first clock signal, and the output of the first opto-isolator circuit is used to drive a phase-locked loop (PLL) that is configured to synthesize a second clock signal having a frequency that is a multiple of the first clock signal frequency. The second clock signal is used as an input to a suitable clocked circuit of a type that benefits from optical isolation, such as an analog-to-digital converter (ADC). | 11-27-2008 |
20090206817 | High Voltage Drive Circuit Employing Capacitive Signal Coupling and Associated Devices and Methods - According to one embodiment, there is provided a high voltage drive circuit comprising drive and sense electrodes formed substantially in a single plane. The device effects signal transfer between drive and receive circuits through the drive and sense electrodes by capacitive means, and permits high voltage devices, such as IGBTs, to be driven thereby without the use of high voltage transistors, thereby eliminating the need to use expensive fabrication processes such as SOI when manufacturing high voltage gate drive circuits and ICs. The device may be formed in a small package using, by way of example, using CMOS or other conventional low-cost semiconductor fabrication and packaging processes. | 08-20-2009 |
20090206958 | High Voltage Isolation Semiconductor Capacitor Digital Communication Device and Corresponding Package - According to one embodiment, there is provided a semiconductor digital communication device comprising communication drive and sense electrodes formed in a single plane, where the electrodes have relatively high sidewalls. The relatively high sidewalls permit low electrical field densities to be obtained in the sense and drive electrodes during operation, and further permit very high breakdown voltages to be obtained between the electrodes, and between the drive electrode and an underlying ground plane substrate. The device effects communications between drive and receive circuits through the drive and sense electrodes by capacitive means, and in a preferred embodiment is capable of effecting relatively high-speed digital communications. The device may be formed in a small package using, by way of example, CMOS or other semiconductor fabrication and packaging processes. | 08-20-2009 |
20090206960 | High Voltage Isolation Dual Capacitor Communication System - According to one embodiment, there is provided a high voltage isolation dual capacitor communication system comprising communication drive and sense electrodes and corresponding first and second capacitors that are formed in two separate devices. The two devices are electrically connected in series to provide a single galvanicly-isolated communication system that exhibits high breakdown voltage performance in combination with good signal coupling. The system effects communications between drive and receive circuits through the first and second capacitors, and in a preferred embodiment is capable of effecting relatively high-speed digital communications. The system may be formed in a small package using, by way of example, CMOS or other semiconductor fabrication and packaging processes. | 08-20-2009 |
20100213874 | Optocoupler System with Reduced Power Consumption and Pulse Width Distortion - According to one embodiment, there is provided an optocoupler system configured to generate current signals having high, low and no amplitude portions in response to the receipt of logic high and low input signals. The varying amplitude portions of the current signals are used to drive other portions of the isolation circuitry, and result in reduced power consumption and dissipation, as well as reduced pulse width distortion. | 08-26-2010 |
20100329363 | Wake-Up Circuits, Devices and Methods for Galvanic Isolators - According to one embodiment, there is provided a method of reducing the amount of power consumed by a galvanic isolator. A transmitter transmits a wake-up signal to a receiver located across an isolation medium when the transmitter is ready or preparing to transmit data or power signals to a receiver, which is operably connected to a sensing circuit. The sensing circuit receives the wake-up signal through the isolation medium, which may be operably connected to and powered substantially continuously or intermittently by a first power source. In response to the sensing circuit receiving the wake-up signal, the receiver is powered up from a sleep mode to an operating mode. After a period of time t | 12-30-2010 |
20150115407 | Isolation Device - In one embodiment, an isolation device has a substrate, a metal plate, a conductive layer, first and second isolation layers are disclosed. The conductive layer may be formed within the substrate. The conductive layer may be arranged coupled to the metal plate, so as to receive a capacitively coupled signal from the metal plate. The first and second isolation layers may be sandwiched between the metal plate and the conductive layer. In another embodiment, an isolation device comprising a semiconductor substrate, a topmost metal layer and a plurality of additional metal layers is disclosed. The isolation device further comprises an isolation capacitor formed using the topmost metal layer and a conductive layer coupled to at least one of the plurality of additional metal layers. | 04-30-2015 |
20150214292 | ISOLATION DEVICE - In one embodiment, an isolation device has a substrate, a metal plate, a conductive layer, first and second isolation layers are disclosed. The conductive layer may be formed within the substrate. The conductive layer may be arranged coupled to the metal plate, so as to receive a capacitively coupled signal from the metal plate. The first and second isolation layers may be sandwiched between the metal plate and the conductive layer. In another embodiment, an isolation device comprising a semiconductor substrate, a topmost metal layer and a plurality of additional metal layers is disclosed. The isolation device further comprises an isolation capacitor formed using the topmost metal layer and a conductive layer coupled to at least one of the plurality of additional metal layers. | 07-30-2015 |