Fuller, NC
Andrew C. Fuller, Greensboro, NC US
Patent application number | Description | Published |
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20120016989 | Advanced Gateway Device - The present disclosure is directed to an advanced gateway device (“gateway”) for enabling communications between devices operating on or in communication with a communications network. The gateway includes a universal integrated circuit card (“UICC”), a router for interfacing with a number of devices, a network interface for communicating with the communications network, and one or more applications for managing associated devices and communications between the devices and the communications network. The gateway is registered with the communications network by transmitting information generated by the UICC to the communications network. Devices communicating with the gateway can access services provided by components of the communications network, and remote devices can access the devices communicating with the gateway based upon a trust relationship established between the gateway and the communications network. | 01-19-2012 |
Andrew M. Fuller, Chapel Hill, NC US
Patent application number | Description | Published |
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20100220828 | EDGE-BASED SAMPLER OFFSET CORRECTION - Embodiments of a circuit are described. This circuit includes a receiver circuit including a first sampler ( | 09-02-2010 |
20110239030 | MESOCHRONOUS SIGNALING SYSTEM WITH CORE-CLOCK SYNCHRONIZATION - In a low-power signaling system, an integrated circuit device includes an open loop-clock distribution circuit and a transmit circuit that cooperate to enable high-speed transmission of information-bearing symbols unaccompanied by source-synchronous timing references. The open-loop clock distribution circuit generates a transmit clock signal in response to an externally-supplied clock signal, and the transmit circuit outputs a sequence of symbols onto an external signal line in response to transitions of the transmit clock signal. Each of the symbols is valid at the output of the transmit circuit for a symbol time and a phase offset between the transmit clock signal and the externally-supplied clock signal is permitted to drift by at least the symbol time. | 09-29-2011 |
20110239031 | MESOCHRONOUS SIGNALING SYSTEM WITH CLOCK-STOPPED LOW POWER MODE - In a low-power signaling system, an integrated circuit device includes an open loop-clock distribution circuit and a transmit circuit that cooperate to enable high-speed transmission of information-bearing symbols unaccompanied by source-synchronous timing references. The open-loop clock distribution circuit generates a transmit clock signal in response to an externally-supplied clock signal, and the transmit circuit outputs a sequence of symbols onto an external signal line in response to transitions of the transmit clock signal. Each of the symbols is valid at the output of the transmit circuit for a symbol time and a phase offset between the transmit clock signal and the externally-supplied clock signal is permitted to drift by at least the symbol time. | 09-29-2011 |
Andrew M. Fuller, Durham, NC US
Patent application number | Description | Published |
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20100085100 | Low-Power Clock Generation and Distribution Circuitry - A communication IC includes a power-efficient clock-distribution system. A control loop monitors and adjusts the peak and trough voltages of a clock signal. The clock signal can be adaptively adjusted to center the peak and trough voltages about the switching threshold voltage of a clock buffer. The voltage swing of the clock signal can thus be made small and, as a consequence, power efficient. The control loop can monitor and control more than one clock signal. | 04-08-2010 |
20100309791 | EDGE-BASED LOSS-OF-SIGNAL DETECTION - Systems and methods are provided for edge-based loss-of-signal (LOS) detection. In a receiver, a receiver port receives a data signal. A clock and data recovery (CDR) mechanism coupled to the receive port derives one or more clock signals. An LOS signal generation mechanism generates an LOS signal based on edge glitches which occur when the receive port does not receive usable data. | 12-09-2010 |
20150074437 | MEMORY CONTROLLER WITH TRANSACTION-QUEUE-MONITORING POWER MODE CIRCUITRY - An integrated-circuit memory controller outputs to a memory device a first signal in a first state to enable operation of synchronous data transmission and reception circuits within the memory device. A transaction queue within the memory controller stores memory read and write requests that, to be serviced, require operation of the synchronous data transmission and reception circuits, respectively, within the memory device. Power control circuitry within the memory controller determines that the transaction queue has reached a predetermined state and, in response, outputs the first signal to the memory device in a second state to disable operation of the synchronous data transmission and reception circuits within the memory device. | 03-12-2015 |
Anthony B. Fuller, Mooresville, NC US
Patent application number | Description | Published |
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20100156013 | INCREASED AND VARIABLE FORCE AND MULTI-SPEED CLAMPS - A method of operating a clamp ( | 06-24-2010 |
20110316210 | INCREASED AND VARIABLE FORCE AND MULTI-SPEED CLAMPS - A method of operating a clamp ( | 12-29-2011 |
20140182116 | INCREASED AND VARIABLE FORCE AND MULTI-SPEED CLAMPS - A method of operating a clamp ( | 07-03-2014 |
David Graham Fuller, Gastonia, NC US
Patent application number | Description | Published |
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20100005640 | SCRIVET FASTENER REMOVAL TOOL - A tool for removing a scrivet having a central shank and a compression sleeve having circumferentially spaced-apart wing elements is provided. The tool includes a first handle and a second handle, a first pair of gripping members configured to grip about the central shank of the scrivet, a second pair of gripping members configured to grip about the base of the scrivet, a first connecting mechanism attached to the first pair of gripping members, and a second connecting mechanism attached to the second pair of gripping members. The tool is configured such that the first pair of gripping members engages the central shank upon a first predetermined amount of movement of the handles and pull the central shank at a second predetermined amount of movement of the handles. A third predetermined movement of the handles causes the second pair of gripping members to grip the base of the scrivet. | 01-14-2010 |
John D. Fuller, Wilmington, NC US
Patent application number | Description | Published |
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20090135988 | Fail-Free Fuel Bundle Assembly - A fuel bundle for a nuclear reactor core is provided. The fuel bundle may include a plurality of rods comprised of nuclear fuel rods and/or isotope production rods. Each rod includes a plurality of interconnected rod segments, wherein at least two of the rod segments of at least one rod have different outside diameters. The fuel bundle may additionally include a plurality of rod spacer grids securely retained between axially adjacent, interconnected rod segments. The rod spacer grids interconnected between axially adjacent rod segments form an array of substantially equally spaced rods. The fuel bundle may further include an elongate tubular channel in which the arrayed rods are housed. | 05-28-2009 |
John Dean Fuller, Wilmington, NC US
Patent application number | Description | Published |
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20100100364 | METHOD AND APPARATUS FOR MOVING NUCLEAR FUEL - The apparatus for creating and editing a nuclear reactor core template includes a graphical user interface and a processor controlling the graphical user interface to allow a user to selectively populate a loading map with fuel bundles residing in at least one fuel pool. | 04-22-2010 |