Patent application number | Description | Published |
20140290164 | INSULATED FRAMING MEMBER - An insulated framing member for exterior wall insulation installation, and to a method for covering walls using the insulated framing member. The insulated framing member comprises a strip of insulating foam having chamfers along the edges, optionally laminated to a wooden nail base. They insulated framing member will reduce the compression of compressible insulation materials and the thermal bridging of fasteners. | 10-02-2014 |
20150204064 | INSULATED FRAMING MEMBER - An insulated framing member for exterior wall insulation, and a method for covering walls with insulation materials using the insulated framing member underneath a water or weather-resistant barrier. The insulated framing member comprises a strip of insulating foam having chamfers along the edges, laminated to a wooden nailable substrate. The insulated framing member will reduce the compression of compressible insulation materials, the thermal bridging of fasteners, and eliminate water entrapment. | 07-23-2015 |
20150300005 | INSULATED BATTENS FOR INSTALLATION OF EXTERIOR WALL INSULATION AT CORNERS AND ARCHITECTURAL TRIM - An insulated trim batten for installing exterior wall insulation. The insulated trim batten comprises a strip of insulating foam having a chamfer along one edge, laminated to a wooden nailable substrate. The insulated trim batten reduces the compression of compressible insulation materials, the thermal bridging of fasteners, and eliminate water entrapment. | 10-22-2015 |
20160060883 | DEVICE FOR CONTROLLING THE SPACING BETWEEN SIDING MATERIALS AND COMPRESSIBLE INSULATION MATERIALS - A spacing device and a method for installing siding materials over Tyvek® ThermaWrap™ R5.0 or any compressible insulating house wrap. The spacing device | 03-03-2016 |
Patent application number | Description | Published |
20080313714 | Systems and methods for network authentication - Exemplary systems and methods for network authentication are provided. Exemplary systems include an application program interface configured for receiving a request for an authentication code, a code generator in communication with the application program interface, the code generator configured to generate the authentication code, and the application program interface further configured to receive the generated authentication code and allow an application to communicate digital data with a web-based social network. Further systems include the generated authentication code being received from a network device without an Internet browser and the received generated authentication code allowing an application to communicate digital data with a web-based social network for an extended period of time. Exemplary methods include receiving a request for an authentication code, generating the authentication code, receiving the generated authentication code, and allowing an application to communicate digital data with a web-based social network. | 12-18-2008 |
20090031301 | Personalized platform for accessing internet applications - The present invention provides a system and method for providing a personalized platform for accessing internet applications. According to one embodiment of the invention, a social network provider receives a request for installation of an application from a user of the social network, installs the application at multiple points in the user's social network environment, and personalizes interfaces with the application at these integration points based on information about the user available from the social network. The present invention enables applications to be integrated in the social network environment at multiple integration points and to be personalized for and configured by the user. | 01-29-2009 |
20090049525 | Platform for providing a social context to software applications - The present invention provides a system and method for providing a social context to software applications. According to one embodiment of the invention, a user of a social network authorizes access by an external software application to information available in the social network. At some time later, the user of the social network uses an application designed by a third-party software developer. The application contacts the social network provider for permission to access the information available in the social network. If access has been authorized, the application incorporates the information from the social network into its interaction with the user, providing a social context to the user's interaction with the application. | 02-19-2009 |
20120174190 | System and Methods for Network Authentication - Exemplary systems and methods for network authentication are provided. Exemplary systems include an application program interface configured for receiving a request for an authentication code, a code generator in communication with the application program interface, the code generator configured to generate the authentication code, and the application program interface further configured to receive the generated authentication code and allow an application to communicate digital data with a web-based social network. Further systems include the generated authentication code being received from a network device without an Internet browser and the received generated authentication code allowing an application to communicate digital data with a web-based social network for an extended period of time. Exemplary methods include receiving a request for an authentication code, generating the authentication code, receiving the generated authentication code, and allowing an application to communicate digital data with a web-based social network. | 07-05-2012 |
20140223519 | Platform for Providing a Social Context to Software Applications - The present invention provides a system and method for providing a social context to software applications. According to one embodiment of the invention, a user of a social network authorizes access by an external software application to information available in the social network. At some time later, the user of the social network uses an application designed by a third-party software developer. The application contacts the social network provider for permission to access the information available in the social network. If access has been authorized, the application incorporates the information from the social network into its interaction with the user, providing a social context to the user's interaction with the application. | 08-07-2014 |
Patent application number | Description | Published |
20110089792 | PORTABLE COMPUTER HOUSING - An aluminum housing and methods of fabrication are described. The computer housing being suitable for enclosing a computer assembly. The aluminum housing includes an aluminum structural support portion covered by a thermoplastic elastomer material. The aluminum is first textured and anodized before an adhesive film is applied to an unsealed anodized aluminum surface. The thermoplastic elastomer material is then overmolded onto the pre-bonded aluminum structural support to provide a protective layer that is pleasing to the eye and touch. | 04-21-2011 |
20110090630 | PORTABLE COMPUTER DISPLAY HOUSING - A display housing for a portable computing device that utilizes a plastic cover bonded to an internal metal frame is described. To account for thermal cycling issues and in particular to prevent bond slippage, multiple types of adhesives are employed to join the metal frame and the plastic cover. In particular, a very high bond (VHB) adhesive material is used in certain areas to bond the metal inner frame to the plastic cover and a liquid adhesive is used in other areas. The plastic cover can be translucent to light. A method of coating the plastic cover to block light, such as from a backlight used for the display, is described. | 04-21-2011 |
20110090712 | PORTABLE COMPUTER DISPLAY HOUSING - A display housing for a portable computing device that utilizes a plastic cover bonded to an internal metal frame is described. To account for thermal cycling issues and in particular to prevent bond slippage, multiple types of adhesives are employed to join the metal frame and the plastic cover. In particular, a very high bond (VHB) adhesive material is used in certain areas to bond the metal inner frame to the plastic cover and a liquid adhesive is used in other areas. The plastic cover can be translucent to light. A method of coating the plastic cover to block light, such as from a backlight used for the display, is described. | 04-21-2011 |
20110091051 | PORTABLE COMPUTER ELECTRICAL GROUNDING AND AUDIO SYSTEM ARCHITECTURES - A portable computing device having a substantially non-conducting outer housing and alternative electrical grounding and audio system architectures is disclosed. The device can be a laptop computer having a main logic board, a keyboard assembly, an audio source positioned below the keyboard assembly, and an equalizer electrically coupled to the audio source, with each of these components being electrically coupled to a universal grounding structure. The audio source emits sound waves that are propagated through the keyboard assembly and between gaps between keyboard keys and the outer housing. Settings for the equalizer can be selected to account for sound absorption and amplification characteristics of the sound waves along these sound transmission paths. The universal grounding structure includes a plurality of separate ground components that are electrically intercoupled, each being substantially smaller than the overall portable computing device, and also includes an electromagnetic interference shield around the main logic board. | 04-21-2011 |
20120268881 | PORTABLE COMPUTER DISPLAY HOUSING - A display housing for a portable computing device that utilizes a plastic cover bonded to an internal metal frame is described. To account for thermal cycling issues and in particular to prevent bond slippage, multiple types of adhesives are employed to join the metal frame and the plastic cover. In particular, a very high bond (VHB) adhesive material is used in certain areas to bond the metal inner frame to the plastic cover and a liquid adhesive is used in other areas. The plastic cover can be translucent to light. A method of coating the plastic cover to block light, such as from a backlight used for the display, is described. | 10-25-2012 |
20130314954 | POWER SUPPLY INPUT ROUTING - One embodiment of a power supply input routing apparatus can include a multilayer printed circuit board configured to accept only an alternating current (AC) line voltage, return and ground signals. The AC power jumper board can advantageously route AC power from one section of the power supply to another without burdening the power supply design with extra layer requirements or negatively increasing power supply area. Embodiments including an electronic device having a power supply as above are also disclosed. | 11-28-2013 |
20130343589 | PORTABLE COMPUTER ELECTRICAL GROUNDING AND AUDIO SYSTEM ARCHITECTURES - A portable computing device having a substantially non-conducting outer housing and alternative electrical grounding and audio system architectures is disclosed. The device can be a laptop computer having a main logic board, a keyboard assembly, an audio source positioned below the keyboard assembly, and an equalizer electrically coupled to the audio source, with each of these components being electrically coupled to a universal grounding structure. The audio source emits sound waves that are propagated through the keyboard assembly and between gaps between keyboard keys and the outer housing. Settings for the equalizer can be selected to account for sound absorption and amplification characteristics of the sound waves along these sound transmission paths. The universal grounding structure includes a plurality of separate ground components that are electrically intercoupled, each being substantially smaller than the overall portable computing device, and also includes an electromagnetic interference shield around the main logic board. | 12-26-2013 |
20140361671 | COMPUTER INTERNAL ARCHITECTURE - An internal component and external interface arrangement for a cylindrical compact computing system is described that includes at least a structural heat sink having triangular shape disposed within a cylindrical volume defined by a cylindrical housing. A computing engine having a generally triangular shape is described having internal components that include a graphics processing unit (GPU) board, a central processing unit (CPU) board, an input/output (I/O) interface board, an interconnect board, and a power supply unit (PSU). | 12-11-2014 |
20140361893 | COMPUTER INPUT/OUTPUT INTERFACE - An internal component and external interface arrangement for a cylindrical compact computing system is described that includes at least a structural heat sink having triangular shape disposed within a cylindrical volume defined by a cylindrical housing. A computing engine having a generally triangular shape is described having internal components that include a graphics processing unit (GPU) board, a central processing unit (CPU) board, an input/output (I/O) interface board, an interconnect board, and a power supply unit (PSU). | 12-11-2014 |
20140362522 | COMPUTER THERMAL SYSTEM - The present application describes various embodiments regarding systems and methods for providing efficient heat rejection for a lightweight and durable compact computing system having a small form factor. The compact computing system can take the form of a desktop computer. The desktop computer can include a monolithic top case having an integrated support system formed therein, the integrated support system providing structural support that distributes applied loads through the top case preventing warping and bowing. A mixed flow fan is utilized to efficiently pull cooling air through the compact computing system. | 12-11-2014 |
20140362523 | COMPUTER THERMAL MANAGEMENT - The present application describes various embodiments regarding systems and methods for providing efficient heat rejection for a lightweight and durable compact computing system having a small form factor. The compact computing system can take the form of a desktop computer. The desktop computer can include a monolithic top case having an integrated support system formed therein, the integrated support system providing structural support that distributes applied loads through the top case preventing warping and bowing. A mixed flow fan is utilized to efficiently pull cooling air through the compact computing system. | 12-11-2014 |
20140362576 | COMPUTER ARCHITECTURE - An internal component and external interface arrangement for a cylindrical compact computing system is described that includes at least a structural heat sink having triangular shape disposed within a cylindrical volume defined by a cylindrical housing. A computing engine having a generally triangular shape is described having internal components that include a graphics processing unit (GPU) board, a central processing unit (CPU) board, an input/output (I/O) interface board, an interconnect board, and a power supply unit (PSU). | 12-11-2014 |
20150253822 | COMPUTER THERMAL SYSTEM - The present application describes various embodiments regarding systems and methods for providing efficient heat rejection for a lightweight and durable compact computing system having a small form factor. The compact computing system can take the form of a desktop computer. The desktop computer can include a monolithic top case having an integrated support system formed therein, the integrated support system providing structural support that distributes applied loads through the top case preventing warping and bowing. A mixed flow fan is utilized to efficiently pull cooling air through the compact computing system. | 09-10-2015 |
Patent application number | Description | Published |
20130159684 | BATCHED REPLAYS OF DIVERGENT OPERATIONS - One embodiment of the present invention sets forth an optimized way to execute replay operations for divergent operations in a parallel processing subsystem. Specifically, the streaming multiprocessor (SM) includes a multistage pipeline configured to batch two or more replay operations for processing via replay loop. A logic element within the multistage pipeline detects whether the current pipeline stage is accessing a shared resource, such as loading data from a shared memory. If the threads are accessing data which are distributed across multiple cache lines, then the multistage pipeline batches two or more replay operations, where the replay operations are inserted into the pipeline back-to-back. Advantageously, divergent operations requiring two or more replay operations operate with reduced latency. Where memory access operations require transfer of more than two cache lines to service all threads, the number of clock cycles required to complete all replay operations is reduced. | 06-20-2013 |
20130166877 | SHAPED REGISTER FILE READS - One embodiment of the present invention sets forth a technique for performing a shaped access of a register file that includes a set of N registers, wherein N is greater than or equal to two. The technique involves, for at least one thread included in a group of threads, receiving a request to access a first amount of data from each register in the set of N registers, and configuring a crossbar to allow the at least one thread to access the first amount of data from each register in the set of N registers. | 06-27-2013 |
20130166882 | METHODS AND APPARATUS FOR SCHEDULING INSTRUCTIONS WITHOUT INSTRUCTION DECODE - Systems and methods for scheduling instructions without instruction decode. In one embodiment, a multi-core processor includes a scheduling unit in each core for scheduling instructions from two or more threads scheduled for execution on that particular core. As threads are scheduled for execution on the core, instructions from the threads are fetched into a buffer without being decoded. The scheduling unit includes a macro-scheduler unit for performing a priority sort of the two or more threads and a micro-scheduler arbiter for determining the highest order thread that is ready to execute. The macro-scheduler unit and the micro-scheduler arbiter use pre-decode data to implement the scheduling algorithm. The pre-decode data may be generated by decoding only a small portion of the instruction or received along with the instruction. Once the micro-scheduler arbiter has selected an instruction to dispatch to the execution unit, a decode unit fully decodes the instruction. | 06-27-2013 |
20130212364 | PRE-SCHEDULED REPLAYS OF DIVERGENT OPERATIONS - One embodiment of the present disclosure sets forth an optimized way to execute pre-scheduled replay operations for divergent operations in a parallel processing subsystem. Specifically, a streaming multiprocessor (SM) includes a multi-stage pipeline configured to insert pre-scheduled replay operations into a multi-stage pipeline. A pre-scheduled replay unit detects whether the operation associated with the current instruction is accessing a common resource. If the threads are accessing data which are distributed across multiple cache lines, then the pre-scheduled replay unit inserts pre-scheduled replay operations behind the current instruction. The multi-stage pipeline executes the instruction and the associated pre-scheduled replay operations sequentially. If additional threads remain unserviced after execution of the instruction and the pre-scheduled replay operations, then additional replay operations are inserted via the replay loop, until all threads are serviced. One advantage of the disclosed technique is that divergent operations requiring one or more replay operations execute with reduced latency. | 08-15-2013 |
20130232322 | UNIFORM LOAD PROCESSING FOR PARALLEL THREAD SUB-SETS - One embodiment of the present invention sets forth a technique for processing load instructions for parallel threads of a thread group when a sub-set of the parallel threads request the same memory address. The load/store unit determines if the memory addresses for each sub-set of parallel threads match based on one or more uniform patterns. When a match is achieved for at least one of the uniform patterns, the load/store unit transmits a read request to retrieve data for the sub-set of parallel threads. The number of read requests transmitted is reduced compared with performing a separate read request for each thread in the sub-set. A variety of uniform patterns may be defined based on common access patterns present in program instructions. A variety of uniform patterns may also be defined based on interconnect constraints between the load/store unit and the memory when a full crossbar interconnect is not available. | 09-05-2013 |
20130268715 | DYNAMIC BANK MODE ADDRESSING FOR MEMORY ACCESS - One embodiment sets forth a technique for dynamically mapping addresses to banks of a multi-bank memory based on a bank mode. Application programs may be configured to perform read and write a memory accessing different numbers of bits per bank, e.g., 32-bits per bank, 64-bits per bank, or 128-bits per bank. On each clock cycle an access request may be received from one of the application programs and per processing thread addresses of the access request are dynamically mapped based on the bank mode to produce a set of bank addresses. The bank addresses are then used to access the multi-bank memory. Allowing different bank mappings enables each application program to avoid bank conflicts when the memory is accesses compared with using a single bank mapping for all accesses. | 10-10-2013 |
20130311686 | MECHANISM FOR TRACKING AGE OF COMMON RESOURCE REQUESTS WITHIN A RESOURCE MANAGEMENT SUBSYSTEM - One embodiment of the present disclosure sets forth an effective way to maintain fairness and order in the scheduling of common resource access requests related to replay operations. Specifically, a streaming multiprocessor (SM) includes a total order queue (TOQ) configured to schedule the access requests over one or more execution cycles. Access requests are allowed to make forward progress when needed common resources have been allocated to the request. Where multiple access requests require the same common resource, priority is given to the older access request. Access requests may be placed in a sleep state pending availability of certain common resources. Deadlock may be avoided by allowing an older access request to steal resources from a younger resource request. One advantage of the disclosed technique is that older common resource access requests are not repeatedly blocked from making forward progress by newer access requests. | 11-21-2013 |
20130311996 | MECHANISM FOR WAKING COMMON RESOURCE REQUESTS WITHIN A RESOURCE MANAGEMENT SUBSYSTEM - One embodiment of the present disclosure sets forth an effective way to maintain fairness and order in the scheduling of common resource access requests related to replay operations. Specifically, a streaming multiprocessor (SM) includes a total order queue (TOQ) configured to schedule the access requests over one or more execution cycles. Access requests are allowed to make forward progress when needed common resources have been allocated to the request. Where multiple access requests require the same common resource, priority is given to the older access request. Access requests may be placed in a sleep state pending availability of certain common resources. Deadlock may be avoided by allowing an older access request to steal resources from a younger resource request. One advantage of the disclosed technique is that older common resource access requests are not repeatedly blocked from making forward progress by newer access requests. | 11-21-2013 |
20130311999 | RESOURCE MANAGEMENT SUBSYSTEM THAT MAINTAINS FAIRNESS AND ORDER - One embodiment of the present disclosure sets forth an effective way to maintain fairness and order in the scheduling of common resource access requests related to replay operations. Specifically, a streaming multiprocessor (SM) includes a total order queue (TOQ) configured to schedule the access requests over one or more execution cycles. Access requests are allowed to make forward progress when needed common resources have been allocated to the request. Where multiple access requests require the same common resource, priority is given to the older access request. Access requests may be placed in a sleep state pending availability of certain common resources. Deadlock may be avoided by allowing an older access request to steal resources from a younger resource request. One advantage of the disclosed technique is that older common resource access requests are not repeatedly blocked from making forward progress by newer access requests. | 11-21-2013 |
Patent application number | Description | Published |
20150081753 | TECHNIQUE FOR PERFORMING ARBITRARY WIDTH INTEGER ARITHMETIC OPERATIONS USING FIXED WIDTH ELEMENTS - One embodiment of the present invention includes a method for performing arithmetic operations on arbitrary width integers using fixed width elements. The method includes receiving a plurality of input operands, segmenting each input operand into multiple sectors, performing a plurality of multiply-add operations based on the multiple sectors to generate a plurality of multiply-add operation results, and combining the multiply-add operation results to generate a final result. One advantage of the disclosed embodiments is that, by using a common fused floating point multiply-add unit to perform arithmetic operations on integers of arbitrary width, the method avoids the area and power penalty of having additional dedicated integer units. | 03-19-2015 |
20150089202 | SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR IMPLEMENTING MULTI-CYCLE REGISTER FILE BYPASS - A system, method, and computer program product are provided for implementing a multi-cycle register file bypass mechanism. The method includes the steps of receiving a set of control bits, combining the set of control bits with a set of valid bits associated with previously issued instructions, and enabling a bypass path for each thread based on the set of control bits and the set of valid bits. Each valid bit in the set of valid bits indicates whether execution of an instruction of the previously issued instructions was enabled for a thread in a thread block. | 03-26-2015 |
20150113254 | EFFICIENCY THROUGH A DISTRIBUTED INSTRUCTION SET ARCHITECTURE - A subsystem is configured to support a distributed instruction set architecture with primary and secondary execution pipelines. The primary execution pipeline supports the execution of a subset of instructions in the distributed instruction set architecture that are issued frequently. The secondary execution pipeline supports the execution of another subset of instructions in the distributed instruction set architecture that are issued less frequently. Both execution pipelines also support the execution of FFMA instructions as well a common subset of instructions in the distributed instruction set architecture. When dispatching a requested instruction, an instruction scheduling unit is configured to select between the two execution pipelines based on various criteria. Those criteria may include power efficiency with which the instruction can be executed and availability of execution units to support execution of the instruction. | 04-23-2015 |
20150113538 | HIERARCHICAL STAGING AREAS FOR SCHEDULING THREADS FOR EXECUTION - One embodiment of the present invention is a computer-implemented method for scheduling a thread group for execution on a processing engine that includes identifying a first thread group included in a first set of thread groups that can be issued for execution on the processing engine, where the first thread group includes one or more threads. The method also includes transferring the first thread group from the first set of thread groups to a second set of thread groups, allocating hardware resources to the first thread group, and selecting the first thread group from the second set of thread groups for execution on the processing engine. One advantage of the disclosed technique is that a scheduler only allocates limited hardware resources to thread groups that are, in fact, ready to be issued for execution, thereby conserving those resources in a manner that is generally more efficient than conventional techniques. | 04-23-2015 |
20150193272 | SYSTEM AND PROCESSOR THAT INCLUDE AN IMPLEMENTATION OF DECOUPLED PIPELINES - A system and apparatus are provided that include an implementation for decoupled pipelines. The apparatus includes a scheduler configured to issue instructions to one or more functional units and a functional unit coupled to a queue having a number of slots for storing instructions. The instructions issued to the functional unit are stored in the queue until the functional unit is available to process the instructions. | 07-09-2015 |
20150212819 | SYSTEM AND PROCESSOR FOR IMPLEMENTING INTERRUPTIBLE BATCHES OF INSTRUCTIONS - A system, method, and computer program product are provided for scheduling interruptible hatches of instructions for execution by one or more functional units of a processor. The method includes the steps of receiving a batch of instructions that includes a plurality of instructions and dispatching at least one instruction from the batch of instructions to one or more functional units for execution. The method further includes the step of receiving an interrupt request that causes an interrupt routine to be dispatched to the one or more functional units prior to all instructions in the batch of instructions being dispatched to the one or more functional units. When the interrupt request is received, the method further includes the step of storing batch-level resources in a memory to resume execution of the batch of instructions once the interrupt routine has finished execution. | 07-30-2015 |
20150220341 | SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR IMPLEMENTING SOFTWARE-BASED SCOREBOARDING - A system, method, and computer program product are provided for implementing a software-based scoreboarding mechanism. The method includes the steps of receiving a dependency barrier instruction that includes an immediate value and an identifier corresponding to a first register and, based on a comparison of the immediate value to the value stored in the first register, dispatching a subsequent instruction to at least a first processing unit of two or more processing units. | 08-06-2015 |
Patent application number | Description | Published |
20100319781 | ATOMIZING DESUPERHEATER SHUTOFF APPARATUS AND METHOD - The present invention is directed to a desuperheater spraying valve assembly. More particularly, the invention provides a new and improved valve assembly, whereby cooling liquid may be controllably injected into a gas or a liquid stream, typically steam, to selectively maintain the gas or liquid at a predetermined temperature level. In a possible embodiment of the present invention, a class V valve assembly is disclosed. It comprises an actuator coupled to a plug with a valve seat in the proximity of said plug. The plug is affixed to an actuator rod which transverses the body of the valve assembly. A spray tube may be affixed to said valve seat and at least one spray nozzle is affixed to a to the spray tube. The plug and said valve seat are conical in shape as to when said plug is inserted into said valve, they form a seal. | 12-23-2010 |
20130074788 | ATOMIZING DESUPERHEATER SHUTOFF APPARATUS AND METHOD - The present invention is directed to a desuperheater spraying valve assembly. More particularly, the invention provides a new and improved valve assembly, whereby cooling liquid may be controllably injected into a gas or a liquid stream, typically steam, to selectively maintain the gas or liquid at a predetermined temperature level. In a possible embodiment of the present invention, a class V valve assembly is disclosed. It comprises an actuator coupled to a plug with a valve seat in the proximity of said plug. The plug is affixed to an actuator rod which transverses the body of the valve assembly. A spray tube may be affixed to said valve seat and at least one spray nozzle is affixed to a to the spray tube. The plug and said valve seat are conical in shape as to when said plug is inserted into said valve, they form a seal. | 03-28-2013 |