Patent application number | Description | Published |
20080235462 | Device Having a Low Latency Single Port Memory Unit and a Method for Writing Multiple Data Segments to a Single Port Memory Unit - A method and a device. The device includes a single port memory unit that includes multiple memory regions, whereas each memory region is adapted to receive multiple data segments in parallel; whereas the single port memory unit receives a memory clock signal; characterized by including access logic adapted to receive multiple data segment write requests from multiple data sources; to write, during a first memory clock cycle, multiple data segments to a certain memory region in response to an availability of the certain memory region; to temporarily store rejected data segments; to write, during a second memory clock cycle, at least the rejected data segments, to another memory region. | 09-25-2008 |
20080307127 | Method for Managing Under-Runs and a Device Having Under-Run Management Capabilities - A method for managing under-runs and a device having under-run management capabilities. The method includes retrieving packets from multiple buffers, monitoring a state of a multiple buffers, determining whether an under-run associated with a transmission attempt of a certain information frame from a certain buffer occurs; if an under-run occurs, requesting a certain information frame transmitter to transmit predefined packets while ignoring packets that are retrieved from the certain buffer, until a last packet of the information frame is retrieved from the certain buffer; and notifying a processor that an under-run occurred after at least one predefined packet was transmitted; wherein each buffer out of the multiple buffers is adapted to store a fraction of a maximal sized information frame. | 12-11-2008 |
20080313237 | Method for High Speed Framing and a Device Having Framing Capabilities - A device having framing capabilities, the device includes at least one memory unit adapted to store data and metadata required for framing the stored data; the device is characterized by including a framer that is connected to a framed data unit and to a data fetch unit; wherein the device is adapted to select between a first operation sequence and a second operation sequence; wherein the first operation sequence comprises a data chunk and metadata fetch operation followed by a data chunk frame operation and wherein the second operation sequence comprises a multiple data chunk fetch operation followed by multiple data chunk frame operations; wherein the data fetch unit and the framer are adapted to execute the selected operation sequence. A method for framing data, the method includes storing data and metadata required for framing the stored data at one or more memory devices. The method is characterized by executing an operation sequence out of a first operation sequence and a second operation sequence; wherein the first operation sequence comprises a data chunk and metadata fetch operation followed by a data chunk frame operation and wherein the second operation sequence comprises a multiple data chunk fetch operation followed by multiple data chunk frame operations. | 12-18-2008 |
20090046700 | METHOD AND DEVICE FOR MANAGING MULTI-FRAMES - A device having multi-frame transmission and reception capabilities and a method for transmitting and receiving multi-frames. The device includes a processor, a time slot assigner, connected to a communication line via a physical layer unit. The physical layer unit is adapted to generate a communication line clock signal (LINE_TX_CLK | 02-19-2009 |
20090198926 | METHOD AND DEVICE FOR SWITCHING DATA - A method, the method includes providing data; retrieving interleaving command information from a two dimensional array of interleaving command information; wherein the two dimensional array includes multiple interleaving command information rows, each row includes interleaving commands associated with multiple TDM time slots; and determining, in response to the retrieved interleaving command information, whether to provide data from a first data source or from a second data source. | 08-06-2009 |
20090274138 | METHOD FOR TRANSMITTING DATA AND A DEVICE HAVING DATA TRANSMISSION CAPABILITIES - A method for transmitting data, the method includes scanning at least a first memory unit to retrieve data segments associated with multiple TDM channels, in response to a definition of multiple TDM time frames, each TDM time frame includes multiple time slots; sending the retrieved data segments to an array of line shifters; multiplexing data segments provided from the array of line shifters, in response to the definition, such as to provide in a parallel manner multiple data segments to multiple TDM lines; and transmitting a group of time division multiples data frames over a group of TDM lines | 11-05-2009 |
20090274168 | METHOD FOR TRANSMITTING DATA FROM MULTIPLE CLOCK DOMAINS AND A DEVICE HAVING DATA TRANSMISSION CAPABILITIES - A method that includes defining a transmission schedule of a TDM data frame that includes multiple TDM time slots allocated for transmitting data over a TDM line; the method is characterized by including: providing a transmission clock signal having a transmission clock frequency to the TDM line, providing a first clock signal having a first clock frequency to data sources that belong to a first group of data sources and providing a second clock signal having a second clock frequency to data sources that belong to a second group of data sources; wherein the first clock frequency and the second clock frequency are higher than the transmission clock frequency; pre-fetching, to a first intermediate storage a data segment from a data source out of the first group of data sources in response to a fullness level of the first intermediate storage unit and to the transmission schedule; pre-fetching, to a second intermediate storage a data segment from a data source out of the second group of data sources in response to a fullness level of the first intermediate storage unit and to the transmission schedule; providing, in response to the transmission schedule, a stabilized data segment from the first or the second intermediate storage units to a transmission storage unit and transmitting the data segment from the transmission storage unit over the TDM line. | 11-05-2009 |
20090303872 | METHOD FOR MANAGING UNDER-RUN AND A DEVICE HAVING UNDER-RUN MANAGEMENT CAPABILITIES - A device having under-run management capabilities and to a method for managing under-runs. The method includes providing, to a memory unit, channel information from multiple channels; allocating time slots for communication channel transmissions; the method is characterized by including: sending, during a time slot allocated for a transmission of channel information from an enabled communication channel, to the shift register channel information of an enabled communication channel, serially outputting the received channel information from the shift register towards a communication line while serially replacing the outputted channel information by a predefined content such that the shift register stores a communication channel disable code when an under-run occurs; defining a communication channel as a disabled communication channel once the under-run occurs; and transmitting, during a time slot allocated to a disabled communication channel, idle signals to the communication line. | 12-10-2009 |
20090310726 | METHOD FOR RECEIVING AND PROCESSING FRAMES AND A DEVICE HAVING FRAME RECEIVING AND PROCESSING CAPABILITIES - A device having frame receiving and processing capabilities and a method for receiving and processing frames. The method includes: receiving a frame; associating a frame timestamp with the frame; storing the frame and the associated timestamp at a certain buffer out of a group of buffers; generating a valid timing information frame indicator if the received frame is a valid timing information frame; and storing the valid timing information frame indicator at a certain buffer descriptor associated with the certain buffer. | 12-17-2009 |
20100114508 | DEVICE AND METHOD FOR TESTING A CIRCUIT - A device and a method. The device includes: (i) a processor, connected to the receiver, (ii) an interface adapted to receive a test vector and to output a test response, the test vector includes a first group of signals that include idle signals and at least one information frame and a second group of signals that include timing signals and data signals; and (iii) a receiver, connected to the interface. The receiver is adapted to receive the first group of signals and filter out the idle signals and at least one instruction frame delimiters to provide at least one instruction. The device is adapted to send the at least one instruction to at least one instruction buffer. The processor is adapted to execute at least one instruction stored in the at least one instruction buffer and to respond to the second group of signals such as to provide test responses. | 05-06-2010 |
20100223444 | METHOD FOR PERFORMING PLURALITY OF BIT OPERATIONS AND A DEVICE HAVING PLURALITY OF BIT OPERATIONS CAPABILITIES - A method and a device having a plurality of bit operations capability, the device includes: a first and a second registers and an instruction fetch circuit, and an arithmetic logic unit adapted to: calculate, during a first clock cycle, a position value representative of a position, within a first information vector, of a first bit of information that has a first value; and to multiply the position value by a multiplication factor to provide a first result and to alter the value of the first bit to a second value to provide an updated information vector, during the first clock cycle. | 09-02-2010 |