Patent application number | Description | Published |
20100106754 | Hardware and Operating System Support for Persistent Memory On A Memory Bus - Implementations of a file system that is supported by a non-volatile memory that is directly connected to a memory bus, and placed side by side with a dynamic random access memory (DRAM), are described. | 04-29-2010 |
20100106895 | Hardware and Operating System Support For Persistent Memory On A Memory Bus - Implementations of a file system that is supported by a non-volatile memory that is directly connected to a memory bus, and placed side by side with a dynamic random access memory (DRAM), are described. | 04-29-2010 |
20100251265 | Operating System Distributed Over Heterogeneous Platforms - An illustrative operating system distributes two or more instances of the operating system over heterogeneous platforms of a computing device. The instances of the operating system work together to provide single-kernel semantics to present a common operating system abstraction to application modules. The heterogeneous platforms may include co-processors that use different instruction set architectures and/or functionality, different NUMA domains, etc. Further, the operating system allows application modules to transparently access components using a local communication path and a remote communication path. Further, the operating system includes a policy manager module that determines the placement of components based on affinity values associated with interaction relations between components. The affinity values express the sensitivity of the interaction relations to a relative location of the components. | 09-30-2010 |
20100312858 | NETWORK APPLICATION PERFORMANCE ENHANCEMENT USING SPECULATIVE EXECUTION - A speculative web browser engine may enable providing transmission of content between a server and a client prior to a user-initiated request for the content hidden in imperative code (event handlers), which may reduce user-perceived latency when the user initiates the imperative code. In some aspects, a speculative browser state may be created from an actual browser state and used to run the event handlers. The event handlers may be modified to direct actions of the event handler to update the speculative browser state. Speculative content may be transmitted between the server and the client in response to an execution of the modified code. The speculative content may be stored in a cache and made readily available for use when the user initiates the event handler and finds that the desired content has already been fetched. | 12-09-2010 |
20110119456 | EFFICIENCY OF HARDWARE MEMORY ACCESS USING DYNAMICALLY REPLICATED MEMORY - Dynamically replicated memory is usable to allocate new memory space from failed memory pages by pairing compatible failed memory pages to reuse otherwise unusable failed memory pages. Dynamically replicating memory involves detecting and recording memory faults, reclaiming failed memory pages for later use, recovering from detected memory faults, and scheduling access to replicated memory pages. | 05-19-2011 |
20110119538 | Dynamically Replicated Memory - Dynamically replicated memory is usable to allocate new memory space from failed memory pages by pairing compatible failed memory pages to reuse otherwise unusable failed memory pages. Dynamically replicating memory involves detecting and recording memory faults, reclaiming failed memory pages for later use, recovering from detected memory faults, and scheduling access to replicated memory pages. | 05-19-2011 |
20110258290 | Bandwidth-Proportioned Datacenters - A system including at least one storage node and at least one computation node connected by a switch is described herein. Each storage node has one or more storage units and one or more network interface components, the collective bandwidths of the storage units and the network interface components being proportioned to one another to enable communication to and from other nodes at the collective bandwidth of the storage units. Each computation node has logic configured to make requests of storage nodes, an input/output bus, and one or more network interface components, the bandwidth of the bus and the collective bandwidths of the network interface components being proportioned to one another to enable communication to and from other nodes at the bandwidth of the input/output bus. | 10-20-2011 |
20110258297 | Locator Table and Client Library for Datacenters - A system including a plurality of servers, a client, and a metadata server is described herein. The servers each store tracts of data, a plurality of the tracts comprising a byte sequence and being distributed among the plurality of servers. To locate the tracts, the metadata server generates a table that is used by the client to identify servers associated with the tracts, enabling the client to provide requests to the servers. The metadata server also enables recovery in the event of a server failure. Further, the servers construct tables of tract identifiers and locations to use in responding to the client requests. | 10-20-2011 |
20110258482 | Memory Management and Recovery for Datacenters - A system including a plurality of servers, a client, and a metadata server is described herein. The servers each store tracts of data, a plurality of the tracts comprising a byte sequence and being distributed among the plurality of servers. To locate the tracts, the metadata server generates a table that is used by the client to identify servers associated with the tracts, enabling the client to provide requests to the servers. The metadata server also enables recovery in the event of a server failure. Further, the servers construct tables of tract identifiers and locations to use in responding to the client requests. | 10-20-2011 |
20110258483 | Data Layout for Recovery and Durability - A Metadata server described herein is configured to generate a metadata table optimized for data durability and recovery. In generating the metadata table, the metadata server associates each possible combination of servers with one of the indices of the table, thereby ensuring that each server participates in recovery in the event of a server failure. In addition, the metadata server may also associate one or more additional servers with each index to provide added data durability. Upon generating the metadata table, the metadata server provides the metadata table to clients or servers. Alternatively, the metadata server may provide rules and parameters to clients to enable those clients to identify servers storing data items. The clients may use these parameters and an index as inputs to the rules to determine the identities of servers storing or designated to store data items corresponding to the index. | 10-20-2011 |
20110258488 | Server Failure Recovery - A metadata server configured to maintain storage assignment mappings in non-persistent storage is described herein. The tract storage assignment mappings associate servers with storage assignments, the storage assignments representing the data stored on the servers. Responsive to a failure, the metadata server receives the storage assignments from the servers and rebuilds the storage assignment mappings from the storage assignments. The metadata server is also configured to enable clients to operate during a recovery process for a failed server by providing the storage assignment mappings to the clients during the recovery process. Also during the recovery process, the replacement server for the failed server conditionally overwrites stored data with other data received from other servers as part of the recovery process. The replacement server conditionally overwrites based on version information associated with the data and version information associated with the other data, the version information being associated with one or more versions of the storage assignment mappings | 10-20-2011 |
20120137167 | SYSTEMATIC MITIGATION OF MEMORY ERRORS - A system and method for mitigating memory errors in a computer system. Faulty memory is identified and tested by a memory manager of an operating system. The memory manager may perform diagnostic tests while the operating system is executing on the computer system. Regions of memory that are being used by software components of the computer system may also be tested. The memory manager maintains a stored information about faulty memory regions. Regions are added to the stored information when they are determined to be faulty by a diagnostic test tool. Memory regions are allocated to software components by the memory manager after checking the stored information about faulty memory regions. This ensures a faulty memory region is never allocated to a software component of the computer system. | 05-31-2012 |
20120166590 | Reading and Writing During Cluster Growth Phase - A client device configured to write to both a growth server and a live server replica that the growth server is replacing during a growth phase is described herein. The client device first determines the growth server designated to replace a corresponding live server replica of a set of server replicas associated with a storage index. The client device then transmits a write request associated with the storage index to the set of server replicas and to the growth server. The client device may perform the determining based on storage assignment mappings. The storage assignment mappings are provided to the client device by a metadata server while the growth server retrieves data associated with the storage index from the live server replica. | 06-28-2012 |
20120197958 | Parallel Serialization of Request Processing - A plurality of servers configured to receive a plurality of requests associated with a plurality of byte sequences are described herein. The requests for each byte sequence are received by a single one of the servers. Each server is further configured to serially process the requests it receives while the other servers also perform serial processing of requests in parallel with the server. Also, the requests for each byte sequence are transmitted to the single one of the servers by a plurality of clients, each client independently identifying the single one of the servers for the byte sequence based on system metadata. | 08-02-2012 |
20120278400 | Effective Circuits in Packet-Switched Networks - The creation of an effective circuit between a sender device and a receiver device over the packet-switched network is described herein. To establish the effective circuit, the sender device sends a request to the receiver device through the packet-switched network. The request is associated with a bandwidth reservation from the receiver device for reception of a message from the sender device. The receiver device receives multiple requests from multiple sender devices and reserves bandwidth for at least one of the sender devices. The receiver device then sends a response to the at least one sender device providing clearance to send the message to the receiver device using the reserved bandwidth, the request and response establishing the effective circuit. The receiver device may also decline the requests of the other sender devices, causing the other sender devices to send other requests to other receiver devices. | 11-01-2012 |
20130346669 | UPDATING HARDWARE LIBRARIES FOR USE BY APPLICATIONS ON A COMPUTER SYSTEM WITH AN FPGA COPROCESSOR - A computer system includes one or more field programmable gate arrays as a coprocessor that can be shared among processes and programmed using hardware libraries. Given a set of hardware libraries, an update process periodically updates the libraries and/or adds new libraries. One or more update servers can provide information about libraries available for download, either in response to a request or by notifying systems using such libraries. New available libraries can be presented to a user for selection and download. Requests for updated libraries can arise in several ways, such as through polling for updates, exceptions from applications attempting to use libraries, and upon compilation of application code. | 12-26-2013 |
20130346758 | MANAGING USE OF A FIELD PROGRAMMABLE GATE ARRAY WITH ISOLATED COMPONENTS - Field programmable gate arrays can be used as a shared programmable co-processor resource in a general purpose computing system. Components of an FPGA are isolated to protect the FPGA and data transferred between the FPGA and other components of the computer system. For example, data written by the FPGA to memory is encrypted, and is decrypted within the FPGA when read back from memory. Data transferred between the FPGA and other components such as the CPU or GPU, whether directly or through memory, can similarly be encrypted using cryptographic keys known to the communicating components. Transferred data also can be digitally signed by the FPGA or other component to provide authentication. Code for programming the FPGA can be encrypted and signed by the author, loaded into the FPGA in an encrypted state, and then decrypted and authenticated by the FPGA itself, before programming the FPGA with the code. | 12-26-2013 |
20130346759 | MANAGING USE OF A FIELD PROGRAMMABLE GATE ARRAY WITH REPROGAMMABLE CRYPTOGRAPHIC OPERATIONS - Field programmable gate arrays can be used as a shared programmable co-processor resource in a general purpose computing system. Components of an FPGA are isolated to protect the FPGA and data transferred between the FPGA and other components of the computer system. Transferred data can be digitally signed by the FPGA or other component to provide authentication. Code for programming the FPGA can be encrypted and signed by the author, loaded into the FPGA in an encrypted state, and then decrypted and authenticated by the FPGA itself, before programming the FPGA with the code. This code can be used to change the cryptographic operations performed in the FPGA, including keys, or decryption and encryption algorithms, or both. | 12-26-2013 |
20130346979 | PROFILING APPLICATION CODE TO IDENTIFY CODE PORTIONS FOR FPGA IMPLEMENTATION - Application code is analyzed to determine if a hardware library could accelerate its execution. In particular, application code can be analyzed to identify calls to application programming interfaces (APIs) or other functions that have a hardware library implementation. The code can be analyzed to identify the frequency of such calls. Information from the hardware library can indicate characteristics of the library, such as its size, power consumption and FPGA resource usage. Information about the execution pattern of the application code also can be useful. This information, along with information about other concurrent processes using the FPGA resources, can be used to select a hardware library to implement functions called in the application code. | 12-26-2013 |
20130346985 | MANAGING USE OF A FIELD PROGRAMMABLE GATE ARRAY BY MULTIPLE PROCESSES IN AN OPERATING SYSTEM - Field programmable gate arrays can be used as a shared programmable co-processor resource in a general purpose computing system. An FPGA can be programmed to perform functions, which in turn can be associated with one or more processes. With multiple processes, the FPGA can be shared, and a process is assigned to at least one portion of the FPGA during a time slot in which to access the FPGA. Programs written in a hardware description language for programming the FPGA are made available as a hardware library. The operating system manages allocating the FPGA resources to processes, programming the FPGA in accordance with the functions to be performed by the processes using the FPGA, and scheduling use of the FPGA by these processes. | 12-26-2013 |
20140006701 | Hardware and Operating System Support for Persistent Memory On A Memory Bus | 01-02-2014 |
20140025912 | Efficiency of Hardware Memory Access using Dynamically Replicated Memory - Dynamically replicated memory is usable to allocate new memory space from failed memory pages by pairing compatible failed memory pages to reuse otherwise unusable failed memory pages. Dynamically replicating memory involves detecting and recording memory faults, reclaiming failed memory pages for later use, recovering from detected memory faults, and scheduling access to replicated memory pages. | 01-23-2014 |
20140181577 | SYSTEMATIC MITIGATION OF MEMORY ERRORS - A system and method for mitigating memory errors in a computer system. Faulty memory is identified and tested by a memory manager of an operating system. The memory manager may perform diagnostic tests while the operating system is executing on the computer system. Regions of memory that are being used by software components of the computer system may also be tested. The memory manager maintains a stored information about faulty memory regions. Regions are added to the stored information when they are determined to be faulty by a diagnostic test tool. Memory regions are allocated to software components by the memory manager after checking the stored information about faulty memory regions. This ensures a faulty memory region is never allocated to a software component of the computer system. | 06-26-2014 |
20140298356 | Operating System Distributed Over Heterogeneous Platforms - An illustrative operating system distributes two or more instances of the operating system over heterogeneous platforms of a computing device. The instances of the operating system work together to provide single-kernel semantics to present a common operating system abstraction to application modules. The heterogeneous platforms may include co-processors that use different instruction set architectures and/or functionality, different NUMA domains, etc. Further, the operating system allows application modules to transparently access components using a local communication path and a remote communication path. Further, the operating system includes a policy manager module that determines the placement of components based on affinity values associated with interaction relations between components. The affinity values express the sensitivity of the interaction relations to a relative location of the components. | 10-02-2014 |
20150052392 | Disconnected Operation for Systems Utilizing Cloud Storage - While connected to cloud storage, a computing device writes data and metadata to the cloud storage, indicates success of the write to an application of the computing device, and, after indicating success to the application, writes the data and metadata to local storage of the computing device. The data and metadata may be written to different areas of the local storage. The computing device may also determine that it has recovered from a crash or has connected to the cloud storage after operating disconnected and reconcile the local storage with the cloud storage. The reconciliation may be based at least on a comparison of the metadata stored in the area of the local storage with metadata received from the cloud storage. The cloud storage may store each item of data contiguously with its metadata as an expanded block. | 02-19-2015 |