Patent application number | Description | Published |
20090174968 | MAGNETIC SENSING DEVICE WITH REDUCED SHIELD-TO-SHIELD SPACING - A magnetic sensor assembly includes first and second shields each comprised of a magnetic material. The first and second shields define a physical shield-to-shield spacing. A sensor stack is disposed between the first and second shields and includes a seed layer adjacent the first shield, a cap layer adjacent the second shield, and a magnetic sensor between the seed layer and the cap layer. At least a portion of the seed layer and/or the cap layer comprises a magnetic material to provide an effective shield-to-shield spacing of the magnetic sensor assembly that is less than the physical shield-to-shield spacing. | 07-09-2009 |
20090185315 | MAGNETIC SENSOR INCLUDING A FREE LAYER HAVING PERPENDICULAR TO THE PLANE ANISOTROPY - A magnetic sensor includes a reference layer having a first magnetization direction and a free layer assembly having an effective magnetization direction substantially perpendicular to the first magnetization direction and substantially perpendicular to a plane of each layer of the free layer assembly. A spacer layer is between the reference layer and the free layer, and a signal enhancement layer is exchange coupled to the free layer assembly on a side opposite the spacer layer. | 07-23-2009 |
20090262638 | SPIN-TORQUE MEMORY WITH UNIDIRECTIONAL WRITE SCHEME - Spin torque magnetic memory elements that have a pinned layer, two free layers, and a current-blocking insulating layer proximate to at least one of the free layers. The resistive state (e.g., low resistance or high resistance) of the memory elements is altered by passing electric current through the element in one direction. In other words, to change from a low resistance to a high resistance, the direction of electric current is the same as to change from a high resistance to a low resistance. The elements have a unidirectional write scheme. | 10-22-2009 |
20090268352 | ST-RAM MAGNETIC ELEMENT CONFIGURATIONS TO REDUCE SWITCHING CURRENT - In order to increase an efficiency of spin transfer and thereby reduce the required switching current, a current perpendicular to plane (CPP) magnetic element for a memory device includes either one or both of a free magnetic layer, which has an electronically reflective surface, and a permanent magnet layer, which has perpendicular anisotropy to bias the free magnetic layer. | 10-29-2009 |
20090283816 | BAND ENGINEERED HIGH-K TUNNEL OXIDES FOR NON-VOLATILE MEMORY - A non-volatile memory cell that has a charge source region, a charge storage region, and a crested tunnel barrier layer that has a potential energy profile which peaks between the charge source region and the charge storage region. The tunnel barrier layer has multiple high-K dielectric materials, either as individual layers or as compositionally graded materials. | 11-19-2009 |
20090289290 | NON-VOLATILE MEMORY WITH PROGRAMMABLE CAPACITANCE - Non-volatile memory with programmable capacitance is disclosed. Illustrative data memory units include a substrate including a source region and a drain region. A first insulating layer is over the substrate. A second insulating layer is over the substrate and between the source region and drain region. A solid electrolyte layer is between the first insulating layer and second insulating layer. The solid electrolyte layer has a capacitance that is controllable between at least two states. A first electrode is electrically coupled to a first side of the solid electrolyte layer and is electrically coupled to a voltage source. A second electrode is electrically coupled to a second side of the solid electrolyte layer and is electrically coupled to the voltage source. Multi-bit memory units are also disclosed. | 11-26-2009 |
20090316462 | MAGNETIC TRACKS WITH DOMAIN WALL STORAGE ANCHORS - Magnetic shift registers in which data writing and reading is accomplished by moving the magnetic domain walls by electric current. Various embodiments of domain wall nodes or anchors that stabilize a domain wall are provided. In some embodiments, the wall anchors are elements separate from the magnetic track. In other embodiments, the wall anchors are disturbances in the physical configuration of the magnetic track. In still other embodiments, the wall anchors are disturbances in the material of the magnetic track. | 12-24-2009 |
20090323402 | SPIN-TRANSFER TORQUE MEMORY SELF-REFERENCE READ METHOD - A spin-transfer torque memory apparatus and self-reference read schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage, the magnetic tunnel junction data cell having a first resistance state and storing the first bit line read voltage in a first voltage storage device. Then applying a low resistance state polarized write current through the magnetic tunnel junction data cell, forming a low second resistance state magnetic tunnel junction data cell. A second read current is applied through the low second resistance state magnetic tunnel junction data cell to forming a second bit line read voltage. The second bit line read voltage is stored in a second voltage storage device. The method also includes comparing the first bit line read voltage with the second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state. | 12-31-2009 |
20090323403 | SPIN-TRANSFER TORQUE MEMORY NON-DESTRUCTIVE SELF-REFERENCE READ METHOD - A spin-transfer torque memory apparatus and non-destructive self-reference read schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage and storing the first bit line read voltage in a first voltage storage device. The magnetic tunnel junction data cell has a first resistance state. Then the method includes applying a second read current thorough the magnetic tunnel junction data cell having the first resistance state and forming a second bit line read voltage and storing the second bit line read voltage in a second voltage storage device. The first read current is less than the second read current. Then the stored first bit line read voltage is compared with the stored second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state. | 12-31-2009 |
20100014347 | DIODE ASSISTED SWITCHING SPIN-TRANSFER TORQUE MEMORY UNIT - A memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. A transistor is electrically between the magnetic tunnel junction data cell and the bit line or source line and a diode is in thermal or electrical contact with the magnetic tunnel junction data cell to assist in resistance state switching. | 01-21-2010 |
20100032778 | MAGNETIC MEMORY WITH SEPARATE READ AND WRITE PATHS - Magnetic memory having separate read and write paths is disclosed. The magnetic memory unit includes a ferromagnetic strip having a first end portion with a first magnetization orientation, an opposing second end portion with a second magnetization orientation, and a middle portion between the first end portion and the second end portion, the middle portion having a free magnetization orientation. The first magnetization orientation opposes the second magnetization orientation. A tunneling barrier separates a magnetic reference layer from the middle portion forming a magnetic tunnel junction. A bit line is electrically coupled to the second end portion. A source line is electrically coupled to the first end portion and a read line is electrically coupled to the magnetic tunnel junction. | 02-11-2010 |
20100033880 | MULTI-BIT STRAM MEMORY CELLS - A multi-bit spin torque magnetic element that has a ferromagnetic pinned layer having a pinned magnetization orientation, a non-magnetic layer, and a ferromagnetic free layer having a magnetization orientation switchable among at least four directions, the at least four directions being defined by a physical shape of the free layer. The magnetic element has at least four distinct resistance states. Magnetic elements with at least eight magnetization directions are also provided. | 02-11-2010 |
20100034008 | MAGNETIC FIELD ASSISTED STRAM CELLS - Memory units that have a magnetic tunnel junction cell that utilizes spin torque and a current induced magnetic field to assist in the switching of the magnetization orientation of the free layer of the magnetic tunnel junction cell. The memory unit includes a spin torque current source for passing a current through the magnetic tunnel junction cell, the spin torque current source having a direction perpendicular to the magnetization orientations, and also includes a magnetic ampere field current source is oriented in a direction orthogonal or at some angles to the magnetization orientations. | 02-11-2010 |
20100053822 | STRAM CELLS WITH AMPERE FIELD ASSISTED SWITCHING - A magnetic tunnel junction cell that has a ferromagnetic pinned layer, a ferromagnetic free layer, and a non-magnetic barrier layer therebetween. The free layer has a larger area than the pinned layer, in some embodiments at least twice the size of the pinned layer, in some embodiments at least three times the size of the pinned layer, and in yet other embodiments at least four times the size of the pinned layer. The pinned layer is offset from the center of the free layer. The free layer has a changeable vortex magnetization, changeable between clockwise and counterclockwise directions. | 03-04-2010 |
20100067281 | VARIABLE WRITE AND READ METHODS FOR RESISTIVE RANDOM ACCESS MEMORY - Variable write and read methods for resistance random access memory (RRAM) are disclosed. The methods include initializing a write sequence and verifying the resistance state of the RRAM cell. If a write pulse is needed, then two or more write pulses are applied through the RRAM cell to write the desired data state to the RRAM cell. Each subsequent write pulse has substantially the same or greater write pulse duration. Subsequent write pulses are applied to the RRAM cell until the RRAM cell is in the desired data state or until a predetermined number of write pulses have been applied to the RRAM cell. A read method is also disclosed where subsequent read pulses are applied through the RRAM cell until the read is successful or until a predetermined number of read pulses have been applied to the RRAM cell. | 03-18-2010 |
20100073984 | MAGNETIC SHIFT REGISTER AS COUNTER AND DATA STORAGE DEVICE - A register having a track with a first electrode is at the first end to supply a current to the track in a first direction and a second electrode at the second end to supply a current to the track in a second direction, the second direction being opposite to the first direction. A first domain wall anchor and a second domain wall anchor are positioned proximate the track between the first electrode and the second electrode. Each of the domain wall anchors has a ferromagnetic pinned layer and a barrier layer proximate the track, with the barrier layer between the track and the ferromagnetic pinned layer. The ferromagnetic layer has a magnetization orientation pinned perpendicular to the magnetization orientation of the track. | 03-25-2010 |
20100075599 | Data Transmission and Exchange Using Spin Waves - Devices are proposed for use in nanoscale data transfer and exchange between electronic components. Spin wave generators translate an input signal charge-carrier based signal to spin waves within a ferromagnetic stripe. The spin waves propagate along the ferromagnetic stripe and are detected by spin wave detectors. Further, signal transfer devices such as a splitter, mixer, and switch are disclosed. Embodiments of the invention provide a solution for replacing copper connections, which is a limiting factor in current and future development of high-performance chips. | 03-25-2010 |
20100078741 | STRAM WITH COMPENSATION ELEMENT - Spin-transfer torque memory having a compensation element is disclosed. The spin-transfer torque memory unit includes a synthetic antiferromagnetic reference element, a synthetic antiferromagnetic compensation element, a free magnetic layer between the synthetic antiferromagnetic reference element and the synthetic antiferromagnetic compensation element, and an electrically insulating and non-magnetic tunneling barrier layer separating the free magnetic layer from the synthetic antiferromagnetic reference element. The free magnetic layer has a saturation moment value greater than 1100 emu/cc. | 04-01-2010 |
20100078742 | FLUX-CLOSED STRAM WITH ELECTRONICALLY REFLECTIVE INSULATIVE SPACER - Flux-closed spin-transfer torque memory having a specular insulative spacer is disclosed. A flux-closed spin-transfer torque memory unit includes a multilayer free magnetic element including a first free magnetic layer anti-ferromagnetically coupled to a second free magnetic layer through an electrically insulating and electronically reflective layer. An electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic element from a reference magnetic layer. | 04-01-2010 |
20100078743 | STRAM WITH ELECTRONICALLY REFLECTIVE INSULATIVE SPACER - Spin-transfer torque memory having a specular insulative spacer is disclosed. The spin-transfer torque memory unit includes a free magnetic layer, a reference magnetic layer, an electrically insulating and non-magnetic tunneling barrier layer separating the free magnetic layer from the reference magnetic layer, an electrode layer, and an electrically insulating and electronically reflective layer separating the electrode layer and the free magnetic layer. | 04-01-2010 |
20100080049 | THERMALLY ASSISTED MULTI-BIT MRAM - Methods of writing to a multi-bit MRAM memory unit are described. The method includes to self-detected writing to a multi-bit (i.e., multilevel) thermally assisted MRAM. The self-detected writing increases a reading margin between data state levels and decreases reading margin variability due to cell resistance variation. | 04-01-2010 |
20100084724 | MEMORY CELL WITH STRESS-INDUCED ANISOTROPY - A magnetic memory element that has a stress-induced magnetic anisotropy. The memory element has a ferromagnetic free layer having a switchable magnetization orientation switchable, a ferromagnetic reference layer having a pinned magnetization orientation, and a non-magnetic spacer layer therebetween. The free layer may be circular, essentially circular or nearly circular. | 04-08-2010 |
20100084725 | MAGNETIC MEMORY WITH ASYMMETRIC ENERGY BARRIER - A magnetic tunnel junction cell includes a ferromagnetic reference layer, a ferromagnetic free layer, and a non-magnetic barrier layer separating the ferromagnetic reference layer from the ferromagnetic free layer. The magnetic tunnel junction cell has an asymmetric energy barrier for switching between a high resistance data state and a low resistance data state. Memory devices and methods are also described. | 04-08-2010 |
20100085803 | ELECTRONIC DEVICES UTILIZING SPIN TORQUE TRANSFER TO FLIP MAGNETIC ORIENTATION - Electronic devices that include (i) a magnetization controlling structure; (ii) a tunnel barrier structure; and (iii) a magnetization controllable structure including: a first polarizing layer; and a first stabilizing layer, wherein the tunnel barrier structure is between the magnetization controlling structure and the magnetization controlling structure and the first polarizing layer is between the first stabilizing layer and the tunnel barrier structure, wherein the electronic device has two stable overall magnetic configurations, and wherein a first unipolar current applied to the electronic device will cause the orientation of the magnetization controlling structure to reverse its orientation and a second unipolar current applied to the electronic device will cause the magnetization controllable structure to switch its magnetization in order to obtain one of the two stable overall magnetic configurations, wherein the second unipolar current has an amplitude that is less than the first unipolar current. | 04-08-2010 |
20100085805 | MAGNETIC RANDOM ACCESS MEMORY (MRAM) UTILIZING MAGNETIC FLIP-FLOP STRUCTURES - Non-volatile magnetic random access memory (MRAM) devices that include magnetic flip-flop structures that include a magnetization controlling structure; a first tunnel barrier structure; and a magnetization controllable structure that includes a first polarizing layer; and a first stabilizing layer, wherein the first tunnel barrier structure is between the magnetization controllable structure and the magnetization controlling structure and the first polarizing layer is between the first stabilizing layer and the first tunnel barrier structure, wherein the magnetic flip-flop device has two stable overall magnetic configurations, and wherein a first unipolar current applied to the device will cause the orientation of the magnetization controlling structure to reverse its orientation and a second unipolar current applied to the electronic device will cause the magnetization controllable structure to switch its magnetization so that the device reaches one of the two stable overall magnetic configurations, wherein the second unipolar current has an amplitude that is less than the first unipolar current; a second tunnel barrier structure and a reference layer, wherein the second tunnel barrier structure is between the magnetic flip-flop device and the reference layer. MRAM cells that include such devices and arrays including such cells are also disclosed. | 04-08-2010 |
20100090300 | MRAM CELLS INCLUDING COUPLED FREE FERROMAGNETIC LAYERS FOR STABILIZATION - A free ferromagnetic data storage layer of an MRAM cell is coupled to a free ferromagnetic stabilization layer, which stabilization layer is directly electrically coupled to a contact electrode, on one side, and is separated from the free ferromagnetic data storage layer, on an opposite side, by a spacer layer. The spacer layer provides for the coupling between the two free layers, which coupling is one of: a ferromagnetic coupling and an antiferromagnetic coupling. | 04-15-2010 |
20100091563 | MAGNETIC MEMORY WITH PHONON GLASS ELECTRON CRYSTAL MATERIAL - A magnetic memory unit includes a tunneling barrier separating a free magnetic element and a reference magnetic element. A first phonon glass electron crystal layer is disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element. A second phonon glass electron crystal layer also be disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element to provide a Peltier effect on the free magnetic element and the reference magnetic element. | 04-15-2010 |
20100091564 | MAGNETIC STACK HAVING REDUCED SWITCHING CURRENT - A magnetic stack having a ferromagnetic free layer, a ferromagnetic pinned reference layer, a non-magnetic spacer layer between the free layer and the reference layer, and a variable layer proximate the free layer. The variable layer is antiferromagnetic at a first temperature and paramagnetic at a second temperature higher than the first temperature. During a writing process, the variable layer is paramagnetic. For magnetic memory cells, such as magnetic tunnel junction cells, the variable layer provides reduced switching currents. | 04-15-2010 |
20100096611 | VERTICALLY INTEGRATED MEMORY STRUCTURES - A device including a transistor that includes a source region; a drain region; and a channel region, wherein the channel region electrically connects the source region and the drain region along a channel axis; and a memory cell, wherein the memory cell is disposed adjacent the drain region so that the channel axis runs through the memory cell. | 04-22-2010 |
20100103728 | SPIN-TRANSFER TORQUE MEMORY SELF-REFERENCE READ AND WRITE ASSIST METHODS - A spin-transfer torque memory apparatus and self-reference read and write assist schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage and storing the first bit line read voltage. A magnetic field is applied through the free magnetic layer the forming a magnetic field modified magnetic tunnel junction data cell, the magnetic field rotates the magnetization orientation of the free magnetic layer without switching a resistance state of the magnetic tunnel junction data cell. Then a second read current is applied thorough the magnetic field modified magnetic tunnel junction data cell forming a second bit line read voltage and the bit line read voltage is stored and compared with the first bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state. Methods of applying a destabilizing magnetic field to the MTJ and then writing the desired resistance state are also disclosed. | 04-29-2010 |
20100103729 | SPIN-TRANSFER TORQUE MEMORY SELF-REFERENCE READ AND WRITE ASSIST METHODS - A spin-transfer torque memory apparatus and self-reference read and write assist schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage and storing the first bit line read voltage. A magnetic field is applied through the magnetic tunnel junction data cell forming a magnetic field modified magnetic tunnel junction data cell. Then a second read current is applied thorough the magnetic field modified magnetic tunnel junction data cell forming a second bit line read voltage and the bit line read voltage is stored and compared with the first bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state. Methods of applying a magnetic field to the MTJ and then writing the desired resistance state are also disclosed. | 04-29-2010 |
20100109108 | STRAM WITH COMPOSITE FREE MAGNETIC ELEMENT - Spin-transfer torque memory includes a composite free magnetic element, a reference magnetic element having a magnetization orientation that is pinned in a reference direction, and an electrically insulating and non-magnetic tunneling barrier layer separating the composite free magnetic element from the magnetic reference element. The free magnetic element includes a hard magnetic layer exchanged coupled to a soft magnetic layer. The composite free magnetic element has a magnetization orientation that can change direction due to spin-torque transfer when a write current passes through the spin-transfer torque memory unit. | 05-06-2010 |
20100110784 | STRAM with Self-Reference Read Scheme - Self-reference reading a magnetic tunnel junction data cell methods are disclosed. An illustrative method includes applying a read voltage across a magnetic tunnel junction data cell and forming a read current. The magnetic tunnel junction data cell has a first resistance state. The read voltage is sufficient to switch the magnetic tunnel junction data cell resistance. The method includes detecting the read current and determining if the read current remains constant during the applying step. If the read current remains constant during the applying step, then the first resistance state of the magnetic tunnel junction data cell is the resistance state that the read voltage was sufficient to switch the magnetic tunnel junction data cell to. | 05-06-2010 |
20100117051 | MEMORY CELLS INCLUDING NANOPOROUS LAYERS CONTAINING CONDUCTIVE MATERIAL - A memory cell that includes a first contact having a first surface and an opposing second surface; a second contact having a first surface and an opposing second surface; a memory material layer having a first surface and an opposing second surface; and a nanoporous layer having a first surface and an opposing second surface, the nanoporous layer including at least one nanopore and dielectric material, the at least one nanopore being substantially filled with a conductive metal, wherein a surface of the nanoporous layer is in contact with a surface of the first contact or the second contact and the second surface of the nanoporous layer is in contact with a surface of the memory material layer. | 05-13-2010 |
20100117170 | MAGNETIC MEMORY WITH POROUS NON-CONDUCTIVE CURRENT CONFINEMENT LAYER - A magnetic element having a ferromagnetic pinned layer, a ferromagnetic free layer, a non-magnetic spacer layer therebetween, and a porous non-electrically conducting current confinement layer between the free layer and the pinned layer. The current confinement layer forms an interface either between the free layer and the non-magnetic spacer layer or the pinned layer and the non-magnetic spacer layer. | 05-13-2010 |
20100128520 | NON VOLATILE MEMORY INCLUDING STABILIZING STRUCTURES - An apparatus that includes a magnetic structure including a reference layer; and a free layer; an exchange coupling spacer layer; and a stabilizing layer, wherein the exchange coupling spacer layer is between the magnetic structure and the stabilizing layer and exchange couples the free layer of the magnetic structure to the stabilizing layer. | 05-27-2010 |
20100135067 | NON-VOLATILE MEMORY WITH STRAY MAGNETIC FIELD COMPENSATION - A method and apparatus for stray magnetic field compensation in a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM). In some embodiments, a first tunneling barrier is coupled to a reference structure that has a perpendicular anisotropy and a first magnetization direction. A recording structure that has a perpendicular anisotropy is coupled to the first tunneling barrier and a nonmagnetic spacer layer. A compensation layer that has a perpendicular anisotropy and a second magnetization direction in substantial opposition to the first magnetization direction is coupled to the nonmagnetic spacer layer. Further, the memory cell is programmable to a selected resistance state with application of a current to the recording structure. | 06-03-2010 |
20100135072 | Spin-Torque Bit Cell With Unpinned Reference Layer and Unidirectional Write Current - Method and apparatus for using a uni-directional write current to store different logic states in a non-volatile memory cell, such as a modified STRAM cell. In some embodiments, the memory cell has an unpinned ferromagnetic reference layer adjacent a cladded conductor, a ferromagnetic storage layer and a tunneling barrier between the reference layer and the storage layer. Passage of a current along the cladded conductor induces a selected magnetic orientation in the reference layer, which is transferred through the tunneling barrier for storage by the storage layer. Further, the orientation of the applying step is provided by a cladding layer adjacent a conductor along which a current is passed and the current induces a magnetic field in the cladding layer of the selected magnetic orientation. | 06-03-2010 |
20100140578 | NON VOLATILE MEMORY CELLS INCLUDING A COMPOSITE SOLID ELECTROLYTE LAYER - Programmable metallization cells (PMC) that include a first electrode; a solid electrolyte layer including clusters of high ion conductive material dispersed in a low ion conductive material; and a second electrode, wherein either the first electrode or the second electrode is an active electrode, and wherein the solid electrolyte layer is disposed between the first electrode and the second electrode. Methods of forming them are also included herein. | 06-10-2010 |
20100193758 | PROGRAMMABLE METALLIZATION MEMORY CELL WITH PLANARIZED SILVER ELECTRODE - Programmable metallization memory cells having a planarized silver electrode and methods of forming the same are disclosed. The programmable metallization memory cells include a first metal contact and a second metal contact, an ion conductor solid electrolyte material is between the first metal contact and the second metal contact, and either a silver alloy doping electrode separates the ion conductor solid electrolyte material from the first metal contact or the second metal contact, or a silver doping electrode separates the ion conductor solid electrolyte material from the first metal contact. The silver electrode includes a silver layer and a metal seed layer separating the silver layer from the first metal contact. | 08-05-2010 |
20100220512 | PROGRAMMABLE POWER SOURCE USING ARRAY OF RESISTIVE SENSE MEMORY CELLS - Various embodiments of the present invention are generally directed to an apparatus comprising a programmable power source which uses an array of resistive sense memory cells, such as but not limited to STRAM or RRAM cells, to provide a controlled power bias to a load, such as but not limited to a micro-oscillator. In some embodiments, the programmable power source incorporates an array of serially connected resistive sense memory cells. A selectively controllable power level is applied by the programmable power source to a load in relation to a control input which selectively programs at least selected ones of the memory cells to a selected resistance state. | 09-02-2010 |
20100220518 | THERMALLY ASSISTED MULTI-BIT MRAM - Methods of writing to a multi-bit MRAM memory unit are described. The method includes to self-detected writing to a multi-bit (i.e., multilevel) thermally assisted MRAM. The self-detected writing increases a reading margin between data state levels and decreases reading margin variability due to cell resistance variation. | 09-02-2010 |
20100238712 | VARIABLE WRITE AND READ METHODS FOR RESISTIVE RANDOM ACCESS MEMORY - Variable write and read methods for resistance random access memory (RRAM) are disclosed. The methods include initializing a write sequence and verifying the resistance state of the RRAM cell. If a write pulse is needed, then two or more write pulses are applied through the RRAM cell to write the desired data state to the RRAM cell. Each subsequent write pulse has substantially the same or greater write pulse duration. Subsequent write pulses are applied to the RRAM cell until the RRAM cell is in the desired data state or until a predetermined number of write pulses have been applied to the RRAM cell. A read method is also disclosed where subsequent read pulses are applied through the RRAM cell until the read is successful or until a predetermined number of read pulses have been applied to the RRAM cell. | 09-23-2010 |
20100238721 | Stuck-At Defect Condition Repair for a Non-Volatile Memory Cell - A method and apparatus for repairing a stuck-at defect condition in a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM). In some embodiments, a resistive sense element has a magnetic tunneling junction (MTJ) and a repair plane located adjacent to the resistive sense element. The repair plane injects a magnetic field in the MTJ to repair a stuck-at defect condition. | 09-23-2010 |
20100246245 | SPIN-TORQUE MEMORY WITH UNIDIRECTIONAL WRITE SCHEME - Spin torque magnetic memory elements that have a pinned layer, two free layers, and a current-blocking insulating layer proximate to at least one of the free layers. The resistive state (e.g., low resistance or high resistance) of the memory elements is altered by passing electric current through the element in one direction. In other words, to change from a low resistance to a high resistance, the direction of electric current is the same as to change from a high resistance to a low resistance. The elements have a unidirectional write scheme. | 09-30-2010 |
20100246251 | Predictive Thermal Preconditioning and Timing Control for Non-Volatile Memory Cells - A method and apparatus for using thermal preconditioning to write data to a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM) memory cell. In some embodiments, a logical state is written to an unconditioned non-volatile first memory cell associated with a first block address. Thermal preconditioning is concurrently applied to a non-volatile second memory cell associated with a second block address selected in response to the first block address. | 09-30-2010 |
20100254174 | Resistive Sense Memory with Complementary Programmable Recording Layers - A resistive sense memory and method of writing data thereto. In accordance with various embodiments, the resistive sense memory comprises a first reference layer with a fixed magnetic orientation in a selected direction coupled to a first tunneling barrier, a second reference layer with a fixed magnetic orientation in the selected direction coupled to a second tunneling barrier, and a recording structure disposed between the first and second tunneling barriers comprising first and second free layers. A selected logic state is written to the resistive sense memory by applying a programming input to impart complementary first and second programmed magnetic orientations to the respective first and second free layers. | 10-07-2010 |
20100315865 | DIODE ASSISTED SWITCHING SPIN-TRANSFER TORQUE MEMORY UNIT - A memory array includes a cross-point array of bit and source lines. A memory is disposed at cross-points of the cross-point array. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. A transistor is electrically between the magnetic tunnel junction data cell and the bit line or source line and a diode is in thermal or electrical contact with the magnetic tunnel junction data cell to assist in resistance state switching. | 12-16-2010 |
20100321986 | MULTI-BIT STRAM MEMORY CELLS - A multi-bit spin torque magnetic element that has a ferromagnetic pinned layer having a pinned magnetization orientation, a non-magnetic layer, and a ferromagnetic free layer having a magnetization orientation switchable among at least four directions, the at least four directions being defined by a physical shape of the free layer. The magnetic element has at least four distinct resistance states. Magnetic elements with at least eight magnetization directions are also provided. | 12-23-2010 |
20100321994 | MEMORY SELF-REFERENCE READ AND WRITE ASSIST METHODS - A magnetic tunnel junction memory apparatus and self-reference read and write assist schemes are described. One method of self-reference reading a magnetic tunnel junction memory unit includes applying a first read current through a magnetic tunnel junction data cell to form a first bit line read voltage, then applying a first magnetic field through the magnetic tunnel junction data cell forming a magnetic field modified magnetic tunnel junction data cell, and then applying a second read current thorough the magnetic field modified magnetic tunnel junction data cell to form a second bit line read voltage. The first read current being less than the second read current. Then comparing the first bit line read voltage with the second bit line read voltage to determine whether the magnetic tunnel junction data cell was in a high resistance state or a low resistance state. Methods of applying a magnetic field to the MTJ and then writing the desired resistance state are also disclosed. | 12-23-2010 |
20110007429 | MAGNETIC SENSOR WITH PERPENDICULAR ANISOTROPHY FREE LAYER AND SIDE SHIELDS - A tunneling magneto-resistive reader includes a sensor stack separating a top magnetic shield from a bottom magnetic shield. The sensor stack includes a reference magnetic element having a reference magnetization orientation direction and a free magnetic element having a free magnetization orientation direction substantially perpendicular to the reference magnetization orientation direction. A non-magnetic spacer layer separates the reference magnetic element from the free magnetic element. A first side magnetic shield and a second side magnetic shield is disposed between the top magnetic shield from a bottom magnetic shield, and the sensor stack is between the first side magnetic shield and the second side magnetic shield. The first side magnetic shield and the second side magnetic shield electrically insulates the top magnetic shield from a bottom magnetic shield. | 01-13-2011 |
20110019465 | MAGNETIC TUNNEL JUNCTION WITH COMPENSATION ELEMENT - A magnetic tunnel junction having a compensation element is disclosed. The magnetic tunnel junction includes a synthetic antiferromagnetic reference element, and a synthetic antiferromagnetic compensation element having an opposite magnetization moment to a magnetization moment of the synthetic antiferromagnetic reference element. A free magnetic layer is between the synthetic antiferromagnetic reference element and the synthetic antiferromagnetic compensation element, and an electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic layer from the synthetic antiferromagnetic reference element. The free magnetic layer includes Co | 01-27-2011 |
20110019466 | Stuck-At Defect Condition Repair for a Non-Volatile Memory Cell - A method and apparatus for repairing a stuck-at defect condition in a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM). In some embodiments, a resistive sense element has a magnetic tunneling junction (MTJ) and a repair plane located adjacent to the resistive sense element. The repair plane injects a magnetic field in the MTJ to repair a stuck-at defect condition. | 01-27-2011 |
20110026317 | SPIN-TRANSFER TORQUE MEMORY SELF-REFERENCE READ AND WRITE ASSIST METHODS - A spin-transfer torque memory apparatus and self-reference read and write assist schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage. A magnetic field is applied through the free magnetic layer the forming a magnetic field modified magnetic tunnel junction data cell. Then a second read current is applied thorough the magnetic field modified magnetic tunnel junction data cell forming a second bit line read voltage and compared with the first bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state. Methods of applying a destabilizing magnetic field to the MTJ and then writing the desired resistance state are also disclosed. | 02-03-2011 |
20110026321 | MAGNETIC MEMORY WITH POROUS NON-CONDUCTIVE CURRENT CONFINEMENT LAYER - A magnetic element having a ferromagnetic pinned layer, a ferromagnetic free layer, a non-magnetic spacer layer therebetween, and a porous non-electrically conducting current confinement layer between the free layer and the pinned layer. The current confinement layer forms an interface either between the free layer and the non-magnetic spacer layer or the pinned layer and the non-magnetic spacer layer. | 02-03-2011 |
20110049658 | MAGNETIC TUNNEL JUNCTION WITH ELECTRONICALLY REFLECTIVE INSULATIVE SPACER - Magnetic tunnel junctions having a specular insulative spacer are disclosed. The magnetic tunnel junction includes a free magnetic layer, a reference magnetic layer, an electrically insulating and non-magnetic tunneling barrier layer separating the free magnetic layer from the reference magnetic layer, and an electrically insulating and electronically reflective layer positioned to reflect at least a portion of electrons back into the free magnetic layer. | 03-03-2011 |
20110085373 | SPIN-TRANSFER TORQUE MEMORY SELF-REFERENCE READ METHOD - Self-reference reading a magnetic tunnel junction data cell methods are disclosed. An illustrative method includes applying a read voltage across a magnetic tunnel junction data cell and forming a read current. The magnetic tunnel junction data cell has a first resistance state. The read voltage is sufficient to switch the magnetic tunnel junction data cell resistance. The method includes detecting the read current and determining if the read current remains constant during the applying step. If the read current remains constant during the applying step, then the first resistance state of the magnetic tunnel junction data cell is the resistance state that the read voltage was sufficient to switch the magnetic tunnel junction data cell to. | 04-14-2011 |
20110089509 | MAGNETIC MEMORY WITH SEPARATE READ AND WRITE PATHS - Magnetic memory having separate read and write paths is disclosed. The magnetic memory unit includes a ferromagnetic strip having a first end portion with a first magnetization orientation, an opposing second end portion with a second magnetization orientation, and a middle portion between the first end portion and the second end portion, the middle portion having a free magnetization orientation. The first magnetization orientation opposes the second magnetization orientation. A tunneling barrier separates a magnetic reference layer from the middle portion forming a magnetic tunnel junction. A bit line is electrically coupled to the second end portion. A source line is electrically coupled to the first end portion and a read line is electrically coupled to the magnetic tunnel junction. | 04-21-2011 |
20110121418 | MRAM Cells Including Coupled Free Ferromagnetic Layers for Stabilization - A free ferromagnetic data storage layer of an MRAM cell is coupled to a free ferromagnetic stabilization layer, which stabilization layer is directly electrically coupled to a contact electrode, on one side, and is separated from the free ferromagnetic data storage layer, on an opposite side, by a spacer layer. The spacer layer provides for the coupling between the two free layers, which coupling is one of: a ferromagnetic coupling and an antiferromagnetic coupling. | 05-26-2011 |
20110128778 | Predictive Thermal Preconditioning and Timing Control for Non-Volatile Memory Cells - A method and apparatus for using thermal preconditioning to write data to a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM) memory cell. In some embodiments, a logical state is written to an unconditioned non-volatile first memory cell associated with a first block address. Thermal preconditioning is concurrently applied to a non-volatile second memory cell associated with a second block address selected in response to the first block address. | 06-02-2011 |
20110134682 | VARIABLE WRITE AND READ METHODS FOR RESISTIVE RANDOM ACCESS MEMORY - Variable write and read methods for resistance random access memory (RRAM) are disclosed. The methods include initializing a write sequence and verifying the resistance state of the RRAM cell. If a write pulse is needed, then two or more write pulses are applied through the RRAM cell to write the desired data state to the RRAM cell. Each subsequent write pulse has substantially the same or greater write pulse duration. Subsequent write pulses are applied to the RRAM cell until the RRAM cell is in the desired data state or until a predetermined number of write pulses have been applied to the RRAM cell. A read method is also disclosed where subsequent read pulses are applied through the RRAM cell until the read is successful or until a predetermined number of read pulses have been applied to the RRAM cell. | 06-09-2011 |
20110164335 | MAGNETIC SENSOR INCLUDING A FREE LAYER HAVING PERPENDICULAR TO THE PLANE ANISOTROPY - A magnetic sensor includes a reference layer having a first magnetization direction and a free layer assembly having an effective magnetization direction substantially perpendicular to the first magnetization direction and substantially perpendicular to a plane of each layer of the free layer assembly. A spacer layer is between the reference layer and the free layer, and a signal enhancement layer is exchange coupled to the free layer assembly on a side opposite the spacer layer. | 07-07-2011 |
20110169114 | ELECTRONIC DEVICES UTILIZING SPIN TORQUE TRANSFER TO FLIP MAGNETIC ORIENTATION - Electronic devices that include (i) a magnetization controlling structure; (ii) a tunnel barrier structure; and (iii) a magnetization controllable structure including: a first polarizing layer; and a first stabilizing layer, wherein the tunnel barrier structure is between the magnetization controlling structure and the magnetization controlling structure and the first polarizing layer is between the first stabilizing layer and the tunnel barrier structure, wherein the electronic device has two stable overall magnetic configurations, and wherein a first unipolar current applied to the electronic device will cause the orientation of the magnetization controlling structure to reverse its orientation and a second unipolar current applied to the electronic device will cause the magnetization controllable structure to switch its magnetization in order to obtain one of the two stable overall magnetic configurations, wherein the second unipolar current has an amplitude that is less than the first unipolar current. | 07-14-2011 |
20110170342 | ELECTRONIC DEVICES UTILIZING SPIN TORQUE TRANSFER TO FLIP MAGNETIC ORIENTATION - Electronic devices that include (i) a magnetization controlling structure; (ii) a tunnel barrier structure; and (iii) a magnetization controllable structure including: a first polarizing layer; and a first stabilizing layer, wherein the tunnel barrier structure is between the magnetization controlling structure and the magnetization controlling structure and the first polarizing layer is between the first stabilizing layer and the tunnel barrier structure, wherein the electronic device has two stable overall magnetic configurations, and wherein a first unipolar current applied to the electronic device will cause the orientation of the magnetization controlling structure to reverse its orientation and a second unipolar current applied to the electronic device will cause the magnetization controllable structure to switch its magnetization in order to obtain one of the two stable overall magnetic configurations, wherein the second unipolar current has an amplitude that is less than the first unipolar current. | 07-14-2011 |
20110176360 | MAGNETIC RANDOM ACCESS MEMORY (MRAM) UTILIZING MAGNETIC FLIP-FLOP STRUCTURES - Non-volatile magnetic random access memory (MRAM) devices that include magnetic flip-flop structures that include a magnetization controlling structure; a first tunnel barrier structure; and a magnetization controllable structure that includes a first polarizing layer; and a first stabilizing layer, wherein the first tunnel barrier structure is between the magnetization controllable structure and the magnetization controlling structure and the first polarizing layer is between the first stabilizing layer and the first tunnel barrier structure, wherein the magnetic flip-flop device has two stable overall magnetic configurations, and wherein a first unipolar current applied to the device will cause the orientation of the magnetization controlling structure to reverse its orientation and a second unipolar current applied to the electronic device will cause the magnetization controllable structure to switch its magnetization so that the device reaches one of the two stable overall magnetic configurations, wherein the second unipolar current has an amplitude that is less than the first unipolar current; a second tunnel barrier structure and a reference layer, wherein the second tunnel barrier structure is between the magnetic flip-flop device and the reference layer. MRAM cells that include such devices and arrays including such cells are also disclosed. | 07-21-2011 |
20110188300 | NON-VOLATILE MEMORY WITH STRAY MAGNETIC FIELD COMPENSATION - A method and apparatus for stray magnetic field compensation in a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM). In some embodiments, a first tunneling barrier is coupled to a reference structure that has a perpendicular anisotropy and a first magnetization direction. A recording structure that has a perpendicular anisotropy is coupled to the first tunneling barrier and a nonmagnetic spacer layer. A compensation layer that has a perpendicular anisotropy and a second magnetization direction in substantial opposition to the first magnetization direction is coupled to the nonmagnetic spacer layer. Further, the memory cell is programmable to a selected resistance state with application of a current to the recording structure. | 08-04-2011 |
20110194334 | DIODE ASSISTED SWITCHING SPIN-TRANSFER TORQUE MEMORY UNIT - A memory array includes a cross-point array of bit and source lines. A memory is disposed at cross-points of the cross-point array. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. A transistor is electrically between the magnetic tunnel junction data cell and the bit line or source line and a diode is in thermal or electrical contact with the magnetic tunnel junction data cell to assist in resistance state switching. | 08-11-2011 |
20110194335 | MAGNETIC MEMORY WITH PHONON GLASS ELECTRON CRYSTAL MATERIAL - A magnetic memory unit includes a tunneling barrier separating a free magnetic element and a reference magnetic element. A first phonon glass electron crystal layer is disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element. A second phonon glass electron crystal layer also be disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element to provide a Peltier effect on the free magnetic element and the reference magnetic element. | 08-11-2011 |
20110205788 | Spin-Torque Bit Cell With Unpinned Reference Layer and Unidirectional Write Current - Method and apparatus for using a uni-directional write current to store different logic states in a non-volatile memory cell, such as a modified STRAM cell. In some embodiments, the memory cell has an unpinned ferromagnetic reference layer adjacent a cladded conductor, a ferromagnetic storage layer and a tunneling barrier between the reference layer and the storage layer. Passage of a current along the cladded conductor induces a selected magnetic orientation in the reference layer, which is transferred through the tunneling barrier for storage by the storage layer. Further, the orientation of the applying step is provided by a cladding layer adjacent a conductor along which a current is passed and the current induces a magnetic field in the cladding layer of the selected magnetic orientation. | 08-25-2011 |
20110211272 | MAGNETIC FIELD DETECTING DEVICE AND METHODS OF USING THE SAME - A disclosed device having a principle axis and including a magnetoresistive stack, the magnetoresistive stack having first and second opposing surfaces, the magnetoresistive stack including a free layer, a spacer layer, and a reference layer, wherein the spacer layer is positioned between the first and reference layer, the free layer includes magnetic material having a free magnetic orientation in a first plane; the spacer layer includes a nonmagnetic material; and the reference layer includes a magnetic material having a pinned magnetic orientation in a second plane, wherein the second plane is perpendicular to the first plane and parallel to the principle axis of the device; an insulating layer at least a portion of the outer surface of the magnetoresistive stack; a shielding layer surrounding at least a portion of the insulating layer; and a conducting layer, wherein the conducting layer provides electrical connection between the magnetoresistive stack and the shielding layer. | 09-01-2011 |
20110221016 | FLUX-CLOSED STRAM WITH ELECTRONICALLY REFLECTIVE INSULATIVE SPACER - Flux-closed spin-transfer torque memory having a specular insulative spacer is disclosed. A flux-closed spin-transfer torque memory unit includes a multilayer free magnetic element including a first free magnetic layer anti-ferromagnetically coupled to a second free magnetic layer through an electrically insulating and electronically reflective layer. An electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic element from a reference magnetic layer. | 09-15-2011 |
20110241666 | MAGNETIC ELEMENT WITH IMPROVED AREAL RESOLUTION - An apparatus and associated method for a magnetic element capable of detecting changes in magnetic states. Various embodiments of the present invention are generally directed to a free layer that has a first areal extent that is sensitive to a magnetic field and a synthetic antiferromagnetic (SAF) layer adjacent to the free layer and has a second areal extent that is greater than the first areal extent. | 10-06-2011 |
20110242883 | THERMALLY ASSISTED MULTI-BIT MRAM - Methods of writing to a multi-bit MRAM memory unit are described. The method includes to self-detected writing to a multi-bit (i.e., multilevel) thermally assisted MRAM. The self-detected writing increases a reading margin between data state levels and decreases reading margin variability due to cell resistance variation. | 10-06-2011 |
20110254113 | ST-RAM MAGNETIC ELEMENT CONFIGURATIONS TO REDUCE SWITCHING CURRENT - In order to increase an efficiency of spin transfer and thereby reduce the required switching current, a current perpendicular to plane (CPP) magnetic element for a memory device includes either one or both of a free magnetic layer, which has an electronically reflective surface, and a permanent magnet layer, which has perpendicular anisotropy to bias the free magnetic layer. | 10-20-2011 |
20110267873 | NON-VOLATILE MEMORY WITH PROGRAMMABLE CAPACITANCE - Non-volatile memory with programmable capacitance is disclosed. Illustrative data memory units include a substrate including a source region and a drain region. A first insulating layer is over the substrate. A second insulating layer is over the substrate and between the source region and drain region. A solid electrolyte layer is between the first insulating layer and second insulating layer. The solid electrolyte layer has a capacitance that is controllable between at least two states. A first electrode is electrically coupled to a first side of the solid electrolyte layer and is electrically coupled to a voltage source. A second electrode is electrically coupled to a second side of the solid electrolyte layer and is electrically coupled to the voltage source. Multi-bit memory units are also disclosed. | 11-03-2011 |
20110298068 | MAGNETIC TUNNEL JUNCTION WITH COMPENSATION ELEMENT - A magnetic tunnel junction having a compsensation element is disclosed. The magnetic tunnel junction includes a reference element, and a compensation element having an opposite magnetization moment to a magnetization moment of the reference element. A free magnetic layer is between the reference element and the compensation element, and an electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic layer from the reference element. The free magnetic layer includes Co | 12-08-2011 |
20120020148 | MULTI-BIT STRAM MEMORY CELLS - A multi-bit spin torque magnetic element that has a ferromagnetic pinned layer having a pinned magnetization orientation, a non-magnetic layer, and a ferromagnetic free layer having a magnetization orientation switchable among at least four directions, the at least four directions being defined by a physical shape of the free layer. The magnetic element has at least four distinct resistance states. Magnetic elements with at least eight magnetization directions are also provided. | 01-26-2012 |
20120039115 | STRAM WITH COMPOSITE FREE MAGNETIC ELEMENT - Spin-transfer torque memory includes a composite free magnetic element, a reference magnetic element having a magnetization orientation that is pinned in a reference direction, and an electrically insulating and non-magnetic tunneling barrier layer separating the composite free magnetic element from the magnetic reference element. The free magnetic element includes a hard magnetic layer exchanged coupled to a soft magnetic layer. The composite free magnetic element has a magnetization orientation that can change direction due to spin-torque transfer when a write current passes through the spin-transfer torque memory unit. | 02-16-2012 |
20120081951 | NON-VOLATILE MEMORY WITH STRAY MAGNETIC FIELD COMPENSATION - A method and apparatus for stray magnetic field compensation in a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM). In some embodiments, a first tunneling barrier is coupled to a reference structure that has a perpendicular anisotropy and a first magnetization direction. A recording structure that has a perpendicular anisotropy is coupled to the first tunneling barrier and a nonmagnetic spacer layer. A compensation layer that has a perpendicular anisotropy and a second magnetization direction in substantial opposition to the first magnetization direction is coupled to the nonmagnetic spacer layer. Further, the memory cell is programmable to a selected resistance state with application of a current to the recording structure. | 04-05-2012 |
20120106239 | Magnetic Memory Element With Multi-Domain Storage Layer - An apparatus and method for enhancing data writing and retention to a magnetic memory element, such as in a non-volatile data storage array. In accordance with various embodiments, a programmable memory element has a reference layer and a storage layer. The reference layer is provided with a fixed magnetic orientation. The storage layer is programmed to have a first region with a magnetic orientation antiparallel to said fixed magnetic orientation, and a second region with a magnetic orientation parallel to said fixed magnetic orientation. A thermal assist layer may be incorporated into the memory element to enhance localized heating of the storage layer to aid in the transition of the first region from parallel to antiparallel magnetic orientation during a write operation. | 05-03-2012 |
20120106241 | SPIN-TRANSFER TORQUE MEMORY SELF-REFERENCE READ METHOD - A spin-transfer torque memory apparatus and self-reference read schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage, the magnetic tunnel junction data cell having a first resistance state and storing the first bit line read voltage in a first voltage storage device. Then applying a low resistance state polarized write current through the magnetic tunnel junction data cell, forming a low second resistance state magnetic tunnel junction data cell. A second read current is applied through the low second resistance state magnetic tunnel junction data cell to forming a second bit line read voltage. The second bit line read voltage is stored in a second voltage storage device. The method also includes comparing the first bit line read voltage with the second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state. | 05-03-2012 |
20120120718 | Multi-Bit Magnetic Memory with Independently Programmable Free Layer Domains - An apparatus and associated method for a non-volatile memory cell, such as a multi-bit magnetic random access memory cell. In accordance with various embodiments, a magnetic tunnel junction (MTJ) has a ferromagnetic free layer with multiple magnetic domains that are each independently programmable to predetermined magnetizations. Those magnetizations can then be read as different logical states of the MTJ. | 05-17-2012 |
20120127786 | FLUX PROGRAMMED MULTI-BIT MAGNETIC MEMORY - An apparatus and associated method for a non-volatile memory cell, such as a multi-bit magnetic random access memory cell. In accordance with various embodiments, a first magnetic tunnel junction (MTJ) is adjacent to a second MTJ having a magnetic filter. The first MTJ is programmed to a first logical state with a first magnetic flux while the magnetic filter absorbs the first magnetic flux to prevent the second MTJ from being programmed. | 05-24-2012 |
20120127787 | SPIN-TRANSFER TORQUE MEMORY NON-DESTRUCTIVE SELF-REFERENCE READ METHOD - A method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage. The magnetic tunnel junction data cell has a first resistance state. Then the method includes applying a second read current thorough the magnetic tunnel junction data cell having the first resistance state. The first read current is less than the second read current. Then the first bit line read voltage is compared with the second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state. | 05-24-2012 |
20120138884 | PROGRAMMABLE METALLIZATION MEMORY CELL WITH PLANARIZED SILVER ELECTRODE - Programmable metallization memory cells having a planarized silver electrode and methods of forming the same are disclosed. The programmable metallization memory cells include a first metal contact and a second metal contact, an ion conductor solid electrolyte material is between the first metal contact and the second metal contact, and either a silver alloy doping electrode separates the ion conductor solid electrolyte material from the first metal contact or the second metal contact, or a silver doping electrode separates the ion conductor solid electrolyte material from the first metal contact. The silver electrode includes a silver layer and a metal seed layer separating the silver layer from the first metal contact. | 06-07-2012 |
20120142169 | PROGRAMMABLE METALLIZATION MEMORY CELL WITH PLANARIZED SILVER ELECTRODE - Programmable metallization memory cells having a planarized silver electrode and methods of forming the same are disclosed. The programmable metallization memory cells include a first metal contact and a second metal contact, an ion conductor solid electrolyte material is between the first metal contact and the second metal contact, and either a silver alloy doping electrode separates the ion conductor solid electrolyte material from the first metal contact or the second metal contact, or a silver doping electrode separates the ion conductor solid electrolyte material from the first metal contact. The silver electrode includes a silver layer and a metal seed layer separating the silver layer from the first metal contact. | 06-07-2012 |
20120147665 | Predictive Thermal Preconditioning and Timing Control for Non-Volatile Memory Cells - Method and apparatus for using thermal preconditioning to write data to a non-volatile memory cell. In accordance with some embodiments, a semiconductor memory has an array of non-volatile memory cells, and a control circuit which stores a first write command from a host to write data to said array. A write circuit flows a write current through an unconditioned first selected cell having a first block address associated with the first write command to write the first selected cell to a selected data state, and concurrently passes a thermal preconditioning current through a second selected cell having a second block address associated with the first block address. The write circuit further passes a thermal preconditioning current through a third selected cell having a third block address associated with the second block address in response to receipt by the control circuit of a second write command from the host associated with the second block address. | 06-14-2012 |
20120201075 | MAGNETIC MEMORY WITH ASYMMETRIC ENERGY BARRIER - A magnetic tunnel junction memory cell includes a ferromagnetic reference layer, a ferromagnetic free layer, and a non-magnetic barrier layer separating the ferromagnetic reference layer from the ferromagnetic free layer. The magnetic tunnel junction cell has an asymmetric energy barrier for switching between a high resistance data state and a low resistance data state. Memory devices and methods are also described. | 08-09-2012 |
20120224417 | DIODE ASSISTED SWITCHING SPIN-TRANSFER TORQUE MEMORY UNIT - A memory array includes a cross-point array of bit and source lines. A memory is disposed at cross-points of the cross-point array. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. A transistor is electrically between the magnetic tunnel junction data cell and the bit line or source line and a diode is in thermal or electrical contact with the magnetic tunnel junction data cell to assist in resistance state switching. | 09-06-2012 |
20120229935 | Magnetic Element With Increased Scissoring Angle - An apparatus and associated method is presently disclosed for a data sensing element capable of detecting changes in magnetic states. Various embodiments of the present invention are generally directed to a magnetically responsive lamination that has a spacer layer disposed between a first and second ferromagnetic free layer. The lamination having at least one free layer with a shape feature that increases a scissoring angle between the free layers. | 09-13-2012 |
20120230092 | THERMALLY ASSISTED MULTI-BIT MRAM - Methods of writing to a multi-bit MRAM memory unit are described. The method includes to self-detected writing to a multi-bit (i.e., multilevel) thermally assisted MRAM. The self-detected writing increases a reading margin between data state levels and decreases reading margin variability due to cell resistance variation. | 09-13-2012 |
20120250405 | MAGNETIC FIELD ASSISTED STRAM CELLS - Memory units that have a magnetic tunnel junction cell that utilizes spin torque and a current induced magnetic field to assist in the switching of the magnetization orientation of the free layer of the magnetic tunnel junction cell. The memory unit includes a spin torque current source for passing a current through the magnetic tunnel junction cell, the spin torque current source having a direction perpendicular to the magnetization orientations, and also includes a magnetic ampere field current source is oriented in a direction orthogonal or at some angles to the magnetization orientations. | 10-04-2012 |
20120257447 | MAGNETIC TUNNEL JUNCTION WITH COMPENSATION ELEMENT - A magnetic tunnel junction having a compsensation element is disclosed. The magnetic tunnel junction includes a reference element, and a compensation element having an opposite magnetization moment to a magnetization moment of the reference element. A free magnetic layer is between the reference element and the compensation element, and an electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic layer from the reference element. The free magnetic layer includes Co | 10-11-2012 |
20120261778 | SPIN-TORQUE MEMORY WITH UNIDIRECTIONAL WRITE SCHEME - Spin torque magnetic memory elements that have a pinned layer, two free layers, and a current-blocking insulating layer proximate to at least one of the free layers. The resistive state (e.g., low resistance or high resistance) of the memory elements is altered by passing electric current through the element in one direction. In other words, to change from a low resistance to a high resistance, the direction of electric current is the same as to change from a high resistance to a low resistance. The elements have a unidirectional write scheme. | 10-18-2012 |
20120268847 | TRILAYER READER WITH CURRENT CONSTRAINT AT THE ABS - A magnetoresistive read sensor is described. The sensor is a magnetically responsive stack positioned between top and bottom electrodes on an air bearing surface. Current in the sensor is confined to regions close to the air bearing surface by a first multilayer insulator structure between the stack and at least one electrode to enhance reader sensitivity. | 10-25-2012 |
20120281319 | Magnetoresistive Shield - A magnetic shield that is capable of enhancing magnetic reading. In accordance with various embodiments, a magnetic element has a magnetically responsive stack shielded from magnetic flux and biased to a predetermined default magnetization by at least one lateral side shield that has a transition metal layer disposed between first and second ferromagnetic layers. | 11-08-2012 |
20120299135 | NON VOLATILE MEMORY INCLUDING STABILIZING STRUCTURES - An apparatus that includes a magnetic structure including a reference layer; and a free layer; an exchange coupling spacer layer; and a stabilizing layer, wherein the exchange coupling spacer layer is between the magnetic structure and the stabilizing layer and exchange couples the free layer of the magnetic structure to the stabilizing layer. | 11-29-2012 |
20130001718 | MAGNETIC TUNNEL JUNCTION WITH ELECTRONICALLY REFLECTIVE INSULATIVE SPACER - Magnetic tunnel junctions having a specular insulative spacer are disclosed. The magnetic tunnel junction includes a free magnetic layer, a reference magnetic layer, an electrically insulating and non-magnetic tunneling barrier layer separating the free magnetic layer from the reference magnetic layer, and an electrically insulating and electronically reflective layer positioned to reflect at least a portion of electrons back into the free magnetic layer. | 01-03-2013 |
20130021697 | MAGNETIC SENSOR WITH PERPENDICULAR ANISOTROPHY FREE LAYER AND SIDE SHIELDS - A tunneling magneto-resistive reader includes a sensor stack separating a top magnetic shield from a bottom magnetic shield. The sensor stack includes a reference magnetic element having a reference magnetization orientation direction and a free magnetic element having a free magnetization orientation direction substantially perpendicular to the reference magnetization orientation direction. A non-magnetic spacer layer separates the reference magnetic element from the free magnetic element. A first side magnetic shield and a second side magnetic shield is disposed between the top magnetic shield from a bottom magnetic shield, and the sensor stack is between the first side magnetic shield and the second side magnetic shield. The first side magnetic shield and the second side magnetic shield electrically insulates the top magnetic shield from a bottom magnetic shield. | 01-24-2013 |
20130027031 | Enhanced Magnetic Sensor Biasing Yoke - An apparatus and associated method are generally directed to a magnetic sensor. A sensor may have a stack with an air bearing surface (ABS) and a biasing surface opposite the ABS. A biasing yoke can be disposed between a biasing magnet and the stack with the biasing magnet having a lower magnet moment than the biasing yoke. | 01-31-2013 |
20130140659 | FLUX-CLOSED STRAM WITH ELECTRONICALLY REFLECTIVE INSULATIVE SPACER - Flux-closed spin-transfer torque memory having a specular insulative spacer is disclosed. A flux-closed spin-transfer torque memory unit includes a multilayer free magnetic element including a first free magnetic layer anti-ferromagnetically coupled to a second free magnetic layer through an electrically insulating and electronically reflective layer. An electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic element from a reference magnetic layer. | 06-06-2013 |
20130175647 | MAGNETIC MEMORY WITH PHONON GLASS ELECTRON CRYSTAL MATERIAL - A magnetic memory unit includes a tunneling barrier separating a free magnetic element and a reference magnetic element. A first phonon glass electron crystal layer is disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element. A second phonon glass electron crystal layer also be disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element to provide a Peltier effect on the free magnetic element and the reference magnetic element. | 07-11-2013 |
20130181306 | NON-VOLATILE MEMORY WITH STRAY MAGNETIC FIELD COMPENSATION - A method and apparatus for stray magnetic field compensation in a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM). In some embodiments, a first tunneling barrier is coupled to a reference structure that has a perpendicular anisotropy and a first magnetization direction. A recording structure that has a perpendicular anisotropy is coupled to the first tunneling barrier and a nonmagnetic spacer layer. A compensation layer that has a perpendicular anisotropy and a second magnetization direction in substantial opposition to the first magnetization direction is coupled to the nonmagnetic spacer layer. Further, the memory cell is programmable to a selected resistance state with application of a current to the recording structure. | 07-18-2013 |
20130188420 | NON-DESTRUCTIVE SELF-REFERENCE SPIN-TRANSFER TORQUE MEMORY - A non-destructive self-reference spin-transfer torque memory unit is disclosed. | 07-25-2013 |
20130215674 | SPIN-TRANSFER TORQUE MEMORY SELF-REFERENCE READ METHOD - A spin-transfer torque memory apparatus and self-reference read schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage. Then applying a low resistance state polarized write current through the magnetic tunnel junction data cell, forming a low second resistance state magnetic tunnel junction data cell. A second read current is applied through the low second resistance state magnetic tunnel junction data cell to forming a second bit line read voltage. The method also includes comparing the first bit line read voltage with the second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state. | 08-22-2013 |
20130229862 | STRAM WITH COMPOSITE FREE MAGNETIC ELEMENT - Spin-transfer torque memory includes a composite free magnetic element, a reference magnetic element having a magnetization orientation that is pinned in a reference direction, and an electrically insulating and non-magnetic tunneling barrier layer separating the composite free magnetic element from the magnetic reference element. The free magnetic element includes a hard magnetic layer exchanged coupled to a soft magnetic layer. The composite free magnetic element has a magnetization orientation that can change direction due to spin-torque transfer when a write current passes through the spin-transfer torque memory unit. | 09-05-2013 |
20130292784 | Magnetic Memory Element with Multi-Domain Storage Layer - An apparatus and method for enhancing data writing and retention to a magnetic memory element, such as in a non-volatile data storage array. In accordance with various embodiments, a programmable memory element has a reference layer and a storage layer. The reference layer is provided with a fixed magnetic orientation. The storage layer is programmed to have a first region with a magnetic orientation antiparallel to said fixed magnetic orientation, and a second region with a magnetic orientation parallel to said fixed magnetic orientation. A thermal assist layer may be incorporated into the memory element to enhance localized heating of the storage layer to aid in the transition of the first region from parallel to antiparallel magnetic orientation during a write operation. | 11-07-2013 |
20140015075 | MAGNETIC MEMORY WITH SEPARATE READ AND WRITE PATHS - Magnetic memory having separate read and write paths is disclosed. The magnetic memory unit includes a ferromagnetic strip having a first end portion with a first magnetization orientation, an opposing second end portion with a second magnetization orientation, and a middle portion between the first end portion and the second end portion, the middle portion having a free magnetization orientation. The first magnetization orientation opposes the second magnetization orientation. A tunneling barrier separates a magnetic reference layer from the middle portion forming a magnetic tunnel junction. A bit line is electrically coupled to the second end portion. A source line is electrically coupled to the first end portion and a read line is electrically coupled to the magnetic tunnel junction. | 01-16-2014 |