Patent application number | Description | Published |
20090022126 | MULTIPLE PACKET DATA NETWORK SUPPORT OVER TRUSTED ACCESS - A media access gateway comprises a wireless network interface, an authorization module, a filter information module, and a proxy mobility agent module. The wireless network interface selectively establishes a wireless link with a first interface of a wireless terminal that has a plurality of wireless interfaces. The authorization module determines a home agent corresponding to the wireless terminal. The filter information module receives filter information from one of the wireless terminal and a server and generates output filter information. The proxy mobility agent module transmits a binding update to the home agent. The binding update includes the output filter information. | 01-22-2009 |
20090040964 | DYNAMIC INTERNET PROTOCOL ADDRESSING SOLUTIONS WITH NETWORK-BASED MOBILITY - A media access gateway comprises a wireless network interface, an address assignment module, and a proxy mobility agent module. The wireless network interface establishes a wireless link with a wireless terminal. The address assignment module receives an address request message, which includes a mobility signal from the wireless terminal. The proxy mobility agent module selectively transmits a proxy binding update to a local mobility anchor and receives a proxy binding acknowledgement from the local mobility anchor. The address assignment module selectively transmits an address assignment message to the wireless terminal when the mobility signal indicates proxy mobility. The address assignment message is based on address information in the proxy binding acknowledgement. | 02-12-2009 |
20090109986 | SYSTEM AND METHOD FOR RESELECTION OF A PACKET DATA NETWORK GATEWAY WHEN ESTABLISHING CONNECTIVITY - A network control module includes an access module that determines whether a first packet data network gateway communicating with a first packet data network also communicates with a second packet data network. The network control module also includes a selection control module in communication with a mobile wireless terminal. The mobile wireless terminal attempts to access the second packet data network by establishing a connection with a second packet data network gateway that communicates with the second packet data network. In response to the access module determining that the first packet data network gateway also communicates with the second packet data network, the selection control module commands the mobile wireless terminal to access the second packet data network through the first packet data network gateway. | 04-30-2009 |
20110064056 | SYSTEM AND METHOD FOR RESELECTION OF A PACKET DATA NETWORK GATEWAY WHEN ESTABLISHING CONNECTIVITY - A network control module includes an access module that determines whether a first packet data network gateway communicating with a first packet data network also communicates with a second packet data network. The network control module also includes a selection control module in communication with a mobile wireless terminal. The mobile wireless terminal attempts to access the second packet data network by establishing a connection with a second packet data network gateway that communicates with the second packet data network. In response to the access module determining that the first packet data network gateway also communicates with the second packet data network, the selection control module commands the mobile wireless terminal to access the second packet data network through the first packet data network gateway. | 03-17-2011 |
20140136732 | METHOD AND APPARATUS FOR WIRELESS DEVICE WITH MULTIPLE WIRELESS INTERFACES USING PROXY MOBILITY - A wireless device includes first and second wireless network interfaces, first and second address determination modules, and a mobility control module. The first interface establishes layer two connectivity with a first media access gateway. The first address determination module assigns a first address to the first interface in response to a first address assignment message received from the first media access gateway. The second interface establishes layer two connectivity with a second media access gateway in preparation for a handoff from the first media access gateway to the second media access gateway. The second interface transmits an address request message, indicating a desire for the first address to be assigned to the second interface, to the second media access gateway. The second address determination module assigns a second address to the second interface in response to a second address assignment message received from the second media access gateway. | 05-15-2014 |
20140269515 | SYSTEM AND METHOD FOR CONNECTING A WIRELESS TERMINAL TO A NETWORK VIA A GATEWAY - A system including (i) a first gateway providing access to a first network and a second network, and (ii) a second gateway providing access to the second network. A network device determines whether a wireless terminal is communicating with the first network via the first gateway and attempting to communicate with the second network via the second gateway. The network device determines whether the first gateway permits the wireless terminal to communicate with the second network. In response to determining that the wireless terminal is communicating with the first network via the first gateway and is attempting to communicate with the second network via the second gateway and that the first gateway permits the wireless terminal to communicate with the second network, the network device permits the wireless terminal to access the second network via the first gateway prior to the wireless terminal establishing a connection with the second gateway. | 09-18-2014 |
Patent application number | Description | Published |
20100195383 | Isolated P-well Architecture for a Memory Device - A memory device and a method to prevent or reduce program disturb by isolating P-wells of strings in a non-volatile memory array. During a program operation, the isolated P-wells may be coupled to corresponding bitlines, which may be selected or inhibited, and may be at different voltages. During erase, read, and verify operations, the isolated P-wells may be coupled to source. | 08-05-2010 |
20110090739 | INDEPENDENT WELL BIAS MANAGEMENT IN A MEMORY DEVICE - Methods for programming a memory device, memory devices configured to perform the disclosed programming methods, and memory systems having a memory device configured to perform the disclosed programming methods, for example, are provided. According to at least one such method, multiple independent semiconductor well regions each having strings of memory cells are independently biased during a programming operation performed on a memory device. Reduced charge leakage may be realized during a programming operation in response to independent well biasing methods. | 04-21-2011 |
20120218824 | INDEPENDENT WELL BIAS MANAGEMENT IN A MEMORY DEVICE - Methods for programming a memory device, memory devices configured to perform the disclosed programming methods, and memory systems having a memory device configured to perform the disclosed programming methods, for example, are provided. According to at least one such method, multiple independent semiconductor well regions each having strings of memory cells are independently biased during a programming operation performed on a memory device. Reduced charge leakage may be realized during a programming operation in response to independent well biasing methods. | 08-30-2012 |
20140089762 | Techniques Associated with a Read and Write Window Budget for a Two Level Memory System - Examples are disclosed for techniques associated with a read and write window budget for a two level memory (2LM) system. In some examples, a read and write window budget may be established for the 2LM system that includes a first level memory and a second level memory. The established read and write window budget may include a combination of a first set of memory addresses and a second set of memory addresses of the second level of memory. The first set of memory addresses may be associated with non-volatile memory cells having wider cell threshold voltage distributions compared to cell threshold voltage distributions for non-volatile memory cells associated with the second set of memory addresses. According to some examples, the established read and write window budget may part of a strategy to meet both a completion time threshold for a given amount of memory and an acceptable error rate threshold for the given amount of memory when fulfilling read or write requests to the second level memory. Other examples are described and claimed. | 03-27-2014 |
Patent application number | Description | Published |
20100232234 | MEMORY DEVICE HAVING IMPROVED PROGRAMMING OPERATION - Some embodiments include methods and devices having a module and memory cells. The module is configured to reduce the amount of electrons in the sources and drains of the memory cells during a programming operation. | 09-16-2010 |
20110280085 | MEMORY DEVICE HAVING IMPROVED PROGRAMMING OPERATION - Some embodiments include methods and devices having a module and memory cells. The module is configured to reduce the amount of electrons in the sources and drains of the memory cells during a programming operation. | 11-17-2011 |
20130016569 | MEMORY DEVICE HAVING IMPROVED PROGRAMMING OPERATION - Some embodiments include methods and devices having a module and memory cells. The module is configured to reduce the amount of electrons in the sources and drains of the memory cells during a programming operation. | 01-17-2013 |
20140089561 | Techniques Associated with Protecting System Critical Data Written to Non-Volatile Memory - Examples are disclosed for techniques associated with protecting system critical data written to non-volatile memory. In some examples, system critical data may be written to a non-volatile memory using a first data protection scheme. User data that includes non-system critical data may also be written to the non-volatile memory using a second data protection scheme. For these examples, both data protection schemes may have a same given data format size. Various examples are provided for use of the first data protection scheme that may provide enhanced protection for the system critical data compared to protection provided to user data using the second data protection scheme. Other examples are described and claimed. | 03-27-2014 |
20140258804 | REDUCED UNCORRECTABLE MEMORY ERRORS - Uncorrectable memory errors may be reduced by determining a logical array address for a set of memory arrays and transforming the logical array address to at least two unique array addresses based, at least in part, on logical locations of at least two memory arrays within the set of memory arrays. The at least two memory arrays are then accessed using the at least two unique array addresses, respectively. | 09-11-2014 |