Croce
Angelo Croce, Petange LU
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20090014070 | Electroactive device based on organic compounds, comprising a float-glass substrate - An electroactive photonic device (D) comprises a substrate ( | 01-15-2009 |
Giuseppe Croce, Missaglia IT
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20100270614 | PROCESS FOR MANUFACTURING DEVICES FOR POWER APPLICATIONS IN INTEGRATED CIRCUITS - An embodiment method for forming a MOS transistor for power applications in a substrate of semiconductor material, said method being integrated in a process for manufacturing integrated circuits which uses an STI technique for forming the insulating regions. The method includes the phases of forming an insulating element on a top surface of the substrate and forming a control electrode on a free surface of the insulating element. The insulating element insulates the control electrode from the substrate. Said insulating element comprises a first portion and a second portion. The extension of the first portion along a first direction perpendicular to the top surface is lower than the extension of the second portion along such first direction. The phase of forming the insulating element comprises generating said second portion by locally oxidizing the top surface. | 10-28-2010 |
20140027837 | TRANSISTOR WITH SELF-ALIGNED TERMINAL CONTACTS - An embodiment of a MOS transistor includes a layer of semiconductor material, drain regions having a first conductivity type alternately formed in the layer with body regions having a second conductivity type, a first insulating layer disposed over the surface of the layer of semiconductor material, at least one gate-precursor region of conductive material disposed over the first insulating layer, a second insulating layer disposed over the first insulating layer and the gate-precursor region, a third insulating layer disposed over the second insulating layer, at least one source opening formed by removing overlapping portions of the second insulating layer, the third insulating layer, the gate-precursor region, and by at least partially removing a corresponding portion of the first insulating layer. The embodiment may also include at least one source-precursor region extending into the layer of semiconductor material from a surface portion below the at least one source opening. | 01-30-2014 |
Giuseppe Croce, Monticello B. (lc) IT
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20090152733 | DEEP CONTACTS OF INTEGRATED ELECTRONIC DEVICES BASED ON REGIONS IMPLANTED THROUGH TRENCHES - An embodiment of an integrated circuit includes first and second semiconductor layers and a contact region disposed in the second layer. The first semiconductor layer is of a first conductivity, and the second semiconductor layer is disposed over the first layer and has a surface. The contact region is contiguous with the surface, contacts the first layer, includes a first inner conductive portion, and includes an outer conductive portion of the first conductivity. The contact region may extend deeper than conventional contact regions, because where the inner conductive portion is formed from a trench, doping the outer conductive portion via the trench may allow one to implant the dopants more deeply than conventional techniques allow. | 06-18-2009 |
20130017676 | DEEP CONTACTS OF INTEGRATED ELECTRONIC DEVICES BASED ON REGIONS IMPLANTED THROUGH TRENCHES - An embodiment of an integrated circuit includes first and second semiconductor layers and a contact region disposed in the second layer. The first semiconductor layer is of a first conductivity, and the second semiconductor layer is disposed over the first layer and has a surface. The contact region is contiguous with the surface, contacts the first layer, includes a first inner conductive portion, and includes an outer conductive portion of the first conductivity. The contact region may extend deeper than conventional contact regions, because where the inner conductive portion is formed from a trench, doping the outer conductive portion via the trench may allow one to implant the dopants more deeply than conventional techniques allow. | 01-17-2013 |
Giuseppe Croce, Missaglia (lc) IT
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20120098142 | ELECTRICAL CONTACT FOR A DEEP BURIED LAYER IN A SEMI-CONDUCTOR DEVICE - A semi-conductor device includes at least one deep buried layer with an electrical connection made thereto by an electrical contact. The electrical contact to the deep buried layer is made by formed an opening through the use of a first chemical attack and a second chemical attack after the first chemical attack. By making an opening, the electrical contact can be made with the deep buried layer without at the same time occupying excessively wide portions of the device. For example, it is possible to make electrical contacts having a width of less than 1.5 μm with deep layers having a depth of more than 5 μm. | 04-26-2012 |
Jacques Croce, Saint Laurent Du Pont FR
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20110073013 | METHOD FOR MANUFACTURING A SULFOALUMINOUS OR BELITIC SULFOALUMINOUS CLINKER, AND CORRESPONDING EQUIPMENT - The invention relates to a method for manufacturing a sulfoaluminous or belitic sulfoaluminous clinker from a raw mix formed from a mixture including minerals containing calcium, aluminum, silica, iron, and sulfur, preferably in sulfate form, and is characterized in that the method comprises the steps including: at least partially dehydrating and decarbonating the mixture through placement in a vertical kiln ( | 03-31-2011 |
Nathaniel Croce, Toronto CA
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20110165939 | METHOD AND SYSTEM FOR PROVIDING A 3D ACTIVITY IN A VIRTUAL PRESENTATION - Provided is a method of developing user-generated challenges in a virtual environment. The method includes receiving registration information transmitted over a communication network, validating the registration information, establishing a user account on a computer and associating a first virtual character with the user account. A user is granted access to a course creation tool comprising a plurality of different course portions that are to be arranged in the virtual environment to construct a course to be navigated from a start point to an end point. Included along the course, to be encountered by another virtual character between the starting point and the end point, is a challenge region that is to interfere with a progression of the another virtual character along the course in a direction generally toward the end point. Two or more virtual obstacles represented by icons are selectable for inclusion in the challenge region. The another virtual character will be required to interact with at least one of the virtual obstacles included in the challenge region before continuing the progression along the course beyond the challenge region. | 07-07-2011 |
Paolo Croce, Cugnasco CH
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20140309071 | BACKLASH-FREE PLANETARY GEAR ASSEMBLY - A backlash-free planetary gear assembly comprising at least a first planet carrier member ( | 10-16-2014 |
Paolo Del Croce, Orvieto IT
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20090051405 | ADAPTIVE CAPACITANCE FOR TRANSISTOR - A circuit includes a transistor having a source, drain, a gate, and an electrode structure. A source terminal is coupled to the source. A drain terminal coupled to the drain. Terminals are coupled to the gate and to the electrode structure. A switch is coupled to the source, the gate terminal and the electrode terminal to selectively couple one of the gate and electrode structure to the source. In further embodiments, a second switch is used to selectively couple a resistor between the gate and the source. A method is used to control the switches to keep the transistor in an off state or allow it to switch to an on state. | 02-26-2009 |
Paolo Del Croce, Villach AT
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20090295359 | System and Method for Providing a Low-Power Self-Adjusting Reference Current for Floating Supply Stages - A system and method for providing an accurate current reference using a low-power current source is disclosed. A preferred embodiment comprises a system comprises a first section and a second section. The first section comprises a first simple current reference, an accurate current reference, and a circuit that generates a digital error signal based upon a comparison of an output of the first simple current reference and an output of the accurate current reference. The second section comprises a second simple current reference providing a second reference current, an adjustment circuit providing an adjustment current based upon the digital error signal, and a circuit biased with current equivalent to a summation of the second reference current and the adjustment current. The first simple current reference and the second simple current reference may be equivalent circuits. | 12-03-2009 |
20100102845 | Proportional Regulation for Optimized Current Sensor Performance - An integrated circuit device comprises a first transistor having a gate coupled to an output of a first operational amplifier, a second transistor having a threshold voltage proportional to a threshold voltage of the first transistor, the second transistor having a gate coupled to an inverting input of a second operational amplifier, an output of the second operational amplifier coupled to an inverting input of the first operational amplifier, a first resistor coupled between the second transistor gate and the inverting input of the second operational amplifier, and a second resistor coupled between the output of the second operational amplifier and the inverting input of the second operational amplifier, a ratio of the second resistor to the first resistor selected based upon a ratio of a production distribution of a transistor source voltage offset to a production distribution of a transistor threshold voltage mismatch. | 04-29-2010 |
20100194462 | Current Control Circuits - Circuit, system and method of current control circuits are disclosed. In one embodiment, a control circuit includes a first MOS transistor and a second MOS transistor. The first source/drains of the first and the second MOS transistors are coupled to an output of a power source. A second source/drain of the first MOS transistor is coupled to a first output node of the current control circuit. A second source/drain of the second MOS transistor is coupled to a second output node of the current control circuit. The control circuit further includes a means to block flow of current from the first output node of the current control circuit to the second output node of the current control circuit. | 08-05-2010 |
20110316606 | Power Switch Temperature Control Device and Method - An embodiment method for power switch temperature control comprises monitoring a power transistor for a delta-temperature fault, and monitoring the power transistor for an over-temperature fault. If a delta-temperature fault is detected, then the power transistor is commanded to turn off. If an over-temperature fault is detected, then the power transistor is commanded to turn off, and delta-temperature hysteresis cycling is disabled. | 12-29-2011 |
20130106395 | System and Method for Providing a Low-Power Self-Adjusting Reference Current for Floating Supply Stages | 05-02-2013 |
20140091384 | Reverse Polarity Protection for n-Substrate High-Side Switches - A semiconductor device is disclosed. In accordance with a first aspect of the present invention the device includes a semiconductor chip having a substrate, a first supply terminal electrically coupled to the substrate to provide a first supply potential (V | 04-03-2014 |