Patent application number | Description | Published |
20110266674 | Laser Etch Via Formation - The present disclosure provides methods for forming semiconductor devices with laser-etched vias and apparatus including the same. In one embodiment, a method of fabricating a semiconductor device includes providing a substrate having a frontside and a backside, and providing a layer above the frontside of the substrate, the layer having a different composition from the substrate. The method further includes controlling a laser power and a laser pulse number to laser etch an opening through the layer and at least a portion of the frontside of the substrate, filling the opening with a conductive material to form a via, removing a portion of the backside of the substrate to expose the via, and electrically coupling a first element to a second element with the via. A semiconductor device fabricated by such a method is also disclosed. | 11-03-2011 |
20120012871 | LIGHT EMITTING DEVICE - The present disclosure relates to methods for performing wafer-level measurement and wafer-level binning of LED devices. The present disclosure also relates to methods for reducing thermal resistance of LED devices. The methods include growing epitaxial layers consisting of an n-doped layer, an active layer, and a p-doped layer on a wafer of a growth substrate. The method further includes forming p-contact and n-contact to the p-doped layer and the n-doped layer, respectively. The method further includes performing a wafer-level measurement of the LED by supplying power to the LED through the n-contact and the p-contact. The method further includes dicing the wafer to generate diced LED dies, bonding the diced LED dies to a chip substrate, and removing the growth substrate from the diced LED dies. | 01-19-2012 |
20120032212 | METHOD OF LIGHT EMITTING DIODE SIDEWALL PASSIVATION - A Light-Emitting Diode (LED) includes a light-emitting structure having a passivation layer disposed on vertical sidewalls across a first doped layer, an active layer, and a second doped layer that completely covers at least the sidewalls of the active layer. The passivation layer is formed by plasma bombardment or ion implantation of the light-emitting structure. It protects the sidewalls during subsequent processing steps and prevents current leakage around the active layer. | 02-09-2012 |
20120064642 | METHOD TO REMOVE SAPPHIRE SUBSTRATE - A Light-Emitting Diode (LED) is formed on a sapphire substrate that is removed from the LED by grinding and then etching the sapphire substrate. The sapphire substrate is ground first to a first specified thickness using a single abrasive or multiple abrasives. The remaining sapphire substrate is removed by dry etching or wet etching. | 03-15-2012 |
20120080698 | HIGH EFFICIENCY LIGHT EMITTING DIODES - The present disclosure relates to high efficiency light emitting diode devices and methods for fabricating the same. In accordance with one or more embodiments, a light emitting diode device includes a substrate having one or more recessed features formed on a surface thereof and one or more omni-directional reflectors formed to overlie the one or more recessed features. A light emitting diode layer is formed on the surface of the substrate to overlie the omni-directional reflector. The one or more omni-directional reflectors are adapted to efficiently reflect light. | 04-05-2012 |
20120104409 | FORMING LIGHT-EMITTING DIODES USING SEED PARTICLES - A seed layer for growing a group III-V semiconductor structure is embedded in a dielectric material on a carrier substrate. After the group III-V semiconductor structure is grown, the dielectric material is removed by wet etch to detach the carrier substrate. The group III-V semiconductor structure includes a thick gallium nitride layer of at least 100 microns or a light-emitting structure. | 05-03-2012 |
20120126262 | ETCHING GROWTH LAYERS OF LIGHT EMITTING DEVICES TO REDUCE LEAKAGE CURRENT - The present disclosure relates to methods for fabricating LEDs by patterning and etching an n-doped epitaxial layer to form regions of roughened surface of the n-doped layer and mesa structures adjacent to the roughened surface regions before depositing an active layer and the rest of the epitaxial layers on the mesa structures. The method includes growing epitaxial layers of an LED including an un-doped layer and an n-doped layer on a wafer of growth substrate. The method also includes patterning the n-doped layer to form a first region of the n-doped layer and a mesa region of the n-doped layer adjacent to the first region. The method further includes etching the first region of the n-doped layer to create a roughened surface. The method further includes growing additional epitaxial layers of the LED including an active layer and a p-doped layer on the mesa region of the n-doped layer. | 05-24-2012 |
20120205694 | METHOD OF FORMING A LIGHT EMITTING DIODE EMITTER SUBSTRATE WITH HIGHLY REFLECTIVE METAL BONDING - The present disclosure provides one embodiment of a method for fabricating a light emitting diode (LED) package. The method includes forming a plurality of through silicon vias (TSVs) on a silicon substrate; depositing a dielectric layer over a first side and a second side of the silicon substrate and over sidewall surfaces of the TSVs; forming a metal layer patterned over the dielectric layer on the first side and the second side of the silicon substrate and further filling the TSVs; and forming a plurality of highly reflective bonding pads over the metal layer on the second side of the silicon substrate for LED bonding and wire bonding. | 08-16-2012 |
20120228650 | Light Emitting Diode Emitter Substrate with Highly Reflective Metal Bonding - The present disclosure provides one embodiment of a method for fabricating a light emitting diode (LED) package. The method includes forming a plurality of through silicon vias (TSVs) on a silicon substrate; depositing a dielectric layer over a first side and a second side of the silicon substrate and over sidewall surfaces of the TSVs; forming a metal layer patterned over the dielectric layer on the first side and the second side of the silicon substrate and further filling the TSVs; and forming a plurality of highly reflective bonding pads over the metal layer on the second side of the silicon substrate for LED bonding and wire bonding. | 09-13-2012 |
20120273749 | METHOD AND STRUCTURE FOR LED WITH NANO-PATTERNED SUBSTRATE - The present disclosure provides one embodiment of a method for fabricating light-emitting diode (LED) devices. The method includes forming a nano-mask layer on a first substrate, wherein the nano-mask layer has a randomly arranged grain pattern; growing a first epitaxy semiconductor layer in the first substrate, forming a nano-composite layer; growing a number of epitaxy semiconductor layers over the nano-composite layer; bonding a second substrate to the epitaxy semiconductor layers from a first side of the epitaxy semiconductor layers; applying a radiation energy to the nano-composite layer; and separating the first substrate from the epitaxy semiconductor layers from a second side of the epitaxy semiconductor layers. | 11-01-2012 |
20130095581 | THICK WINDOW LAYER LED MANUFACTURE - A LED die and method for bonding, dicing, and forming the LED die are disclosed. In an example, the method includes forming a LED wafer, wherein the LED wafer includes a substrate and a plurality of epitaxial layers disposed over the substrate, wherein the plurality of epitaxial layers are configured to form a LED; bonding the LED wafer to a base-board to form a LED pair; and after bonding, dicing the LED pair, wherein the dicing includes simultaneously dicing the LED wafer and the base-board, thereby forming LED dies. | 04-18-2013 |
20130140592 | LIGHT EMITTING DIODE WITH IMPROVED LIGHT EXTRACTION EFFICIENCY AND METHODS OF MANUFACTURING SAME - A light emitting diode structure and methods of manufacturing the same are disclosed. In an example, a light emitting diode structure includes a crystalline substrate having a thickness that is greater than or equal to about 250 μm, wherein the crystalline substrate has a first roughened surface and a second roughened surface, the second roughened surface being opposite the first roughened surface; a plurality of epitaxy layers disposed over the first roughened surface, the plurality of epitaxy layers being configured as a light emitting diode; and another substrate bonded to the crystalline substrate such that the plurality of epitaxy layers are disposed between the another substrate and the first roughened surface of the crystalline substrate. | 06-06-2013 |
20130187122 | PHOTONIC DEVICE HAVING EMBEDDED NANO-SCALE STRUCTURES - The present disclosure involves a method of fabricating a lighting apparatus. The method includes forming a first III-V group compound layer over a substrate. The first III-V group compound layer has a first type of conductivity. A multiple quantum well (MQW) layer is formed over the first III-V group compound layer. A second III-V group compound layer is then formed over the MQW layer. The second III-V group compound layer has a second type of conductivity different from the first type of conductivity. Thereafter, a plurality of conductive components is formed over the second III-V group compound layer. A light-reflective layer is then formed over the second III-V group compound layer and over the conductive components. The conductive components each have better adhesive and electrical conduction properties than the light-reflective layer. | 07-25-2013 |
20130260484 | OPTIMIZING LIGHT EXTRACTION EFFICIENCY FOR AN LED WAFER - The present disclosure involves a method of fabricating a light-emitting diode (LED) wafer. The method first determines a target surface morphology for the LED wafer. The target surface morphology yields a maximum light output for LEDs on the LED wafer. The LED wafer is etched to form a roughened wafer surface. Thereafter, using a laser scanning microscope, the method investigates an actual surface morphology of the LED wafer. Afterwards, if the actual surface morphology differs from the target surface morphology beyond an acceptable limit, the method repeats the etching step one or more times. The etching is repeated by adjusting one or more etching parameters. | 10-03-2013 |
20140021483 | Forming Light-Emitting Diodes Using Seed Particles - A seed layer for growing a group | 01-23-2014 |