Patent application number | Description | Published |
20110062580 | PROTECTION LAYER FOR PREVENTING UBM LAYER FROM CHEMICAL ATTACK AND OXIDATION - A protection layer formed of a CuGe | 03-17-2011 |
20110101521 | POST PASSIVATION INTERCONNECT WITH OXIDATION PREVENTION LAYER - A copper interconnect line formed on a passivation layer is protected by a copper-containing material layer including a group III element, a group IV element, a group V element or combinations thereof. | 05-05-2011 |
20110101523 | PILLAR BUMP WITH BARRIER LAYER - A copper pillar bump has a surface covered with by a barrier layer formed of a copper-containing material layer including a group III element, a group IV element, a group V element or combinations thereof. The barrier layer depresses the copper diffusion and reaction with solder to reduce the thickness of intermetallic compound between the pillar pump and solder. | 05-05-2011 |
20110233761 | CU PILLAR BUMP WITH NON-METAL SIDEWALL PROTECTION STRUCTURE - Sidewall protection processes are provided for Cu pillar bump technology, in which a protection structure on the sidewalls of the Cu pillar bump is formed of at least one of non-metal material layers, for example a dielectric material layer, a polymer material layer, or combinations thereof. | 09-29-2011 |
20110241040 | NOVEL SEMICONDUCTOR PACKAGE WITH THROUGH SILICON VIAS - The substrate with through silicon plugs (or vias) described above removes the need for conductive bumps. The process flow is very simple and cost efficient. The structures described combines the separate TSV, redistribution layer, and conductive bump structures into a single structure. By combining the separate structures, a low resistance electrical connection with high heat dissipation capability is created. In addition, the substrate with through silicon plugs (or vias, or trenches) also allows multiple chips to be packaged together. A through silicon trench can surround the one or more chips to provide protection against copper diffusing to neighboring devices during manufacturing. In addition, multiple chips with similar or different functions can be integrated on the TSV substrate. Through silicon plugs with different patterns can be used under a semiconductor chip(s) to improve heat dissipation and to resolve manufacturing concerns. | 10-06-2011 |
20110241061 | HEAT DISSIPATION BY THROUGH SILICON PLUGS - The package substrates with through silicon plugs (or vias) described above provide lateral and vertical heat dissipation pathways for semiconductor chips that require thermal management. Designs of through silicon plugs (TSPs) with high duty ratios can most effectively provide heat dissipation. TSP designs with patterns of double-sided combs can provide high duty ratios, such as equal to or greater than 50%. Package substrates with high duty ratios are useful for semiconductor chips that generate large amount of heat. An example of such semiconductor chip is a light-emitting diode (LED) chip. | 10-06-2011 |
20110254159 | CONDUCTIVE FEATURE FOR SEMICONDUCTOR SUBSTRATE AND METHOD OF MANUFACTURE - An embodiment of the disclosure includes a conductive feature on a semiconductor die. A substrate is provided. A bond pad is formed over the substrate. The bond pad has a first width. A polyimide layer is formed over the substrate and the bond pad. The polyimide layer has a first opening over the bond pad with a second width. A silicon-based protection layer overlies the polyimide layer. The silicon-based protection layer has a second opening over the bond pad with a third width. The first opening and the second opening form a combined opening having sidewalls to expose a portion of the bond pad. A UBM layer is formed over the sidewalls of combined opening to contact the exposed portion of the bond pad. A conductive feature overlies the UBM layer. | 10-20-2011 |
20110266667 | CU PILLAR BUMP WITH NON-METAL SIDEWALL PROTECTION STRUCTURE - A sidewall protection structure is provided for covering at least a portion of a sidewall surface of a bump structure, in which a protection structure on the sidewalls of a Cu pillar and a surface region of an under-bump-metallurgy (UBM) layer is formed of at least one non-metal material layers, for example a dielectric material layer, a polymer material layer, or combinations thereof. | 11-03-2011 |
20110285011 | CU PILLAR BUMP WITH L-SHAPED NON-METAL SIDEWALL PROTECTION STRUCTURE - An L-shaped sidewall protection process is used for Cu pillar bump technology. The L-shaped sidewall protection structure is formed of at least one of non-metal material layers, for example a dielectric material layer, a polymer material layer or combinations thereof. | 11-24-2011 |
20110298123 | CU PILLAR BUMP WITH NON-METAL SIDEWALL SPACER AND METAL TOP CAP - A bump has a non-metal sidewall spacer on a lower sidewall portion of Cu pillar, and a metal top cap on a top surface and an upper sidewall portion of the Cu pillar. The metal top cap is formed by an electroless or immersion plating technique after the non-metal sidewall spacer formation. | 12-08-2011 |
20120007230 | CONDUCTIVE BUMP FOR SEMICONDUCTOR SUBSTRATE AND METHOD OF MANUFACTURE - An embodiment of the disclosure includes a conductive bump on a semiconductor die. A substrate is provided. A bond pad is over the substrate. An under bump metallurgy (UBM) layer is over the bond pad. A copper pillar is over the UBM layer. The copper pillar has a top surface with a first width and sidewalls with a concave shape. A nickel layer having a top surface and a bottom surface is over the top surface of the copper pillar. The bottom surface of the nickel layer has a second width. A ratio of the second width to the first width is between about 0.93 to about 1.07. A solder material is over the top surface of the cap layer. | 01-12-2012 |
20120091577 | COPPER PILLAR BUMP WITH COBALT-CONTAINING SIDEWALL PROTECTION - An integrated circuit device includes a Cu pillar and a solder layer overlying the Cu pillar. A Co-containing metallization layer is formed to cover the Cu pillar and the solder layer, and then a thermally reflow process is performed to form a solder bump and drive the Co element into the solder bump. Next, an oxidation process is performed to form a cobalt oxide layer on the sidewall surface of the Cu pillar. | 04-19-2012 |
20120098124 | SEMICONDUCTOR DEVICE HAVING UNDER-BUMP METALLIZATION (UBM) STRUCTURE AND METHOD OF FORMING THE SAME - A semiconductor device has a UBM (under-bump metallization) structure underlying and electrically connected to a solder bump. The UBM structure has a first metallization layer with a first cross-sectional dimension d | 04-26-2012 |
20120280388 | COPPER PILLAR BUMP WITH NON-METAL SIDEWALL PROTECTION STRUCTURE AND METHOD OF MAKING THE SAME - This description relates to an integrated circuit device including a conductive pillar formed over a substrate. The conductive pillar has a sidewall surface and a top surface. The integrated circuit device further includes an under-bump-metallurgy (UBM) layer between the substrate and the conductive pillar. The UBM layer has a surface region. The integrated circuit device further includes a protection structure on the sidewall surface of the conductive pillar and the surface region of the UBM layer. The protection structure is formed of a non-metal material. | 11-08-2012 |
20130302979 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING THROUGH SILICON PLUGS - A method of making a semiconductor device, the method includes forming a first opening and a second opening in a substrate. The method further includes forming a conductive material in the first opening and in the second opening, the conductive material comprising a joined portion where the conductive material in the first opening and the conductive material in the second opening are electrically and thermally connected together at a first surface of the substrate. The method further includes reducing a thickness of the substrate from a second surface of the substrate, opposite the first surface, to expose the conductive material in the first opening and the conductive material in the second opening. The method further includes connecting a device to the second surface of the substrate. | 11-14-2013 |
20140154871 | METHOD AND SYSTEM FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device is provided. The method contains steps of providing the semiconductor device including a working area; directing a medium flow onto the working area; configuring a lens in contact with the medium flow; and directing a laser beam to the working area through the lens and the medium flow. A laser processing for manufacturing a semiconductor device is also provided. | 06-05-2014 |
20140335687 | METHOD OF MAKING A CONDUCTIVE PILLAR BUMP WITH NON-METAL SIDEWALL PROTECTION STRUCTURE - A method of making a semiconductor device includes forming an under bump metallurgy (UBM) layer over a substrate, the UBM layer comprising sidewalls and a surface region. The method further includes forming a conductive pillar over the UBM layer, the conductive pillar includes sidewalls, wherein the conductive pillar exposes the surface region of the UBM layer. The method further includes forming a non-metal protective structure over the sidewalls of the conductive pillar, wherein the non-metal protective structure contacts the surface region of the UBM layer, and the non-metal protective structure exposes the sidewalls of the UBM layer. | 11-13-2014 |
20140342546 | COPPER PILLAR BUMP WITH COBALT-CONTAINING SIDEWALL PROTECTION LAYER - A method of forming an integrated circuit device comprises forming a metal pillar over a semiconductor substrate. The method also comprises forming a solder layer over the metal pillar. The method further comprises forming a metallization layer comprising a cobalt (Co) element, the metallization layer covering the metal pillar and the solder layer. The method additionally comprises thermally reflowing the solder layer to form a solder bump, driving the Co element of the metallization layer into the solder bump. The method also comprises oxidizing the metallization layer to form a metal oxide layer on a sidewall surface of the metal pillar. | 11-20-2014 |
20140363970 | METHOD OF MAKING A PILLAR STRUCTURE HAVING A NON-METAL SIDEWALL PROTECTION STRUCTURE - A method of making a pillar structure includes forming a first under-bump-metallurgy (UBM) layer formed on a pad region of a substrate, wherein the first UBM layer includes sidewalls. The method further includes forming a second UBM layer on the first UBM layer, wherein the second UBM layer includes a sidewall surface, an area of the first UBM layer is greater than an area of the second UBM layer. The method further includes forming a copper-containing pillar on the second UBM layer, wherein the copper-containing pillar includes a sidewall surface and a top surface. The method further includes forming a protection structure on the sidewall surface of the copper-containing pillar and on an entirety of the sidewall surface of the second UBM layer, wherein the protection structure does not cover the sidewalls of the first UBM layer, and the protection structure is a non-metal material. | 12-11-2014 |